mirror of https://github.com/mgba-emu/mgba.git
Fix writing to PC
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parent
68f2eed84d
commit
6e3a9a9508
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@ -122,6 +122,9 @@ void ARMStep(struct ARMCore* cpu) {
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#define ARM_COND_LE (cpu->cpsr.z || !cpu->cpsr.n != !cpu->cpsr.v)
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#define ARM_COND_LE (cpu->cpsr.z || !cpu->cpsr.n != !cpu->cpsr.v)
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#define ARM_COND_AL 1
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#define ARM_COND_AL 1
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#define ARM_WRITE_PC \
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cpu->gprs[ARM_PC] = (cpu->gprs[ARM_PC] & -cpu->instructionWidth) + cpu->instructionWidth
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#define ARM_ADDITION_S(M, N, D) \
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#define ARM_ADDITION_S(M, N, D) \
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if (rd == ARM_PC && _ARMModeHasSPSR(cpu->cpsr.priv)) { \
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if (rd == ARM_PC && _ARMModeHasSPSR(cpu->cpsr.priv)) { \
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cpu->cpsr = cpu->spsr; \
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cpu->cpsr = cpu->spsr; \
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@ -380,7 +383,8 @@ DEFINE_INSTRUCTION_ARM(SWPB,)
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DEFINE_INSTRUCTION_ARM(B, \
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DEFINE_INSTRUCTION_ARM(B, \
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int32_t offset = opcode << 8; \
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int32_t offset = opcode << 8; \
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offset >>= 6; \
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offset >>= 6; \
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cpu->gprs[ARM_PC] += offset)
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cpu->gprs[ARM_PC] += offset; \
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ARM_WRITE_PC;)
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DEFINE_INSTRUCTION_ARM(BL,)
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DEFINE_INSTRUCTION_ARM(BL,)
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DEFINE_INSTRUCTION_ARM(BX,)
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DEFINE_INSTRUCTION_ARM(BX,)
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@ -11,6 +11,7 @@ int main(int argc, char** argv) {
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GBALoadROM(&gba, fd);
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GBALoadROM(&gba, fd);
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gba.cpu.gprs[ARM_PC] = 0x08000004;
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gba.cpu.gprs[ARM_PC] = 0x08000004;
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ARMStep(&gba.cpu);
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ARMStep(&gba.cpu);
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ARMStep(&gba.cpu);
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GBADeinit(&gba);
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GBADeinit(&gba);
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return 0;
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return 0;
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