diff --git a/src/arm.c b/src/arm.c
index 1dd664aa0..60deac5bb 100644
--- a/src/arm.c
+++ b/src/arm.c
@@ -122,6 +122,9 @@ void ARMStep(struct ARMCore* cpu) {
 #define ARM_COND_LE (cpu->cpsr.z || !cpu->cpsr.n != !cpu->cpsr.v)
 #define ARM_COND_AL 1
 
+#define ARM_WRITE_PC \
+	cpu->gprs[ARM_PC] = (cpu->gprs[ARM_PC] & -cpu->instructionWidth) + cpu->instructionWidth
+
 #define ARM_ADDITION_S(M, N, D) \
 	if (rd == ARM_PC && _ARMModeHasSPSR(cpu->cpsr.priv)) { \
 		cpu->cpsr = cpu->spsr; \
@@ -380,7 +383,8 @@ DEFINE_INSTRUCTION_ARM(SWPB,)
 DEFINE_INSTRUCTION_ARM(B, \
 	int32_t offset = opcode << 8; \
 	offset >>= 6; \
-	cpu->gprs[ARM_PC] += offset)
+	cpu->gprs[ARM_PC] += offset; \
+	ARM_WRITE_PC;)
 
 DEFINE_INSTRUCTION_ARM(BL,)
 DEFINE_INSTRUCTION_ARM(BX,)
diff --git a/src/main.c b/src/main.c
index 275d771f4..56ae4d60f 100644
--- a/src/main.c
+++ b/src/main.c
@@ -11,6 +11,7 @@ int main(int argc, char** argv) {
 	GBALoadROM(&gba, fd);
 	gba.cpu.gprs[ARM_PC] = 0x08000004;
 	ARMStep(&gba.cpu);
+	ARMStep(&gba.cpu);
 	GBADeinit(&gba);
 
 	return 0;