DS emulator, sorta
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StapleButter 5ccf56d21d * fix 'STMxx with base register included in register list' when base register is banked.
* fix cart DMA for ARM9.
2017-02-05 16:50:20 +01:00
.gitignore add more crap 2016-05-16 17:48:40 +02:00
ARM.cpp * fix 'STMxx with base register included in register list' when base register is banked. 2017-02-05 16:50:20 +01:00
ARM.h * scheduler revamp, simpler design 2017-01-31 03:54:51 +01:00
ARMInterpreter.cpp start refactoring shit: more accurate timing and way of counting cycles. 2017-01-30 18:36:11 +01:00
ARMInterpreter.h start refactoring shit: more accurate timing and way of counting cycles. 2017-01-30 18:36:11 +01:00
ARMInterpreter_ALU.cpp * implement the last missing instructions. QADD is not good according to ARMWrestler, but it doesn't make sense. TODO: investigate. 2017-01-31 18:41:31 +01:00
ARMInterpreter_ALU.h * implement the last missing instructions. QADD is not good according to ARMWrestler, but it doesn't make sense. TODO: investigate. 2017-01-31 18:41:31 +01:00
ARMInterpreter_Branch.cpp start refactoring shit: more accurate timing and way of counting cycles. 2017-01-30 18:36:11 +01:00
ARMInterpreter_Branch.h start refactoring shit: more accurate timing and way of counting cycles. 2017-01-30 18:36:11 +01:00
ARMInterpreter_LoadStore.cpp * fix 'STMxx with base register included in register list' when base register is banked. 2017-02-05 16:50:20 +01:00
ARMInterpreter_LoadStore.h start refactoring shit: more accurate timing and way of counting cycles. 2017-01-30 18:36:11 +01:00
ARM_InstrTable.h blarg 2017-02-01 00:31:23 +01:00
CP15.cpp better save support. not hardcoded filename, support for non-tiny EEPROM and Flash, attempt at autodetecting the right memory type. 2017-02-03 16:57:31 +01:00
CP15.h move TCM shit to CP15.cpp. closer to the real thing (for example now DMA can't access TCM, etc). 2017-01-30 19:11:29 +01:00
DMA.cpp * fix 'STMxx with base register included in register list' when base register is banked. 2017-02-05 16:50:20 +01:00
DMA.h DMA support! 2017-01-18 01:33:06 +01:00
FIFO.cpp IPC FIFO emulation. 2017-01-17 01:58:25 +01:00
FIFO.h IPC FIFO emulation. 2017-01-17 01:58:25 +01:00
GPU.cpp blarg 2017-02-03 21:11:23 +01:00
GPU.h BG extended palettes! 2017-02-02 00:09:40 +01:00
GPU2D.cpp 256-color sprites. code's weird tho. check it later. 2017-02-04 00:07:25 +01:00
GPU2D.h an attempt at shitty extended "tile+rotscale" BGs 2017-02-02 01:18:03 +01:00
NDS.cpp * fix 'STMxx with base register included in register list' when base register is banked. 2017-02-05 16:50:20 +01:00
NDS.h * HBlank flag and IRQ. 2017-02-03 18:47:40 +01:00
NDSCart.cpp * fix 'STMxx with base register included in register list' when base register is banked. 2017-02-05 16:50:20 +01:00
NDSCart.h * make direct boot less shitty. 2017-02-01 21:35:00 +01:00
README.md * somewhat proper event scheduler 2016-12-05 17:08:24 +01:00
RTC.cpp * fix 'STMxx with base register included in register list' when base register is banked. 2017-02-05 16:50:20 +01:00
RTC.h * some basic BG display code 2017-01-20 01:18:30 +01:00
SPI.cpp improve touchscreen precision 2017-02-04 00:12:08 +01:00
SPI.h TSC support, touchscreen input. not perfect but for now this will do. 2017-02-01 00:24:36 +01:00
Wifi.cpp some more crap emulated. 2016-12-06 17:32:51 +01:00
Wifi.h some more crap emulated. 2016-12-06 17:32:51 +01:00
main.cpp * HBlank flag and IRQ. 2017-02-03 18:47:40 +01:00
melonDS.cbp esgshdgdfh 2017-01-22 20:37:12 +01:00
melonDS.depend * fix 'STMxx with base register included in register list' when base register is banked. 2017-02-05 16:50:20 +01:00
melonDS.layout hey look, more crap 2016-11-03 01:38:58 +01:00
types.h christ. CodeBlocks is retarded. 2016-12-23 21:22:22 +01:00

README.md

melonDS

DS emulator, sorta

the goal is to do things right and fast, akin to blargSNES (but hopefully better)

but also to have fun coding this shit

LOVE MELONS

NO ASKING ROMZ!! ILLEGAL

license will eventually be GPL or some crap. don't steal the code and make money off of it or claim it as your own or be an asshole.

TODO LIST

  • take code fetch waitstates into account when fetching instructions, and during branches (pipeline shit) (tricky, some code fetches are nonsequential)