919 lines
20 KiB
C++
919 lines
20 KiB
C++
/*
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Copyright 2016-2022 melonDS team
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This file is part of melonDS.
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melonDS is free software: you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation, either version 3 of the License, or (at your option)
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any later version.
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melonDS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with melonDS. If not, see http://www.gnu.org/licenses/.
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*/
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#include <stdio.h>
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#include <algorithm>
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#include "NDS.h"
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#include "DSi.h"
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#include "ARM.h"
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#include "ARMInterpreter.h"
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#include "AREngine.h"
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#include "ARMJIT.h"
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#include "Platform.h"
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#ifdef JIT_ENABLED
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#include "ARMJIT.h"
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#include "ARMJIT_Memory.h"
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#endif
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using Platform::Log;
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using Platform::LogLevel;
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// instruction timing notes
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//
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// * simple instruction: 1S (code)
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// * LDR: 1N+1N+1I (code/data/internal)
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// * STR: 1N+1N (code/data)
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// * LDM: 1N+1N+(n-1)S+1I
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// * STM: 1N+1N+(n-1)S
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// * MUL/etc: 1N+xI (code/internal)
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// * branch: 1N+1S (code/code) (pipeline refill)
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//
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// MUL/MLA seems to take 1I on ARM9
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u32 ARM::ConditionTable[16] =
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{
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0xF0F0, // EQ
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0x0F0F, // NE
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0xCCCC, // CS
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0x3333, // CC
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0xFF00, // MI
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0x00FF, // PL
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0xAAAA, // VS
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0x5555, // VC
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0x0C0C, // HI
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0xF3F3, // LS
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0xAA55, // GE
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0x55AA, // LT
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0x0A05, // GT
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0xF5FA, // LE
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0xFFFF, // AL
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0x0000 // NE
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};
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ARM::ARM(u32 num)
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{
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// well uh
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Num = num;
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}
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ARM::~ARM()
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{
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// dorp
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}
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ARMv5::ARMv5() : ARM(0)
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{
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#ifndef JIT_ENABLED
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DTCM = new u8[DTCMPhysicalSize];
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#endif
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PU_Map = PU_PrivMap;
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}
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ARMv4::ARMv4() : ARM(1)
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{
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//
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}
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ARMv5::~ARMv5()
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{
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#ifndef JIT_ENABLED
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delete[] DTCM;
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#endif
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}
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void ARM::Reset()
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{
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Cycles = 0;
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Halted = 0;
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IRQ = 0;
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for (int i = 0; i < 16; i++)
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R[i] = 0;
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CPSR = 0x000000D3;
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for (int i = 0; i < 7; i++)
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R_FIQ[i] = 0;
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for (int i = 0; i < 2; i++)
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{
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R_SVC[i] = 0;
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R_ABT[i] = 0;
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R_IRQ[i] = 0;
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R_UND[i] = 0;
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}
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R_FIQ[7] = 0x00000010;
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R_SVC[2] = 0x00000010;
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R_ABT[2] = 0x00000010;
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R_IRQ[2] = 0x00000010;
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R_UND[2] = 0x00000010;
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ExceptionBase = Num ? 0x00000000 : 0xFFFF0000;
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CodeMem.Mem = NULL;
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#ifdef JIT_ENABLED
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FastBlockLookup = NULL;
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FastBlockLookupStart = 0;
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FastBlockLookupSize = 0;
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#endif
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// zorp
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JumpTo(ExceptionBase);
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}
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void ARMv5::Reset()
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{
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if (NDS::ConsoleType == 1)
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{
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BusRead8 = DSi::ARM9Read8;
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BusRead16 = DSi::ARM9Read16;
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BusRead32 = DSi::ARM9Read32;
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BusWrite8 = DSi::ARM9Write8;
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BusWrite16 = DSi::ARM9Write16;
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BusWrite32 = DSi::ARM9Write32;
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GetMemRegion = DSi::ARM9GetMemRegion;
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}
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else
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{
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BusRead8 = NDS::ARM9Read8;
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BusRead16 = NDS::ARM9Read16;
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BusRead32 = NDS::ARM9Read32;
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BusWrite8 = NDS::ARM9Write8;
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BusWrite16 = NDS::ARM9Write16;
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BusWrite32 = NDS::ARM9Write32;
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GetMemRegion = NDS::ARM9GetMemRegion;
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}
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PU_Map = PU_PrivMap;
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ARM::Reset();
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}
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void ARMv4::Reset()
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{
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if (NDS::ConsoleType)
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{
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BusRead8 = DSi::ARM7Read8;
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BusRead16 = DSi::ARM7Read16;
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BusRead32 = DSi::ARM7Read32;
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BusWrite8 = DSi::ARM7Write8;
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BusWrite16 = DSi::ARM7Write16;
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BusWrite32 = DSi::ARM7Write32;
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}
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else
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{
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BusRead8 = NDS::ARM7Read8;
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BusRead16 = NDS::ARM7Read16;
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BusRead32 = NDS::ARM7Read32;
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BusWrite8 = NDS::ARM7Write8;
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BusWrite16 = NDS::ARM7Write16;
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BusWrite32 = NDS::ARM7Write32;
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}
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ARM::Reset();
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}
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void ARM::DoSavestate(Savestate* file)
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{
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file->Section((char*)(Num ? "ARM7" : "ARM9"));
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file->Var32((u32*)&Cycles);
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//file->Var32((u32*)&CyclesToRun);
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// hack to make save states compatible
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u32 halted = Halted;
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file->Var32(&halted);
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Halted = halted;
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file->VarArray(R, 16*sizeof(u32));
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file->Var32(&CPSR);
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file->VarArray(R_FIQ, 8*sizeof(u32));
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file->VarArray(R_SVC, 3*sizeof(u32));
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file->VarArray(R_ABT, 3*sizeof(u32));
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file->VarArray(R_IRQ, 3*sizeof(u32));
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file->VarArray(R_UND, 3*sizeof(u32));
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file->Var32(&CurInstr);
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#ifdef JIT_ENABLED
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if (file->Saving && NDS::EnableJIT)
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{
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// hack, the JIT doesn't really pipeline
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// but we still want JIT save states to be
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// loaded while running the interpreter
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FillPipeline();
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}
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#endif
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file->VarArray(NextInstr, 2*sizeof(u32));
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file->Var32(&ExceptionBase);
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if (!file->Saving)
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{
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CPSR |= 0x00000010;
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R_FIQ[7] |= 0x00000010;
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R_SVC[2] |= 0x00000010;
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R_ABT[2] |= 0x00000010;
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R_IRQ[2] |= 0x00000010;
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R_UND[2] |= 0x00000010;
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if (!Num)
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{
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SetupCodeMem(R[15]); // should fix it
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((ARMv5*)this)->RegionCodeCycles = ((ARMv5*)this)->MemTimings[R[15] >> 12][0];
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if ((CPSR & 0x1F) == 0x10)
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((ARMv5*)this)->PU_Map = ((ARMv5*)this)->PU_UserMap;
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else
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((ARMv5*)this)->PU_Map = ((ARMv5*)this)->PU_PrivMap;
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}
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else
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{
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CodeRegion = R[15] >> 24;
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CodeCycles = R[15] >> 15; // cheato
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}
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}
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}
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void ARMv5::DoSavestate(Savestate* file)
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{
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ARM::DoSavestate(file);
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CP15DoSavestate(file);
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}
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void ARM::SetupCodeMem(u32 addr)
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{
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if (!Num)
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{
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((ARMv5*)this)->GetCodeMemRegion(addr, &CodeMem);
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}
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else
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{
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// not sure it's worth it for the ARM7
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// esp. as everything there generally runs on WRAM
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// and due to how it's mapped, we can't use this optimization
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//NDS::ARM7GetMemRegion(addr, false, &CodeMem);
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}
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}
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void ARMv5::JumpTo(u32 addr, bool restorecpsr)
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{
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if (restorecpsr)
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{
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RestoreCPSR();
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if (CPSR & 0x20) addr |= 0x1;
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else addr &= ~0x1;
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}
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// aging cart debug crap
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//if (addr == 0x0201764C) printf("capture test %d: R1=%08X\n", R[6], R[1]);
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//if (addr == 0x020175D8) printf("capture test %d: res=%08X\n", R[6], R[0]);
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u32 oldregion = R[15] >> 24;
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u32 newregion = addr >> 24;
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RegionCodeCycles = MemTimings[addr >> 12][0];
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if (addr & 0x1)
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{
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addr &= ~0x1;
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R[15] = addr+2;
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if (newregion != oldregion) SetupCodeMem(addr);
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// two-opcodes-at-once fetch
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// doesn't matter if we put garbage in the MSbs there
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if (addr & 0x2)
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{
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NextInstr[0] = CodeRead32(addr-2, true) >> 16;
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Cycles += CodeCycles;
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NextInstr[1] = CodeRead32(addr+2, false);
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Cycles += CodeCycles;
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}
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else
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{
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NextInstr[0] = CodeRead32(addr, true);
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NextInstr[1] = NextInstr[0] >> 16;
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Cycles += CodeCycles;
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}
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CPSR |= 0x20;
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}
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else
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{
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addr &= ~0x3;
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R[15] = addr+4;
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if (newregion != oldregion) SetupCodeMem(addr);
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NextInstr[0] = CodeRead32(addr, true);
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Cycles += CodeCycles;
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NextInstr[1] = CodeRead32(addr+4, false);
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Cycles += CodeCycles;
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CPSR &= ~0x20;
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}
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if (!(PU_Map[addr>>12] & 0x04))
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{
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PrefetchAbort();
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return;
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}
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NDS::MonitorARM9Jump(addr);
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}
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void ARMv4::JumpTo(u32 addr, bool restorecpsr)
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{
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if (restorecpsr)
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{
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RestoreCPSR();
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if (CPSR & 0x20) addr |= 0x1;
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else addr &= ~0x1;
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}
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u32 oldregion = R[15] >> 23;
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u32 newregion = addr >> 23;
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CodeRegion = addr >> 24;
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CodeCycles = addr >> 15; // cheato
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if (addr & 0x1)
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{
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addr &= ~0x1;
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R[15] = addr+2;
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//if (newregion != oldregion) SetupCodeMem(addr);
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NextInstr[0] = CodeRead16(addr);
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NextInstr[1] = CodeRead16(addr+2);
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Cycles += NDS::ARM7MemTimings[CodeCycles][0] + NDS::ARM7MemTimings[CodeCycles][1];
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CPSR |= 0x20;
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}
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else
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{
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addr &= ~0x3;
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R[15] = addr+4;
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//if (newregion != oldregion) SetupCodeMem(addr);
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NextInstr[0] = CodeRead32(addr);
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NextInstr[1] = CodeRead32(addr+4);
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Cycles += NDS::ARM7MemTimings[CodeCycles][2] + NDS::ARM7MemTimings[CodeCycles][3];
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CPSR &= ~0x20;
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}
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}
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void ARM::RestoreCPSR()
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{
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u32 oldcpsr = CPSR;
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switch (CPSR & 0x1F)
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{
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case 0x11:
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CPSR = R_FIQ[7];
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break;
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case 0x12:
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CPSR = R_IRQ[2];
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break;
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case 0x13:
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CPSR = R_SVC[2];
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break;
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case 0x14:
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case 0x15:
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case 0x16:
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case 0x17:
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CPSR = R_ABT[2];
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break;
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case 0x18:
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case 0x19:
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case 0x1A:
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case 0x1B:
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CPSR = R_UND[2];
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break;
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default:
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Log(LogLevel::Warn, "!! attempt to restore CPSR under bad mode %02X, %08X\n", CPSR&0x1F, R[15]);
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break;
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}
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CPSR |= 0x00000010;
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UpdateMode(oldcpsr, CPSR);
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}
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void ARM::UpdateMode(u32 oldmode, u32 newmode, bool phony)
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{
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if ((oldmode & 0x1F) == (newmode & 0x1F)) return;
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switch (oldmode & 0x1F)
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{
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case 0x11:
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std::swap(R[8], R_FIQ[0]);
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std::swap(R[9], R_FIQ[1]);
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std::swap(R[10], R_FIQ[2]);
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std::swap(R[11], R_FIQ[3]);
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std::swap(R[12], R_FIQ[4]);
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std::swap(R[13], R_FIQ[5]);
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std::swap(R[14], R_FIQ[6]);
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break;
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case 0x12:
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std::swap(R[13], R_IRQ[0]);
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std::swap(R[14], R_IRQ[1]);
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break;
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case 0x13:
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std::swap(R[13], R_SVC[0]);
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std::swap(R[14], R_SVC[1]);
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break;
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case 0x17:
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std::swap(R[13], R_ABT[0]);
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std::swap(R[14], R_ABT[1]);
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break;
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case 0x1B:
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std::swap(R[13], R_UND[0]);
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std::swap(R[14], R_UND[1]);
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break;
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}
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switch (newmode & 0x1F)
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{
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case 0x11:
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std::swap(R[8], R_FIQ[0]);
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std::swap(R[9], R_FIQ[1]);
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std::swap(R[10], R_FIQ[2]);
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std::swap(R[11], R_FIQ[3]);
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std::swap(R[12], R_FIQ[4]);
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std::swap(R[13], R_FIQ[5]);
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std::swap(R[14], R_FIQ[6]);
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break;
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case 0x12:
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std::swap(R[13], R_IRQ[0]);
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std::swap(R[14], R_IRQ[1]);
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break;
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case 0x13:
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std::swap(R[13], R_SVC[0]);
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std::swap(R[14], R_SVC[1]);
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break;
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case 0x17:
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std::swap(R[13], R_ABT[0]);
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std::swap(R[14], R_ABT[1]);
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break;
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case 0x1B:
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std::swap(R[13], R_UND[0]);
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std::swap(R[14], R_UND[1]);
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break;
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}
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if ((!phony) && (Num == 0))
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{
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if ((newmode & 0x1F) == 0x10)
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((ARMv5*)this)->PU_Map = ((ARMv5*)this)->PU_UserMap;
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else
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((ARMv5*)this)->PU_Map = ((ARMv5*)this)->PU_PrivMap;
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}
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}
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void ARM::TriggerIRQ()
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{
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if (CPSR & 0x80)
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return;
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u32 oldcpsr = CPSR;
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CPSR &= ~0xFF;
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CPSR |= 0xD2;
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UpdateMode(oldcpsr, CPSR);
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R_IRQ[2] = oldcpsr;
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R[14] = R[15] + (oldcpsr & 0x20 ? 2 : 0);
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JumpTo(ExceptionBase + 0x18);
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// ARDS cheat support
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// normally, those work by hijacking the ARM7 VBlank handler
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if (Num == 1)
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{
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if ((NDS::IF[1] & NDS::IE[1]) & (1<<NDS::IRQ_VBlank))
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AREngine::RunCheats();
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}
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}
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void ARMv5::PrefetchAbort()
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{
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Log(LogLevel::Warn, "ARM9: prefetch abort (%08X)\n", R[15]);
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u32 oldcpsr = CPSR;
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CPSR &= ~0xBF;
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CPSR |= 0x97;
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UpdateMode(oldcpsr, CPSR);
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// this shouldn't happen, but if it does, we're stuck in some nasty endless loop
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// so better take care of it
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if (!(PU_Map[ExceptionBase>>12] & 0x04))
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{
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Log(LogLevel::Error, "!!!!! EXCEPTION REGION NOT EXECUTABLE. THIS IS VERY BAD!!\n");
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NDS::Stop();
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return;
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}
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R_ABT[2] = oldcpsr;
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R[14] = R[15] + (oldcpsr & 0x20 ? 2 : 0);
|
|
JumpTo(ExceptionBase + 0x0C);
|
|
}
|
|
|
|
void ARMv5::DataAbort()
|
|
{
|
|
Log(LogLevel::Warn, "ARM9: data abort (%08X)\n", R[15]);
|
|
|
|
u32 oldcpsr = CPSR;
|
|
CPSR &= ~0xBF;
|
|
CPSR |= 0x97;
|
|
UpdateMode(oldcpsr, CPSR);
|
|
|
|
R_ABT[2] = oldcpsr;
|
|
R[14] = R[15] + (oldcpsr & 0x20 ? 4 : 0);
|
|
JumpTo(ExceptionBase + 0x10);
|
|
}
|
|
|
|
void ARMv5::Execute()
|
|
{
|
|
if (Halted)
|
|
{
|
|
if (Halted == 2)
|
|
{
|
|
Halted = 0;
|
|
}
|
|
else if (NDS::HaltInterrupted(0))
|
|
{
|
|
Halted = 0;
|
|
if (NDS::IME[0] & 0x1)
|
|
TriggerIRQ();
|
|
}
|
|
else
|
|
{
|
|
NDS::ARM9Timestamp = NDS::ARM9Target;
|
|
return;
|
|
}
|
|
}
|
|
|
|
while (NDS::ARM9Timestamp < NDS::ARM9Target)
|
|
{
|
|
if (CPSR & 0x20) // THUMB
|
|
{
|
|
// prefetch
|
|
R[15] += 2;
|
|
CurInstr = NextInstr[0];
|
|
NextInstr[0] = NextInstr[1];
|
|
if (R[15] & 0x2) { NextInstr[1] >>= 16; CodeCycles = 0; }
|
|
else NextInstr[1] = CodeRead32(R[15], false);
|
|
|
|
// actually execute
|
|
u32 icode = (CurInstr >> 6) & 0x3FF;
|
|
ARMInterpreter::THUMBInstrTable[icode](this);
|
|
}
|
|
else
|
|
{
|
|
// prefetch
|
|
R[15] += 4;
|
|
CurInstr = NextInstr[0];
|
|
NextInstr[0] = NextInstr[1];
|
|
NextInstr[1] = CodeRead32(R[15], false);
|
|
|
|
// actually execute
|
|
if (CheckCondition(CurInstr >> 28))
|
|
{
|
|
u32 icode = ((CurInstr >> 4) & 0xF) | ((CurInstr >> 16) & 0xFF0);
|
|
ARMInterpreter::ARMInstrTable[icode](this);
|
|
}
|
|
else if ((CurInstr & 0xFE000000) == 0xFA000000)
|
|
{
|
|
ARMInterpreter::A_BLX_IMM(this);
|
|
}
|
|
else
|
|
AddCycles_C();
|
|
}
|
|
|
|
// TODO optimize this shit!!!
|
|
if (Halted)
|
|
{
|
|
if (Halted == 1 && NDS::ARM9Timestamp < NDS::ARM9Target)
|
|
{
|
|
NDS::ARM9Timestamp = NDS::ARM9Target;
|
|
}
|
|
break;
|
|
}
|
|
/*if (NDS::IF[0] & NDS::IE[0])
|
|
{
|
|
if (NDS::IME[0] & 0x1)
|
|
TriggerIRQ();
|
|
}*/
|
|
if (IRQ) TriggerIRQ();
|
|
|
|
NDS::ARM9Timestamp += Cycles;
|
|
Cycles = 0;
|
|
}
|
|
|
|
if (Halted == 2)
|
|
Halted = 0;
|
|
}
|
|
|
|
#ifdef JIT_ENABLED
|
|
void ARMv5::ExecuteJIT()
|
|
{
|
|
if (Halted)
|
|
{
|
|
if (Halted == 2)
|
|
{
|
|
Halted = 0;
|
|
}
|
|
else if (NDS::HaltInterrupted(0))
|
|
{
|
|
Halted = 0;
|
|
if (NDS::IME[0] & 0x1)
|
|
TriggerIRQ();
|
|
}
|
|
else
|
|
{
|
|
NDS::ARM9Timestamp = NDS::ARM9Target;
|
|
return;
|
|
}
|
|
}
|
|
|
|
while (NDS::ARM9Timestamp < NDS::ARM9Target)
|
|
{
|
|
u32 instrAddr = R[15] - ((CPSR&0x20)?2:4);
|
|
|
|
if ((instrAddr < FastBlockLookupStart || instrAddr >= (FastBlockLookupStart + FastBlockLookupSize))
|
|
&& !ARMJIT::SetupExecutableRegion(0, instrAddr, FastBlockLookup, FastBlockLookupStart, FastBlockLookupSize))
|
|
{
|
|
NDS::ARM9Timestamp = NDS::ARM9Target;
|
|
Log(LogLevel::Error, "ARMv5 PC in non executable region %08X\n", R[15]);
|
|
return;
|
|
}
|
|
|
|
ARMJIT::JitBlockEntry block = ARMJIT::LookUpBlock(0, FastBlockLookup,
|
|
instrAddr - FastBlockLookupStart, instrAddr);
|
|
if (block)
|
|
ARM_Dispatch(this, block);
|
|
else
|
|
ARMJIT::CompileBlock(this);
|
|
|
|
if (StopExecution)
|
|
{
|
|
// this order is crucial otherwise idle loops waiting for an IRQ won't function
|
|
if (IRQ)
|
|
TriggerIRQ();
|
|
|
|
if (Halted || IdleLoop)
|
|
{
|
|
if ((Halted == 1 || IdleLoop) && NDS::ARM9Timestamp < NDS::ARM9Target)
|
|
{
|
|
Cycles = 0;
|
|
NDS::ARM9Timestamp = NDS::ARM9Target;
|
|
}
|
|
IdleLoop = 0;
|
|
break;
|
|
}
|
|
}
|
|
|
|
NDS::ARM9Timestamp += Cycles;
|
|
Cycles = 0;
|
|
}
|
|
|
|
if (Halted == 2)
|
|
Halted = 0;
|
|
}
|
|
#endif
|
|
|
|
void ARMv4::Execute()
|
|
{
|
|
if (Halted)
|
|
{
|
|
if (Halted == 2)
|
|
{
|
|
Halted = 0;
|
|
}
|
|
else if (NDS::HaltInterrupted(1))
|
|
{
|
|
Halted = 0;
|
|
if (NDS::IME[1] & 0x1)
|
|
TriggerIRQ();
|
|
}
|
|
else
|
|
{
|
|
NDS::ARM7Timestamp = NDS::ARM7Target;
|
|
return;
|
|
}
|
|
}
|
|
|
|
while (NDS::ARM7Timestamp < NDS::ARM7Target)
|
|
{
|
|
if (CPSR & 0x20) // THUMB
|
|
{
|
|
// prefetch
|
|
R[15] += 2;
|
|
CurInstr = NextInstr[0];
|
|
NextInstr[0] = NextInstr[1];
|
|
NextInstr[1] = CodeRead16(R[15]);
|
|
|
|
// actually execute
|
|
u32 icode = (CurInstr >> 6);
|
|
ARMInterpreter::THUMBInstrTable[icode](this);
|
|
}
|
|
else
|
|
{
|
|
// prefetch
|
|
R[15] += 4;
|
|
CurInstr = NextInstr[0];
|
|
NextInstr[0] = NextInstr[1];
|
|
NextInstr[1] = CodeRead32(R[15]);
|
|
|
|
// actually execute
|
|
if (CheckCondition(CurInstr >> 28))
|
|
{
|
|
u32 icode = ((CurInstr >> 4) & 0xF) | ((CurInstr >> 16) & 0xFF0);
|
|
ARMInterpreter::ARMInstrTable[icode](this);
|
|
}
|
|
else
|
|
AddCycles_C();
|
|
}
|
|
|
|
// TODO optimize this shit!!!
|
|
if (Halted)
|
|
{
|
|
if (Halted == 1 && NDS::ARM7Timestamp < NDS::ARM7Target)
|
|
{
|
|
NDS::ARM7Timestamp = NDS::ARM7Target;
|
|
}
|
|
break;
|
|
}
|
|
/*if (NDS::IF[1] & NDS::IE[1])
|
|
{
|
|
if (NDS::IME[1] & 0x1)
|
|
TriggerIRQ();
|
|
}*/
|
|
if (IRQ) TriggerIRQ();
|
|
|
|
NDS::ARM7Timestamp += Cycles;
|
|
Cycles = 0;
|
|
}
|
|
|
|
if (Halted == 2)
|
|
Halted = 0;
|
|
|
|
if (Halted == 4)
|
|
{
|
|
DSi::SoftReset();
|
|
Halted = 2;
|
|
}
|
|
}
|
|
|
|
#ifdef JIT_ENABLED
|
|
void ARMv4::ExecuteJIT()
|
|
{
|
|
if (Halted)
|
|
{
|
|
if (Halted == 2)
|
|
{
|
|
Halted = 0;
|
|
}
|
|
else if (NDS::HaltInterrupted(1))
|
|
{
|
|
Halted = 0;
|
|
if (NDS::IME[1] & 0x1)
|
|
TriggerIRQ();
|
|
}
|
|
else
|
|
{
|
|
NDS::ARM7Timestamp = NDS::ARM7Target;
|
|
return;
|
|
}
|
|
}
|
|
|
|
while (NDS::ARM7Timestamp < NDS::ARM7Target)
|
|
{
|
|
u32 instrAddr = R[15] - ((CPSR&0x20)?2:4);
|
|
|
|
if ((instrAddr < FastBlockLookupStart || instrAddr >= (FastBlockLookupStart + FastBlockLookupSize))
|
|
&& !ARMJIT::SetupExecutableRegion(1, instrAddr, FastBlockLookup, FastBlockLookupStart, FastBlockLookupSize))
|
|
{
|
|
NDS::ARM7Timestamp = NDS::ARM7Target;
|
|
Log(LogLevel::Error, "ARMv4 PC in non executable region %08X\n", R[15]);
|
|
return;
|
|
}
|
|
|
|
ARMJIT::JitBlockEntry block = ARMJIT::LookUpBlock(1, FastBlockLookup,
|
|
instrAddr - FastBlockLookupStart, instrAddr);
|
|
if (block)
|
|
ARM_Dispatch(this, block);
|
|
else
|
|
ARMJIT::CompileBlock(this);
|
|
|
|
if (StopExecution)
|
|
{
|
|
if (IRQ)
|
|
TriggerIRQ();
|
|
|
|
if (Halted || IdleLoop)
|
|
{
|
|
if ((Halted == 1 || IdleLoop) && NDS::ARM7Timestamp < NDS::ARM7Target)
|
|
{
|
|
Cycles = 0;
|
|
NDS::ARM7Timestamp = NDS::ARM7Target;
|
|
}
|
|
IdleLoop = 0;
|
|
break;
|
|
}
|
|
}
|
|
|
|
NDS::ARM7Timestamp += Cycles;
|
|
Cycles = 0;
|
|
}
|
|
|
|
if (Halted == 2)
|
|
Halted = 0;
|
|
|
|
if (Halted == 4)
|
|
{
|
|
DSi::SoftReset();
|
|
Halted = 2;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
void ARMv5::FillPipeline()
|
|
{
|
|
SetupCodeMem(R[15]);
|
|
|
|
if (CPSR & 0x20)
|
|
{
|
|
if ((R[15] - 2) & 0x2)
|
|
{
|
|
NextInstr[0] = CodeRead32(R[15] - 4, false) >> 16;
|
|
NextInstr[1] = CodeRead32(R[15], false);
|
|
}
|
|
else
|
|
{
|
|
NextInstr[0] = CodeRead32(R[15] - 2, false);
|
|
NextInstr[1] = NextInstr[0] >> 16;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
NextInstr[0] = CodeRead32(R[15] - 4, false);
|
|
NextInstr[1] = CodeRead32(R[15], false);
|
|
}
|
|
}
|
|
|
|
void ARMv4::FillPipeline()
|
|
{
|
|
SetupCodeMem(R[15]);
|
|
|
|
if (CPSR & 0x20)
|
|
{
|
|
NextInstr[0] = CodeRead16(R[15] - 2);
|
|
NextInstr[1] = CodeRead16(R[15]);
|
|
}
|
|
else
|
|
{
|
|
NextInstr[0] = CodeRead32(R[15] - 4);
|
|
NextInstr[1] = CodeRead32(R[15]);
|
|
}
|
|
}
|