Merge branch 'melonDS-emu:master' into performance/gpu3d

src/ARMJIT.cpp

@@ -1086,11 +1086,34 @@ void InvalidateByAddr(u32 localAddr)
 
 void CheckAndInvalidateITCM()
 {
-    for (u32 i = 0; i < ITCMPhysicalSize; i+=16)
+    for (u32 i = 0; i < ITCMPhysicalSize; i+=512)
     {
-        if (CodeIndexITCM[i / 512].Code & (1 << ((i & 0x1FF) / 16)))
+        if (CodeIndexITCM[i / 512].Code)
         {
-            InvalidateByAddr(i | (ARMJIT_Memory::memregion_ITCM << 27));
+            // maybe using bitscan would be better here?
+            // The thing is that in densely populated sets
+            // The old fashioned way can actually be faster
+            for (u32 j = 0; j < 512; j += 16)
+            {
+                if (CodeIndexITCM[i / 512].Code & (1 << ((j & 0x1FF) / 16)))
+                    InvalidateByAddr((i+j) | (ARMJIT_Memory::memregion_ITCM << 27));
+            }
+        }
+    }
+}
+
+void CheckAndInvalidateWVRAM(int bank)
+{
+    u32 start = bank == 1 ? 0x20000 : 0;
+    for (u32 i = start; i < start+0x20000; i+=512)
+    {
+        if (CodeIndexARM7WVRAM[i / 512].Code)
+        {
+            for (u32 j = 0; j < 512; j += 16)
+            {
+                if (CodeIndexARM7WVRAM[i / 512].Code & (1 << ((j & 0x1FF) / 16)))
+                    InvalidateByAddr((i+j) | (ARMJIT_Memory::memregion_VWRAM << 27));
+            }
         }
     }
 }

src/ARMJIT.h

@@ -44,6 +44,7 @@ void DeInit();
 void Reset();
 
 void CheckAndInvalidateITCM();
+void CheckAndInvalidateWVRAM(int bank);
 
 void InvalidateByAddr(u32 pseudoPhysical);
 

src/CP15.cpp

@@ -134,6 +134,9 @@ void ARMv5::UpdateITCMSetting()
     if (CP15Control & (1<<18))
     {
         ITCMSize = 0x200 << ((ITCMSetting >> 1) & 0x1F);
+#ifdef JIT_ENABLED
+        FastBlockLookupSize = 0;
+#endif
     }
     else
     {

src/DSi.cpp

@@ -159,7 +159,7 @@ void Reset()
     SCFG_Clock7 = 0x0187;
     SCFG_EXT[0] = 0x8307F100;
     SCFG_EXT[1] = 0x93FFFB06;
-    SCFG_MC = 0x0010;//0x0011;
+    SCFG_MC = 0x0010 | (~((u32)NDSCart::CartInserted)&1);//0x0011;
     SCFG_RST = 0;
 
     DSi_DSP::SetRstLine(false);
@@ -248,6 +248,14 @@ void DoSavestate(Savestate* file)
     SDIO->DoSavestate(file);
 }
 
+void SetCartInserted(bool inserted)
+{
+    if (inserted)
+        SCFG_MC &= ~1;
+    else
+        SCFG_MC |= 1;
+}
+
 void DecryptModcryptArea(u32 offset, u32 size, u8* iv)
 {
     AES_ctx ctx;
@@ -2638,6 +2646,9 @@ u8 ARM7IORead8(u32 addr)
     case 0x04004D06: if (SCFG_BIOS & (1<<10)) return 0; return (ConsoleID >> 48) & 0xFF;
     case 0x04004D07: if (SCFG_BIOS & (1<<10)) return 0; return ConsoleID >> 56;
     case 0x04004D08: return 0;
+
+    case 0x4004700: return DSi_DSP::SNDExCnt;
+    case 0x4004701: return DSi_DSP::SNDExCnt >> 8;
     }
 
     return NDS::ARM7IORead8(addr);
@@ -2670,6 +2681,8 @@ u16 ARM7IORead16(u32 addr)
     case 0x04004D04: if (SCFG_BIOS & (1<<10)) return 0; return (ConsoleID >> 32) & 0xFFFF;
     case 0x04004D06: if (SCFG_BIOS & (1<<10)) return 0; return ConsoleID >> 48;
     case 0x04004D08: return 0;
+    
+    case 0x4004700: return DSi_DSP::SNDExCnt;
     }
 
     if (addr >= 0x04004800 && addr < 0x04004A00)
@@ -2741,6 +2754,10 @@ u32 ARM7IORead32(u32 addr)
     case 0x04004D00: if (SCFG_BIOS & (1<<10)) return 0; return ConsoleID & 0xFFFFFFFF;
     case 0x04004D04: if (SCFG_BIOS & (1<<10)) return 0; return ConsoleID >> 32;
     case 0x04004D08: return 0;
+
+    case 0x4004700:
+        printf("32-Bit SNDExCnt read? %08X\n", NDS::ARM7->R[15]);
+        return DSi_DSP::SNDExCnt;
     }
 
     if (addr >= 0x04004800 && addr < 0x04004A00)
@@ -2788,6 +2805,46 @@ void ARM7IOWrite8(u32 addr, u8 val)
 
     case 0x04004500: DSi_I2C::WriteData(val); return;
     case 0x04004501: DSi_I2C::WriteCnt(val); return;
+
+    case 0x4004700:
+        DSi_DSP::WriteSNDExCnt((u16)val | (DSi_DSP::SNDExCnt & 0xFF00));
+        return;
+    case 0x4004701:
+        DSi_DSP::WriteSNDExCnt(((u16)val << 8) | (DSi_DSP::SNDExCnt & 0x00FF));
+        return;
+    }
+
+    if (addr >= 0x04004420 && addr < 0x04004430)
+    {
+        u32 shift = (addr&3)*8;
+        addr -= 0x04004420;
+        addr &= ~3;
+        DSi_AES::WriteIV(addr, (u32)val << shift, 0xFF << shift);
+        return;
+    }
+    if (addr >= 0x04004430 && addr < 0x04004440)
+    {
+        u32 shift = (addr&3)*8;
+        addr -= 0x04004430;
+        addr &= ~3;
+        DSi_AES::WriteMAC(addr, (u32)val << shift, 0xFF << shift);
+        return;
+    }
+    if (addr >= 0x04004440 && addr < 0x04004500)
+    {
+        u32 shift = (addr&3)*8;
+        addr -= 0x04004440;
+        addr &= ~3;
+
+        int n = 0;
+        while (addr >= 0x30) { addr -= 0x30; n++; }
+
+        switch (addr >> 4)
+        {
+        case 0: DSi_AES::WriteKeyNormal(n, addr&0xF, (u32)val << shift, 0xFF << shift); return;
+        case 1: DSi_AES::WriteKeyX(n, addr&0xF, (u32)val << shift, 0xFF << shift); return;
+        case 2: DSi_AES::WriteKeyY(n, addr&0xF, (u32)val << shift, 0xFF << shift); return;
+        }
     }
 
     return NDS::ARM7IOWrite8(addr, val);
@@ -2819,12 +2876,51 @@ void ARM7IOWrite16(u32 addr, u16 val)
         case 0x04004062:
             if (!(SCFG_EXT[1] & (1 << 31))) /* no access to SCFG Registers if disabled*/
                 return;
-            u32 tmp = MBK[0][8];
-            tmp &= ~(0xffff << ((addr % 4) * 8));
-            tmp |= (val << ((addr % 4) * 8));
-            MBK[0][8] = tmp & 0x00FFFF0F;
-            MBK[1][8] = MBK[0][8];
+            {
+                u32 tmp = MBK[0][8];
+                tmp &= ~(0xffff << ((addr % 4) * 8));
+                tmp |= (val << ((addr % 4) * 8));
+                MBK[0][8] = tmp & 0x00FFFF0F;
+                MBK[1][8] = MBK[0][8];
+            }
             return;
+
+        case 0x4004700:
+            DSi_DSP::WriteSNDExCnt(val);
+            return;
+    }
+
+    if (addr >= 0x04004420 && addr < 0x04004430)
+    {
+        u32 shift = (addr&1)*16;
+        addr -= 0x04004420;
+        addr &= ~1;
+        DSi_AES::WriteIV(addr, (u32)val << shift, 0xFFFF << shift);
+        return;
+    }
+    if (addr >= 0x04004430 && addr < 0x04004440)
+    {
+        u32 shift = (addr&1)*16;
+        addr -= 0x04004430;
+        addr &= ~1;
+        DSi_AES::WriteMAC(addr, (u32)val << shift, 0xFFFF << shift);
+        return;
+    }
+    if (addr >= 0x04004440 && addr < 0x04004500)
+    {
+        u32 shift = (addr&1)*16;
+        addr -= 0x04004440;
+        addr &= ~1;
+
+        int n = 0;
+        while (addr >= 0x30) { addr -= 0x30; n++; }
+
+        switch (addr >> 4)
+        {
+        case 0: DSi_AES::WriteKeyNormal(n, addr&0xF, (u32)val << shift, 0xFFFF << shift); return;
+        case 1: DSi_AES::WriteKeyX(n, addr&0xF, (u32)val << shift, 0xFFFF << shift); return;
+        case 2: DSi_AES::WriteKeyY(n, addr&0xF, (u32)val << shift, 0xFFFF << shift); return;
+        }
     }
 
     if (addr >= 0x04004800 && addr < 0x04004A00)
@@ -2924,6 +3020,11 @@ void ARM7IOWrite32(u32 addr, u32 val)
     case 0x04004400: DSi_AES::WriteCnt(val); return;
     case 0x04004404: DSi_AES::WriteBlkCnt(val); return;
     case 0x04004408: DSi_AES::WriteInputFIFO(val); return;
+
+    case 0x4004700:
+        printf("32-Bit SNDExCnt write? %08X %08X\n", val, NDS::ARM7->R[15]);
+        DSi_DSP::WriteSNDExCnt(val);
+        return;
     }
 
     if (addr >= 0x04004420 && addr < 0x04004430)

src/DSi.h

@@ -59,6 +59,8 @@ void Reset();
 
 void DoSavestate(Savestate* file);
 
+void SetCartInserted(bool inserted);
+
 void SetupDirectBoot();
 void SoftReset();
 

src/DSi_DSP.cpp

@@ -27,6 +27,9 @@
 namespace DSi_DSP
 {
 
+// not sure whether to not rather put it somewhere else
+u16 SNDExCnt;
+
 Teakra::Teakra* TeakraCore;
 
 bool SCFG_RST;
@@ -151,6 +154,8 @@ void Reset()
     TeakraCore->Reset();
 
     NDS::CancelEvent(NDS::Event_DSi_DSP);
+
+    SNDExCnt = 0;
 }
 
 bool IsRstReleased()
@@ -548,6 +553,21 @@ void Write32(u32 addr, u32 val)
     Write16(addr, val & 0xFFFF);
 }
 
+void WriteSNDExCnt(u16 val)
+{
+    // it can be written even in NDS mode
+
+    // mic frequency can only be changed if it was disabled
+    // before the write
+    if (SNDExCnt & 0x8000)
+    {
+        val &= ~0x2000;
+        val |= SNDExCnt & 0x2000;
+    }
+
+    SNDExCnt = val & 0xE00F;
+}
+
 void Run(u32 cycles)
 {
     if (!IsDSPCoreEnabled())

src/DSi_DSP.h

@@ -24,11 +24,12 @@
 
 // TODO: for actual sound output
 // * audio callbacks
-// * SNDEXCNT
 
 namespace DSi_DSP
 {
 
+extern u16 SNDExCnt;
+
 extern u16 DSP_PDATA;
 extern u16 DSP_PADR;
 extern u16 DSP_PCFG;
@@ -65,6 +66,8 @@ void Write16(u32 addr, u16 val);
 u32 Read32(u32 addr);
 void Write32(u32 addr, u32 val);
 
+void WriteSNDExCnt(u16 val);
+
 // NOTE: checks SCFG_CLK9
 void Run(u32 cycles);
 

src/DSi_SD.cpp

@@ -477,16 +477,14 @@ u16 DSi_SDHost::Read(u32 addr)
             {
                 if (Ports[0]) // basic check of whether the SD card is inserted
                 {
-                    ret |= 0x0030;
+                    ret |= 0x0020;
                     if (!Ports[0]->ReadOnly) ret |= 0x0080;
                 }
-                else
-                    ret |= 0x0008;
             }
             else
             {
                 // SDIO wifi is always inserted, I guess
-                ret |= 0x00B0;
+                ret |= 0x00A0;
             }
             return ret;
         }

src/GPU.cpp

@@ -21,6 +21,10 @@
 #include "NDS.h"
 #include "GPU.h"
 
+#ifdef JIT_ENABLED
+#include "ARMJIT.h"
+#endif
+
 #include "GPU2D_Soft.h"
 
 namespace GPU
@@ -653,6 +657,9 @@ void MapVRAM_CD(u32 bank, u8 cnt)
             VRAMMap_ARM7[ofs] |= bankmask;
             memset(VRAMDirty[bank].Data, 0xFF, sizeof(VRAMDirty[bank].Data));
             VRAMSTAT |= (1 << (bank-2));
+#ifdef JIT_ENABLED
+            ARMJIT::CheckAndInvalidateWVRAM(ofs);
+#endif
             break;
 
         case 3: // texture

src/NDSCart.cpp

@@ -1679,6 +1679,7 @@ bool LoadROM(const u8* romdata, u32 romlen)
     }
 
     CartInserted = true;
+    DSi::SetCartInserted(true);
 
     u32 irversion = 0;
     if ((gamecode & 0xFF) == 'I')
@@ -1738,6 +1739,8 @@ void EjectCart()
     CartROMSize = 0;
     CartID = 0;
 
+    DSi::SetCartInserted(false);
+
     // CHECKME: does an eject imply anything for the ROM/SPI transfer registers?
 }
 

src/frontend/qt_sdl/CMakeLists.txt

@@ -104,7 +104,7 @@ elseif (WIN32)
     target_sources(melonDS PUBLIC "${CMAKE_SOURCE_DIR}/melon.rc")
 
     target_link_libraries(melonDS PRIVATE ws2_32 iphlpapi)
-    set_target_properties(melonDS PROPERTIES WIN32_EXECUTABLE $<CONFIG:Release>)
+    set_target_properties(melonDS PROPERTIES LINK_FLAGS_DEBUG "-mconsole")
 endif()
 
 if (PORTABLE)