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GXFIFO finished. hacktastic integration into the ARM9 loop.

This commit is contained in:
StapleButter 2017-02-08 00:52:37 +01:00
parent 971e7b7e89
commit 796dc58f71
6 changed files with 140 additions and 15 deletions
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10
ARM.cpp
View File

@ -20,6 +20,7 @@
#include "NDS.h"
#include "ARM.h"
#include "ARMInterpreter.h"
#include "GPU3D.h"
u32 ARM::ConditionTable[16] =
@ -332,6 +333,7 @@ s32 ARM::Execute()
}
Cycles = 0;
s32 lastcycles = 0;
u32 addr = R[15] - (CPSR&0x20 ? 4:8);
u32 cpsr = CPSR;
@ -373,6 +375,14 @@ s32 ARM::Execute()
//if (R[15]==0x037F9364) printf("R8=%08X R9=%08X\n", R[8], R[9]);
// gross hack
if (Num==0)
{
s32 diff = Cycles - lastcycles;
GPU3D::Run(diff >> 1);
lastcycles = Cycles - (diff&1);
}
// TODO optimize this shit!!!
if (Halted)
{

6
FIFO.h
View File

@ -47,7 +47,7 @@ public:
}
void Write(T& val)
void Write(T val)
{
if (IsFull()) return;
@ -60,9 +60,9 @@ public:
NumOccupied++;
}
T& Read()
T Read()
{
T& ret = Entries[ReadPos];
T ret = Entries[ReadPos];
if (IsEmpty())
return ret;

119
GPU3D.cpp
View File

@ -63,6 +63,43 @@ const u32 CmdNumParams[256] =
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
const s32 CmdNumCycles[256] =
{
// 0x00
0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
// 0x10
1, 17, 36, 17, 36, 19, 34, 30, 35, 31, 28, 22, 22,
0, 0, 0,
// 0x20
1, 9, 1, 9, 8, 8, 8, 8, 8, 1, 1, 1,
0, 0, 0, 0,
// 0x30
4, 4, 6, 1, 32,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
// 0x40
1, 1,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
// 0x50
392,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
// 0x60
1,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
// 0x70
103, 9, 5,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
// 0x80+
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
typedef struct
{
u8 Command;
@ -77,6 +114,10 @@ u32 NumCommands, CurCommand, ParamCount, TotalParams;
u32 GXStat;
u32 ExecParams[32];
u32 ExecParamCount;
s32 CycleCount;
bool Init()
{
@ -103,13 +144,15 @@ void Reset()
TotalParams = 0;
GXStat = 0;
memset(ExecParams, 0, 32*4);
ExecParamCount = 0;
CycleCount = 0;
}
void CmdFIFOWrite(CmdFIFOEntry entry)
void CmdFIFOWrite(CmdFIFOEntry& entry)
{
printf("GX FIFO: %02X %08X\n", entry.Command, entry.Param);
if (CmdFIFO->IsEmpty() && !CmdPIPE->IsFull())
{
CmdPIPE->Write(entry);
@ -137,6 +180,73 @@ CmdFIFOEntry CmdFIFORead()
if (!CmdFIFO->IsEmpty())
CmdPIPE->Write(CmdFIFO->Read());
}
CheckFIFOIRQ();
return ret;
}
void ExecuteCommand()
{
CmdFIFOEntry entry = CmdFIFORead();
ExecParams[ExecParamCount] = entry.Param;
ExecParamCount++;
if (ExecParamCount >= CmdNumParams[entry.Command])
{
CycleCount += CmdNumCycles[entry.Command];
ExecParamCount = 0;
// TODO: actually execute the command, maybe
//printf("3D CMD %02X\n", entry.Command);
switch (entry.Command)
{
case 0x18:
case 0x19:
case 0x1A:
// TODO: more cycles if MTX_MODE=2
break;
case 0x21:
// TODO: more cycles if lights are enabled
break;
case 0x50:
// TODO: make it happen upon VBlank, not right now
break;
}
}
}
void Run(s32 cycles)
{
if (CycleCount <= 0)
{
while (CycleCount <= 0 && !CmdPIPE->IsEmpty())
ExecuteCommand();
if (CmdPIPE->IsEmpty())
CycleCount = 0;
}
else
CycleCount -= cycles;
}
void CheckFIFOIRQ()
{
bool irq = false;
switch (GXStat >> 30)
{
case 1: irq = (CmdFIFO->Level() < 128); break;
case 2: irq = CmdFIFO->IsEmpty(); break;
}
if (irq) NDS::TriggerIRQ(0, NDS::IRQ_GXFIFO);
}
@ -165,7 +275,8 @@ u32 Read32(u32 addr)
// matrix stack levels, TODO
(fifolevel << 16) |
(fifolevel < 128 ? (1<<25) : 0) |
(fifolevel == 0 ? (1<<26) : 0);
(fifolevel == 0 ? (1<<26) : 0) |
(CycleCount > 0 ? (1<<27) : 0);
}
}
return 0;

3
GPU3D.h
View File

@ -26,6 +26,9 @@ bool Init();
void DeInit();
void Reset();
void Run(s32 cycles);
void CheckFIFOIRQ();
u8 Read8(u32 addr);
u16 Read16(u32 addr);
u32 Read32(u32 addr);

6
NDS.cpp
View File

@ -307,7 +307,7 @@ void Reset()
// test
//LoadROM();
//LoadFirmware();
if (NDSCart::LoadROM("rom/Simple_Tri.nds"))
if (NDSCart::LoadROM("rom/nsmb.nds"))
Running = true; // hax
}
@ -1728,8 +1728,8 @@ void ARM9IOWrite32(u32 addr, u32 val)
case 0x040001B4: *(u32*)&ROMSeed1[0] = val; return;
case 0x04000208: IME[0] = val & 0x1; return;
case 0x04000210: IE[0] = val; if (val&~0x000F2F7F)printf("unusual IRQ %08X\n",val);return;
case 0x04000214: IF[0] &= ~val; return;
case 0x04000210: IE[0] = val; return;
case 0x04000214: IF[0] &= ~val; GPU3D::CheckFIFOIRQ(); return;
case 0x04000240:
GPU::MapVRAM_AB(0, val & 0xFF);

11
melonDS.depend
View File

@ -10,7 +10,7 @@
1481161027 c:\documents\sources\melonds\types.h
1486506461 source:c:\documents\sources\melonds\nds.cpp
1486511394 source:c:\documents\sources\melonds\nds.cpp
<stdio.h>
<string.h>
"NDS.h"
@ -24,11 +24,12 @@
"RTC.h"
"Wifi.h"
1486310992 source:c:\documents\sources\melonds\arm.cpp
1486511108 source:c:\documents\sources\melonds\arm.cpp
<stdio.h>
"NDS.h"
"ARM.h"
"ARMInterpreter.h"
"GPU3D.h"
1486261220 c:\documents\sources\melonds\arm.h
"types.h"
@ -105,7 +106,7 @@
1486501225 source:c:\documents\sources\melonds\fifo.cpp
"FIFO.h"
1486506620 c:\documents\sources\melonds\fifo.h
1486511075 c:\documents\sources\melonds\fifo.h
"types.h"
1486309616 source:c:\documents\sources\melonds\dma.cpp
@ -144,9 +145,9 @@
"NDS.h"
"NDSCart.h"
1486503811 c:\documents\sources\melonds\gpu3d.h
1486510737 c:\documents\sources\melonds\gpu3d.h
1486506240 source:c:\documents\sources\melonds\gpu3d.cpp
1486511257 source:c:\documents\sources\melonds\gpu3d.cpp
<stdio.h>
<string.h>
"NDS.h"