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constexpr-s the DMA timing tables (#1489)

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Valtýr Kári Daníelsson 2022-07-27 17:01:31 +02:00 committed by GitHub
parent f5c1094d03
commit 457dd56b88
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2 changed files with 6 additions and 6 deletions
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2
src/DMA.h
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@ -96,7 +96,7 @@ private:
bool IsGXFIFODMA;
u32 MRAMBurstCount;
u8* MRAMBurstTable;
const u8* MRAMBurstTable;
};
#endif

10
src/DMA_Timings.h
View File

@ -43,9 +43,9 @@ namespace DMATiming
// setting. Timings are such that the nonseq setting only matters for the first
// access, and minor edge cases (like the last of a 0x20000-byte block).
u8 MRAMDummy[1] = {0};
constexpr u8 MRAMDummy[1] = {0};
u8 MRAMRead16Bursts[][256] =
constexpr u8 MRAMRead16Bursts[][256] =
{
// main RAM to regular 16bit or 32bit bus (similar)
{7, 3, 2, 2, 2, 2, 2, 2, 2, 2,
@ -119,7 +119,7 @@ u8 MRAMRead16Bursts[][256] =
0},
};
u8 MRAMRead32Bursts[][256] =
constexpr u8 MRAMRead32Bursts[][256] =
{
// main RAM to regular 16bit bus
{9, 4, 3, 3, 3, 3, 3, 3, 3, 3,
@ -178,7 +178,7 @@ u8 MRAMRead32Bursts[][256] =
0},
};
u8 MRAMWrite16Bursts[][256] =
constexpr u8 MRAMWrite16Bursts[][256] =
{
// regular 16bit or 32bit bus to main RAM (similar)
{8, 2, 2, 2, 2, 2, 2, 2, 2, 2,
@ -209,7 +209,7 @@ u8 MRAMWrite16Bursts[][256] =
0},
};
u8 MRAMWrite32Bursts[][256] =
constexpr u8 MRAMWrite32Bursts[][256] =
{
// regular 16bit bus to main RAM
{9, 4, 4, 4, 4, 4, 4, 4, 4, 4,