2019-06-16 15:01:49 +00:00
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/*
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Copyright 2016-2019 Arisotura
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This file is part of melonDS.
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melonDS is free software: you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation, either version 3 of the License, or (at your option)
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any later version.
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melonDS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with melonDS. If not, see http://www.gnu.org/licenses/.
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*/
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#include <stdio.h>
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#include <string.h>
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#include "DSi.h"
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#include "DSi_SD.h"
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2019-06-17 11:24:37 +00:00
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#include "Platform.h"
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2019-06-16 15:01:49 +00:00
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2019-06-17 11:24:37 +00:00
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#define SD_DESC (Num?"SDIO":"SD/MMC")
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DSi_SDHost::DSi_SDHost(u32 num)
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2019-06-16 15:01:49 +00:00
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{
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Num = num;
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2019-06-17 11:24:37 +00:00
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2019-06-18 12:12:37 +00:00
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DataFIFO[0] = new FIFO<u16>(0x100);
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DataFIFO[1] = new FIFO<u16>(0x100);
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2019-06-17 11:24:37 +00:00
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Ports[0] = NULL;
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Ports[1] = NULL;
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2019-06-16 15:01:49 +00:00
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}
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2019-06-17 11:24:37 +00:00
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DSi_SDHost::~DSi_SDHost()
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2019-06-16 15:01:49 +00:00
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{
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2019-06-18 12:12:37 +00:00
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delete DataFIFO[0];
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delete DataFIFO[1];
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2019-06-17 11:24:37 +00:00
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if (Ports[0]) delete Ports[0];
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if (Ports[1]) delete Ports[1];
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2019-06-16 15:01:49 +00:00
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}
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2019-06-17 11:24:37 +00:00
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void DSi_SDHost::Reset()
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2019-06-16 15:01:49 +00:00
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{
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if (Num == 0)
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{
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PortSelect = 0x0200; // CHECKME
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}
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else
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{
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PortSelect = 0x0100; // CHECKME
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}
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2019-06-17 11:24:37 +00:00
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SoftReset = 0x0007; // CHECKME
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2019-06-17 16:40:45 +00:00
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SDClock = 0;
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2019-06-18 12:12:37 +00:00
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SDOption = 0;
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2019-06-17 11:24:37 +00:00
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Command = 0;
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Param = 0;
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memset(ResponseBuffer, 0, sizeof(ResponseBuffer));
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2019-06-18 12:12:37 +00:00
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DataFIFO[0]->Clear();
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DataFIFO[1]->Clear();
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CurFIFO = 0;
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2019-06-17 11:24:37 +00:00
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IRQStatus = 0;
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IRQMask = 0x8B7F031D;
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2019-06-18 12:12:37 +00:00
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DataCtl = 0;
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Data32IRQ = 0;
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DataMode = 0;
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BlockCount16 = 0; BlockCount32 = 0; BlockCountInternal = 0;
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BlockLen16 = 0; BlockLen32 = 0;
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StopAction = 0;
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2019-06-17 11:24:37 +00:00
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if (Ports[0]) delete Ports[0];
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if (Ports[1]) delete Ports[1];
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Ports[0] = NULL;
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Ports[1] = NULL;
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if (Num == 0)
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{
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2019-06-17 16:40:45 +00:00
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DSi_MMCStorage* mmc = new DSi_MMCStorage(this, true, "nand.bin");
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mmc->SetCID(DSi::eMMC_CID);
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2019-06-17 11:24:37 +00:00
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// TODO: port 0 (SD)
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2019-06-17 16:40:45 +00:00
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Ports[1] = mmc;
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2019-06-17 11:24:37 +00:00
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}
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else
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{
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// TODO: SDIO (wifi)
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}
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2019-06-16 15:01:49 +00:00
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}
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2019-06-17 11:24:37 +00:00
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void DSi_SDHost::DoSavestate(Savestate* file)
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2019-06-16 15:01:49 +00:00
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{
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// TODO!
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}
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2019-06-18 16:39:13 +00:00
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void DSi_SDHost::UpdateData32IRQ()
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{
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if (DataMode == 0) return;
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u32 oldflags = ((Data32IRQ >> 8) & 0x1) | (((~Data32IRQ) >> 8) & 0x2);
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oldflags &= (Data32IRQ >> 11);
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Data32IRQ &= ~0x0300;
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if (IRQStatus & (1<<24)) Data32IRQ |= (1<<8);
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if (!(IRQStatus & (1<<25))) Data32IRQ |= (1<<9);
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u32 newflags = ((Data32IRQ >> 8) & 0x1) | (((~Data32IRQ) >> 8) & 0x2);
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newflags &= (Data32IRQ >> 11);
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if ((oldflags == 0) && (newflags != 0))
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NDS::SetIRQ2(Num ? NDS::IRQ2_DSi_SDIO : NDS::IRQ2_DSi_SDMMC);
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}
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2019-06-18 12:12:37 +00:00
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void DSi_SDHost::ClearIRQ(u32 irq)
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{
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IRQStatus &= ~(1<<irq);
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2019-06-18 16:39:13 +00:00
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if (irq == 24 || irq == 25) UpdateData32IRQ();
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2019-06-18 12:12:37 +00:00
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}
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2019-06-17 11:24:37 +00:00
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void DSi_SDHost::SetIRQ(u32 irq)
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2019-06-16 15:01:49 +00:00
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{
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2019-06-17 11:24:37 +00:00
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u32 oldflags = IRQStatus & ~IRQMask;
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IRQStatus |= (1<<irq);
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u32 newflags = IRQStatus & ~IRQMask;
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if ((oldflags == 0) && (newflags != 0))
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NDS::SetIRQ2(Num ? NDS::IRQ2_DSi_SDIO : NDS::IRQ2_DSi_SDMMC);
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2019-06-18 16:39:13 +00:00
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if (irq == 24 || irq == 25) UpdateData32IRQ();
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2019-06-17 11:24:37 +00:00
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}
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void DSi_SDHost::SendResponse(u32 val, bool last)
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{
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*(u32*)&ResponseBuffer[6] = *(u32*)&ResponseBuffer[4];
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*(u32*)&ResponseBuffer[4] = *(u32*)&ResponseBuffer[2];
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*(u32*)&ResponseBuffer[2] = *(u32*)&ResponseBuffer[0];
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*(u32*)&ResponseBuffer[0] = val;
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if (last) SetIRQ(0);
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}
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2019-06-18 12:12:37 +00:00
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void DSi_SDHost::FinishSend(u32 param)
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{
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DSi_SDHost* host = (param & 0x1) ? DSi::SDIO : DSi::SDMMC;
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host->CurFIFO ^= 1;
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host->ClearIRQ(25);
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host->SetIRQ(24);
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2019-06-19 12:44:00 +00:00
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//if (param & 0x2) host->SetIRQ(2);
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2019-06-18 12:12:37 +00:00
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}
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2019-06-18 16:39:13 +00:00
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void DSi_SDHost::SendData(u8* data, u32 len)
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2019-06-18 12:12:37 +00:00
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{
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2019-06-19 12:44:00 +00:00
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printf("%s: data RX, len=%d, blkcnt=%d (%d) blklen=%d, irq=%08X\n", SD_DESC, len, BlockCount16, BlockCountInternal, BlockLen16, IRQMask);
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2019-06-18 12:12:37 +00:00
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if (len != BlockLen16) printf("!! BAD BLOCKLEN\n");
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2019-06-18 16:39:13 +00:00
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bool last = (BlockCountInternal == 0);
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2019-06-18 12:12:37 +00:00
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u32 f = CurFIFO ^ 1;
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for (u32 i = 0; i < len; i += 2)
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DataFIFO[f]->Write(*(u16*)&data[i]);
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//CurFIFO = f;
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//SetIRQ(24);
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// TODO: determine what the delay should be!
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// for now, this is a placeholder
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// we need a delay because DSi boot2 will send a command and then wait for IRQ0
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// but if IRQ24 is thrown instantly, the handler clears IRQ0 before the
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// send-command function starts polling IRQ status
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u32 param = Num | (last << 1);
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NDS::ScheduleEvent(NDS::Event_DSi_SDTransfer, false, 512, FinishSend, param);
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}
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2019-06-20 21:05:32 +00:00
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void DSi_SDHost::ReceiveData(u8* data, u32 len)
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{
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printf("%s: data TX, len=%d, blkcnt=%d (%d) blklen=%d, irq=%08X\n", SD_DESC, len, BlockCount16, BlockCountInternal, BlockLen16, IRQMask);
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if (len != BlockLen16) printf("!! BAD BLOCKLEN\n");
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2019-06-20 22:07:57 +00:00
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DSi_SDDevice* dev = Ports[PortSelect & 0x1];
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2019-06-20 21:05:32 +00:00
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u32 f = CurFIFO;
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for (u32 i = 0; i < len; i += 2)
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*(u16*)&data[i] = DataFIFO[f]->Read();
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CurFIFO ^= 1;
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2019-06-20 22:07:57 +00:00
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if (BlockCountInternal <= 1)
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{
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printf("%s: data32 TX complete", SD_DESC);
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if (StopAction & (1<<8))
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{
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printf(", sending CMD12");
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if (dev) dev->SendCMD(12, 0);
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}
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printf("\n");
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// CHECKME: presumably IRQ2 should not trigger here, but rather
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// when the data transfer is done
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//SetIRQ(0);
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SetIRQ(2);
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}
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else
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{
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BlockCountInternal--;
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}
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2019-06-20 21:05:32 +00:00
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}
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2019-06-17 11:24:37 +00:00
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u16 DSi_SDHost::Read(u32 addr)
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{
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//printf("SDMMC READ %08X %08X\n", addr, NDS::GetPC(1));
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2019-06-16 15:01:49 +00:00
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switch (addr & 0x1FF)
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{
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2019-06-17 11:24:37 +00:00
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case 0x000: return Command;
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2019-06-16 15:01:49 +00:00
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case 0x002: return PortSelect & 0x030F;
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2019-06-17 11:24:37 +00:00
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case 0x004: return Param & 0xFFFF;
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case 0x006: return Param >> 16;
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2019-06-18 12:12:37 +00:00
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case 0x008: return StopAction;
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case 0x00A: return BlockCount16;
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2019-06-17 11:24:37 +00:00
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case 0x00C: return ResponseBuffer[0];
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case 0x00E: return ResponseBuffer[1];
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case 0x010: return ResponseBuffer[2];
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case 0x012: return ResponseBuffer[3];
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case 0x014: return ResponseBuffer[4];
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case 0x016: return ResponseBuffer[5];
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case 0x018: return ResponseBuffer[6];
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case 0x01A: return ResponseBuffer[7];
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2019-06-18 12:12:37 +00:00
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case 0x01C: return (IRQStatus & 0x031D) | 0x0030; // TODO: adjust insert flags for SD card
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case 0x01E: return ((IRQStatus >> 16) & 0x8B7F);
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2019-06-17 11:24:37 +00:00
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case 0x020: return IRQMask & 0x031D;
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case 0x022: return (IRQMask >> 16) & 0x8B7F;
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2019-06-17 16:40:45 +00:00
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case 0x024: return SDClock;
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2019-06-18 12:12:37 +00:00
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case 0x026: return BlockLen16;
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case 0x028: return SDOption;
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2019-06-20 01:19:51 +00:00
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case 0x02C: return 0; // TODO
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2019-06-18 12:12:37 +00:00
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case 0x030: // FIFO16
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{
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// TODO: decrement BlockLen????
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u32 f = CurFIFO;
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if (DataFIFO[f]->IsEmpty())
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{
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// TODO
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return 0;
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}
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DSi_SDDevice* dev = Ports[PortSelect & 0x1];
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u16 ret = DataFIFO[f]->Read();
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if (DataFIFO[f]->IsEmpty())
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{
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ClearIRQ(24);
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2019-06-19 12:44:00 +00:00
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if (BlockCountInternal <= 1)
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2019-06-18 12:12:37 +00:00
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{
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printf("%s: data RX complete", SD_DESC);
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if (StopAction & (1<<8))
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{
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printf(", sending CMD12");
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if (dev) dev->SendCMD(12, 0);
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}
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printf("\n");
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// CHECKME: presumably IRQ2 should not trigger here, but rather
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// when the data transfer is done
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//SetIRQ(0);
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2019-06-19 12:44:00 +00:00
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SetIRQ(2);
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2019-06-18 12:12:37 +00:00
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}
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else
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{
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BlockCountInternal--;
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if (dev) dev->ContinueTransfer();
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}
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SetIRQ(25);
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}
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return ret;
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}
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case 0x0D8: return DataCtl;
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2019-06-17 16:40:45 +00:00
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2019-06-17 11:24:37 +00:00
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case 0x0E0: return SoftReset;
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2019-06-18 12:12:37 +00:00
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case 0x100: return Data32IRQ;
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case 0x104: return BlockLen32;
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case 0x108: return BlockCount32;
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2019-06-16 15:01:49 +00:00
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}
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2019-06-20 01:19:51 +00:00
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printf("unknown %s read %08X @ %08X\n", SD_DESC, addr, NDS::GetPC(1));
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2019-06-16 15:01:49 +00:00
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return 0;
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}
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2019-06-18 16:39:13 +00:00
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u32 DSi_SDHost::ReadFIFO32()
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{
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2019-06-18 21:10:55 +00:00
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if (DataMode != 1) return 0;
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// TODO: decrement BlockLen????
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u32 f = CurFIFO;
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if (DataFIFO[f]->IsEmpty())
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{
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// TODO
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return 0;
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}
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DSi_SDDevice* dev = Ports[PortSelect & 0x1];
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|
|
|
u32 ret = DataFIFO[f]->Read();
|
|
|
|
ret |= (DataFIFO[f]->Read() << 16);
|
|
|
|
|
|
|
|
if (DataFIFO[f]->IsEmpty())
|
|
|
|
{
|
|
|
|
ClearIRQ(24);
|
|
|
|
|
2019-06-19 12:44:00 +00:00
|
|
|
if (BlockCountInternal <= 1)
|
2019-06-18 21:10:55 +00:00
|
|
|
{
|
|
|
|
printf("%s: data32 RX complete", SD_DESC);
|
|
|
|
|
|
|
|
if (StopAction & (1<<8))
|
|
|
|
{
|
|
|
|
printf(", sending CMD12");
|
|
|
|
if (dev) dev->SendCMD(12, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
printf("\n");
|
|
|
|
|
|
|
|
// CHECKME: presumably IRQ2 should not trigger here, but rather
|
|
|
|
// when the data transfer is done
|
|
|
|
//SetIRQ(0);
|
2019-06-19 12:44:00 +00:00
|
|
|
SetIRQ(2);
|
2019-06-18 21:10:55 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
BlockCountInternal--;
|
|
|
|
|
|
|
|
if (dev) dev->ContinueTransfer();
|
|
|
|
}
|
|
|
|
|
|
|
|
SetIRQ(25);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
2019-06-18 16:39:13 +00:00
|
|
|
}
|
|
|
|
|
2019-06-17 11:24:37 +00:00
|
|
|
void DSi_SDHost::Write(u32 addr, u16 val)
|
2019-06-16 15:01:49 +00:00
|
|
|
{
|
2019-06-17 11:24:37 +00:00
|
|
|
//printf("SDMMC WRITE %08X %04X %08X\n", addr, val, NDS::GetPC(1));
|
|
|
|
|
2019-06-16 15:01:49 +00:00
|
|
|
switch (addr & 0x1FF)
|
|
|
|
{
|
2019-06-17 11:24:37 +00:00
|
|
|
case 0x000:
|
|
|
|
{
|
|
|
|
Command = val;
|
|
|
|
u8 cmd = Command & 0x3F;
|
|
|
|
|
|
|
|
DSi_SDDevice* dev = Ports[PortSelect & 0x1];
|
|
|
|
if (dev)
|
|
|
|
{
|
2019-06-17 16:40:45 +00:00
|
|
|
// CHECKME
|
|
|
|
// "Setting Command Type to "ACMD" is automatically sending an APP_CMD prefix prior to the command number"
|
|
|
|
// except DSi boot2 manually sends an APP_CMD prefix AND sets the next command to be ACMD
|
2019-06-17 11:24:37 +00:00
|
|
|
switch ((Command >> 6) & 0x3)
|
|
|
|
{
|
|
|
|
case 0: dev->SendCMD(cmd, Param); break;
|
2019-06-17 16:40:45 +00:00
|
|
|
case 1: /*dev->SendCMD(55, 0);*/ dev->SendCMD(cmd, Param); break;
|
2019-06-17 11:24:37 +00:00
|
|
|
default:
|
|
|
|
printf("%s: unknown command type %d, %02X %08X\n", SD_DESC, (Command>>6)&0x3, cmd, Param);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
2019-06-20 01:19:51 +00:00
|
|
|
else printf("%s: SENDING CMD %04X TO NULL DEVICE\n", SD_DESC, val);
|
2019-06-17 11:24:37 +00:00
|
|
|
}
|
|
|
|
return;
|
|
|
|
|
2019-06-18 12:12:37 +00:00
|
|
|
case 0x002: PortSelect = val; printf("%s: PORT SELECT %04X\n", SD_DESC, val); return;
|
2019-06-17 11:24:37 +00:00
|
|
|
case 0x004: Param = (Param & 0xFFFF0000) | val; return;
|
|
|
|
case 0x006: Param = (Param & 0x0000FFFF) | (val << 16); return;
|
|
|
|
|
2019-06-18 12:12:37 +00:00
|
|
|
case 0x008: StopAction = val & 0x0101; return;
|
2019-06-18 16:39:13 +00:00
|
|
|
case 0x00A: BlockCount16 = val; BlockCountInternal = val; printf("%s: BLOCK COUNT %d\n", SD_DESC, val); return;
|
2019-06-18 12:12:37 +00:00
|
|
|
|
|
|
|
case 0x01C: IRQStatus &= (val | 0xFFFF0000); return;
|
|
|
|
case 0x01E: IRQStatus &= ((val << 16) | 0xFFFF); return;
|
2019-06-17 11:24:37 +00:00
|
|
|
case 0x020: IRQMask = (IRQMask & 0x8B7F0000) | (val & 0x031D); return;
|
|
|
|
case 0x022: IRQMask = (IRQMask & 0x0000031D) | ((val & 0x8B7F) << 16); return;
|
|
|
|
|
2019-06-17 16:40:45 +00:00
|
|
|
case 0x024: SDClock = val & 0x03FF; return;
|
2019-06-18 12:12:37 +00:00
|
|
|
case 0x026:
|
|
|
|
BlockLen16 = val & 0x03FF;
|
|
|
|
if (BlockLen16 > 0x200) BlockLen16 = 0x200;
|
|
|
|
return;
|
|
|
|
case 0x028: SDOption = val & 0xC1FF; return;
|
|
|
|
|
|
|
|
case 0x0D8:
|
|
|
|
DataCtl = (val & 0x0022);
|
|
|
|
DataMode = ((DataCtl >> 1) & 0x1) & ((Data32IRQ >> 1) & 0x1);
|
|
|
|
printf("%s: data mode %d-bit\n", SD_DESC, DataMode?32:16);
|
|
|
|
return;
|
2019-06-17 16:40:45 +00:00
|
|
|
|
2019-06-17 11:24:37 +00:00
|
|
|
case 0x0E0:
|
|
|
|
if ((SoftReset & 0x0001) && !(val & 0x0001))
|
|
|
|
{
|
|
|
|
printf("%s: RESET\n", SD_DESC);
|
2019-06-18 12:12:37 +00:00
|
|
|
StopAction = 0;
|
|
|
|
memset(ResponseBuffer, 0, sizeof(ResponseBuffer));
|
2019-06-17 11:24:37 +00:00
|
|
|
IRQStatus = 0;
|
|
|
|
// TODO: ERROR_DETAIL_STATUS
|
2019-06-18 12:12:37 +00:00
|
|
|
SDClock &= ~0x0500;
|
|
|
|
SDOption = 0x40EE;
|
2019-06-17 11:24:37 +00:00
|
|
|
// TODO: CARD_IRQ_STAT
|
|
|
|
// TODO: FIFO16 shit
|
|
|
|
}
|
|
|
|
SoftReset = 0x0006 | (val & 0x0001);
|
|
|
|
return;
|
2019-06-18 12:12:37 +00:00
|
|
|
|
|
|
|
case 0x100:
|
|
|
|
Data32IRQ = (val & 0x1802) | (Data32IRQ & 0x0300);
|
2019-06-18 16:39:13 +00:00
|
|
|
if (val & (1<<10))
|
|
|
|
{
|
|
|
|
// kind of hacky
|
|
|
|
u32 f = CurFIFO;
|
|
|
|
DataFIFO[f]->Clear();
|
|
|
|
}
|
2019-06-18 12:12:37 +00:00
|
|
|
DataMode = ((DataCtl >> 1) & 0x1) & ((Data32IRQ >> 1) & 0x1);
|
|
|
|
printf("%s: data mode %d-bit\n", SD_DESC, DataMode?32:16);
|
|
|
|
return;
|
|
|
|
case 0x104: BlockLen32 = val & 0x03FF; return;
|
|
|
|
case 0x108: BlockCount32 = val; return;
|
2019-06-17 11:24:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
printf("unknown %s write %08X %04X\n", SD_DESC, addr, val);
|
|
|
|
}
|
|
|
|
|
2019-06-18 16:39:13 +00:00
|
|
|
void DSi_SDHost::WriteFIFO32(u32 val)
|
|
|
|
{
|
2019-06-20 21:05:32 +00:00
|
|
|
if (DataMode != 1) return;
|
|
|
|
|
2019-06-20 21:20:08 +00:00
|
|
|
DSi_SDDevice* dev = Ports[PortSelect & 0x1];
|
2019-06-20 21:05:32 +00:00
|
|
|
u32 f = CurFIFO;
|
|
|
|
if (DataFIFO[f]->IsFull())
|
|
|
|
{
|
|
|
|
// TODO
|
|
|
|
printf("!!!! %s FIFO FULL\n", SD_DESC);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
DataFIFO[f]->Write(val & 0xFFFF);
|
|
|
|
DataFIFO[f]->Write(val >> 16);
|
|
|
|
|
2019-06-20 21:20:08 +00:00
|
|
|
if (DataFIFO[f]->Level() < (BlockLen16>>1))
|
|
|
|
{
|
|
|
|
ClearIRQ(25);
|
|
|
|
SetIRQ(24);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
// we completed one block, send it to the SD card
|
|
|
|
|
|
|
|
ClearIRQ(24);
|
|
|
|
SetIRQ(25);
|
|
|
|
|
|
|
|
if (dev) dev->ContinueTransfer();
|
2019-06-18 16:39:13 +00:00
|
|
|
}
|
|
|
|
|
2019-06-17 11:24:37 +00:00
|
|
|
|
|
|
|
DSi_MMCStorage::DSi_MMCStorage(DSi_SDHost* host, bool internal, const char* path) : DSi_SDDevice(host)
|
|
|
|
{
|
|
|
|
Internal = internal;
|
|
|
|
strncpy(FilePath, path, 1023); FilePath[1023] = '\0';
|
|
|
|
|
|
|
|
File = Platform::OpenLocalFile(path, "r+b");
|
|
|
|
|
2019-06-18 12:12:37 +00:00
|
|
|
CSR = 0x00000100; // checkme
|
2019-06-17 16:40:45 +00:00
|
|
|
|
|
|
|
// TODO: busy bit
|
|
|
|
// TODO: SDHC/SDXC bit
|
|
|
|
OCR = 0x80FF8000;
|
|
|
|
|
|
|
|
// TODO: customize based on card size etc
|
|
|
|
u8 csd_template[16] = {0x40, 0x40, 0x96, 0xE9, 0x7F, 0xDB, 0xF6, 0xDF, 0x01, 0x59, 0x0F, 0x2A, 0x01, 0x26, 0x90, 0x00};
|
|
|
|
memcpy(CSD, csd_template, 16);
|
2019-06-18 12:12:37 +00:00
|
|
|
|
|
|
|
// checkme
|
|
|
|
memset(SCR, 0, 8);
|
|
|
|
*(u32*)&SCR[0] = 0x012A0000;
|
|
|
|
|
|
|
|
memset(SSR, 0, 64);
|
2019-06-18 16:39:13 +00:00
|
|
|
|
|
|
|
BlockSize = 0;
|
|
|
|
RWAddress = 0;
|
|
|
|
RWCommand = 0;
|
2019-06-17 11:24:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
DSi_MMCStorage::~DSi_MMCStorage()
|
|
|
|
{
|
|
|
|
if (File) fclose(File);
|
|
|
|
}
|
|
|
|
|
|
|
|
void DSi_MMCStorage::SendCMD(u8 cmd, u32 param)
|
|
|
|
{
|
2019-06-17 16:40:45 +00:00
|
|
|
if (CSR & (1<<5))
|
|
|
|
{
|
|
|
|
CSR &= ~(1<<5);
|
|
|
|
return SendACMD(cmd, param);
|
|
|
|
}
|
|
|
|
|
2019-06-17 11:24:37 +00:00
|
|
|
switch (cmd)
|
|
|
|
{
|
2019-06-17 16:40:45 +00:00
|
|
|
case 0: // reset/etc
|
2019-06-17 11:24:37 +00:00
|
|
|
Host->SendResponse(CSR, true);
|
|
|
|
return;
|
|
|
|
|
2019-06-17 16:40:45 +00:00
|
|
|
case 2:
|
|
|
|
case 10: // get CID
|
2019-06-19 12:24:49 +00:00
|
|
|
Host->SendResponse(*(u32*)&CID[12], false);
|
|
|
|
Host->SendResponse(*(u32*)&CID[8], false);
|
|
|
|
Host->SendResponse(*(u32*)&CID[4], false);
|
|
|
|
Host->SendResponse(*(u32*)&CID[0], true);
|
2019-06-19 13:26:38 +00:00
|
|
|
if (cmd == 2) SetState(0x02);
|
2019-06-17 16:40:45 +00:00
|
|
|
return;
|
|
|
|
|
|
|
|
case 3: // get/set RCA
|
|
|
|
if (Internal)
|
|
|
|
{
|
|
|
|
RCA = param >> 16;
|
|
|
|
Host->SendResponse(CSR|0x10000, true); // huh??
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
// TODO
|
|
|
|
printf("CMD3 on SD card: TODO\n");
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
|
|
|
|
case 7: // select card (by RCA)
|
|
|
|
Host->SendResponse(CSR, true);
|
|
|
|
return;
|
|
|
|
|
|
|
|
case 8: // set voltage
|
2019-06-17 11:24:37 +00:00
|
|
|
Host->SendResponse(param, true);
|
|
|
|
return;
|
2019-06-17 16:40:45 +00:00
|
|
|
|
|
|
|
case 9: // get CSD
|
2019-06-19 12:24:49 +00:00
|
|
|
Host->SendResponse(*(u32*)&CSD[12], false);
|
|
|
|
Host->SendResponse(*(u32*)&CSD[8], false);
|
|
|
|
Host->SendResponse(*(u32*)&CSD[4], false);
|
|
|
|
Host->SendResponse(*(u32*)&CSD[0], true);
|
2019-06-17 16:40:45 +00:00
|
|
|
return;
|
|
|
|
|
2019-06-18 12:12:37 +00:00
|
|
|
case 12: // stop operation
|
2019-06-19 13:26:38 +00:00
|
|
|
SetState(0x04);
|
2019-06-20 21:05:32 +00:00
|
|
|
if (File) fflush(File);
|
2019-06-20 21:20:08 +00:00
|
|
|
RWCommand = 0;
|
2019-06-19 12:24:49 +00:00
|
|
|
Host->SendResponse(CSR, true);
|
|
|
|
return;
|
|
|
|
|
|
|
|
case 13: // get status
|
2019-06-18 12:12:37 +00:00
|
|
|
Host->SendResponse(CSR, true);
|
|
|
|
return;
|
|
|
|
|
|
|
|
case 16: // set block size
|
|
|
|
BlockSize = param;
|
2019-06-18 16:39:13 +00:00
|
|
|
if (BlockSize > 0x200)
|
|
|
|
{
|
|
|
|
// TODO! raise error
|
|
|
|
printf("!! SD/MMC: BAD BLOCK LEN %d\n", BlockSize);
|
|
|
|
BlockSize = 0x200;
|
|
|
|
}
|
2019-06-19 13:26:38 +00:00
|
|
|
SetState(0x04); // CHECKME
|
2019-06-18 12:12:37 +00:00
|
|
|
Host->SendResponse(CSR, true);
|
|
|
|
return;
|
|
|
|
|
2019-06-18 16:39:13 +00:00
|
|
|
case 18: // read multiple blocks
|
|
|
|
printf("READ_MULTIPLE_BLOCKS addr=%08X size=%08X\n", param, BlockSize);
|
|
|
|
RWAddress = param;
|
2019-06-19 13:54:07 +00:00
|
|
|
if (OCR & (1<<30))
|
|
|
|
{
|
|
|
|
RWAddress <<= 9;
|
|
|
|
BlockSize = 512;
|
|
|
|
}
|
2019-06-18 16:39:13 +00:00
|
|
|
RWCommand = 18;
|
|
|
|
Host->SendResponse(CSR, true);
|
|
|
|
ReadBlock(RWAddress);
|
|
|
|
RWAddress += BlockSize;
|
2019-06-19 13:26:38 +00:00
|
|
|
SetState(0x05);
|
2019-06-18 16:39:13 +00:00
|
|
|
return;
|
|
|
|
|
2019-06-20 21:05:32 +00:00
|
|
|
case 25: // write multiple blocks
|
|
|
|
printf("WRITE_MULTIPLE_BLOCKS addr=%08X size=%08X\n", param, BlockSize);
|
|
|
|
RWAddress = param;
|
|
|
|
if (OCR & (1<<30))
|
|
|
|
{
|
|
|
|
RWAddress <<= 9;
|
|
|
|
BlockSize = 512;
|
|
|
|
}
|
|
|
|
RWCommand = 25;
|
|
|
|
Host->SendResponse(CSR, true);
|
|
|
|
WriteBlock(RWAddress);
|
|
|
|
RWAddress += BlockSize;
|
|
|
|
SetState(0x06);
|
|
|
|
return;
|
|
|
|
|
2019-06-17 16:40:45 +00:00
|
|
|
case 55: // ??
|
|
|
|
CSR |= (1<<5);
|
|
|
|
Host->SendResponse(CSR, true);
|
|
|
|
return;
|
2019-06-16 15:01:49 +00:00
|
|
|
}
|
|
|
|
|
2019-06-17 16:40:45 +00:00
|
|
|
printf("MMC: unknown CMD %d %08X\n", cmd, param);
|
2019-06-17 11:24:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void DSi_MMCStorage::SendACMD(u8 cmd, u32 param)
|
|
|
|
{
|
2019-06-17 16:40:45 +00:00
|
|
|
switch (cmd)
|
|
|
|
{
|
2019-06-18 12:12:37 +00:00
|
|
|
case 6: // set bus width (TODO?)
|
|
|
|
printf("SET BUS WIDTH %08X\n", param);
|
|
|
|
Host->SendResponse(CSR, true);
|
|
|
|
return;
|
|
|
|
|
|
|
|
case 13: // get SSR
|
|
|
|
Host->SendResponse(CSR, true);
|
2019-06-18 16:39:13 +00:00
|
|
|
Host->SendData(SSR, 64);
|
2019-06-18 12:12:37 +00:00
|
|
|
return;
|
|
|
|
|
2019-06-17 16:40:45 +00:00
|
|
|
case 41: // set operating conditions
|
2019-06-19 13:54:07 +00:00
|
|
|
// CHECKME:
|
|
|
|
// DSi boot2 sets this to 0x40100000 (hardcoded)
|
|
|
|
// then has two codepaths depending on whether bit30 did get set
|
2019-06-19 13:58:50 +00:00
|
|
|
// is it settable at all on the MMC? probably not.
|
|
|
|
if (Internal) param &= ~(1<<30);
|
2019-06-17 16:40:45 +00:00
|
|
|
OCR &= 0xBF000000;
|
|
|
|
OCR |= (param & 0x40FFFFFF);
|
|
|
|
Host->SendResponse(OCR, true);
|
|
|
|
SetState(0x01);
|
|
|
|
return;
|
2019-06-18 12:12:37 +00:00
|
|
|
|
|
|
|
case 42: // ???
|
|
|
|
Host->SendResponse(CSR, true);
|
|
|
|
return;
|
|
|
|
|
|
|
|
case 51: // get SCR
|
|
|
|
Host->SendResponse(CSR, true);
|
2019-06-18 16:39:13 +00:00
|
|
|
Host->SendData(SCR, 8);
|
2019-06-18 12:12:37 +00:00
|
|
|
return;
|
2019-06-17 16:40:45 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
printf("MMC: unknown ACMD %d %08X\n", cmd, param);
|
2019-06-16 15:01:49 +00:00
|
|
|
}
|
2019-06-18 12:12:37 +00:00
|
|
|
|
|
|
|
void DSi_MMCStorage::ContinueTransfer()
|
|
|
|
{
|
2019-06-20 21:20:08 +00:00
|
|
|
if (RWCommand == 0) return;
|
|
|
|
|
2019-06-20 21:05:32 +00:00
|
|
|
switch (RWCommand)
|
|
|
|
{
|
|
|
|
case 18:
|
|
|
|
ReadBlock(RWAddress);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 25:
|
|
|
|
WriteBlock(RWAddress);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2019-06-18 16:39:13 +00:00
|
|
|
RWAddress += BlockSize;
|
|
|
|
}
|
|
|
|
|
2019-06-19 13:54:07 +00:00
|
|
|
void DSi_MMCStorage::ReadBlock(u64 addr)
|
2019-06-18 16:39:13 +00:00
|
|
|
{
|
|
|
|
if (!File) return;
|
|
|
|
|
|
|
|
printf("SD/MMC: reading block @ %08X, len=%08X\n", addr, BlockSize);
|
|
|
|
|
|
|
|
u8 data[0x200];
|
2019-06-20 21:05:32 +00:00
|
|
|
fseek(File, addr, SEEK_SET);
|
2019-06-18 16:39:13 +00:00
|
|
|
fread(data, 1, BlockSize, File);
|
|
|
|
Host->SendData(data, BlockSize);
|
2019-06-18 12:12:37 +00:00
|
|
|
}
|
2019-06-20 21:05:32 +00:00
|
|
|
|
|
|
|
void DSi_MMCStorage::WriteBlock(u64 addr)
|
|
|
|
{
|
|
|
|
if (!File) return;
|
|
|
|
|
|
|
|
printf("SD/MMC: write block @ %08X, len=%08X\n", addr, BlockSize);
|
|
|
|
|
|
|
|
u8 data[0x200];
|
|
|
|
Host->ReceiveData(data, BlockSize);
|
|
|
|
fseek(File, addr, SEEK_SET);
|
|
|
|
fwrite(data, 1, BlockSize, File);
|
|
|
|
}
|