add AES, fix a bunch of bugs
we're getting an error screen! wee
This commit is contained in:
Arisotura
parent
f0131cfac9
commit
81dde71eba
37
src/ARM.cpp
37
src/ARM.cpp
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@ -239,36 +239,6 @@ void ARMv4::JumpTo(u32 addr, bool restorecpsr)
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else addr &= ~0x1;
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}
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/*if (addr==0x037D4668) printf("MYSTERY START\n");
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if (addr==0x037CA71C) printf("MYSTERY END\n");
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if (addr==0x037CCD68) printf("atomic_store %08X %08X, %08X\n", R[0], R[1], R[15]);
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if (addr==0x037CDD00) printf("zog %08X\n", R[15]);*/
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/*if (addr==0x037CDC00) printf("sendcmd %08X %08X\n", R[0], R[15]);
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if (addr==0x037CA700) printf("prepare CID, %08X\n", R[15]);
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if(addr==0x037D4498) printf("READ SHITTY FIFO. %08X\n", R[15]);
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if (addr==0x037CCD68) printf("atomic_store %08X %08X, %08X\n", R[0], R[1], R[15]);
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if (addr>=0x037CEE00 && addr<=0x037CEE30) printf("shitty loop: %08X->%08X\n", R[15], addr);
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if (R[15]==0x037CCD8C) printf("BERG!!! %08X\n", addr);
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if (addr==0x037CD600) printf("XFER IRQ HANDLER\n");
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if (R[15]==0x037CD62C) printf("TERRIBLE HANDLER: %08X\n", addr);
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if (addr==0x037CCE24) printf("SD IRQ HANDLER\n");
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if (addr==0x037CCD94) printf("atomic_load %08X %08X, %08X\n", R[0], R[1], R[15]);
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if (addr==0x037CEB7C) printf("CHECK CSR RESULT. %08X %08X %08X, %08X\n", R[0], R[1], R[2], R[15]);
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if (R[15]==0x037CEC6C) printf("RETURN FROM CSR CHECK: %08X %08X\n", R[0], R[3]+0x38);
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if (addr==0x037CB2AC) printf("ZOG!\n");
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if (addr==0x037CB2A0) printf("GONP %08X %08X, %08X\n", R[1]+0x28, R[3]+0x34, R[15]);
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if (addr==0x037CCFC0) printf("SDMMC TIMEOUT. %08X\n", R[15]);
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if (addr==0x037D68A8) printf("BARKBARKBARK. %08X\n", R[15]);
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if (addr==0x037CCF04) printf("BAKAAA\n");
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if (addr==0x037D6988) printf("MORPMORPMORPMORPMORPMORPMORPMORPMORP %08X\n", R[15]);
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if (addr==0x37D6904) printf("TIMEOUT FARTORED! %08X, %08X %08X, %08X\n", R[4], R[3], R[12], R[15]);
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// TIMEOUT FARTORED! 037E89B8, 00000000 00200BFB, 037D68FC
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if (addr==0x037CD660) printf("BRAAAAAAAAAAAP %08X\n", R[15]);
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if (addr==0x037CD798) printf("BRAAPP SHATORED. %08X, %08X %08X\n", R[0], R[1], R[2]);
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if (addr==0x037CCD34) printf("atomic_and %08X %08X, %08X\n", R[0], R[1], R[15]);*/
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// atomic_and 0400481C 0000FFE7, 037CD850
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u32 oldregion = R[15] >> 23;
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u32 newregion = addr >> 23;
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@ -607,13 +577,6 @@ void ARMv4::Execute()
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}
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else
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AddCycles_C();
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/*if (R[15]==0x037CEE18) printf("SHITTY POINTER = %08X\n", R[0]+0x34);
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if (R[15]==0x037CEE1C) printf("SHITTY FLAG = %08X\n", R[0]);
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if (R[15]==0x037D68F0) printf("TIMESTAMP THING = %08X:%08X, CUR=%08X:%08X, ptr=%08X\n",
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R[3], R[12], R[1], R[0], R[4]);
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//if (R[15]==0x037CB29C) printf("GLORG!!! %08X\n", R[3]+0x34); 037E8A8C
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if (R[15]==0x037CD730) printf("COUNT OF SHITO. %08X %08X\n", R[0], R[2]);*/
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}
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// TODO optimize this shit!!!
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55
src/DSi.cpp
55
src/DSi.cpp
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@ -28,6 +28,7 @@
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#include "DSi_NDMA.h"
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#include "DSi_I2C.h"
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#include "DSi_SD.h"
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#include "DSi_AES.h"
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namespace NDS
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@ -71,6 +72,7 @@ u8 eMMC_CID[16];
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bool Init()
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{
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if (!DSi_I2C::Init()) return false;
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if (!DSi_AES::Init()) return false;
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NDMAs[0] = new DSi_NDMA(0, 0);
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NDMAs[1] = new DSi_NDMA(0, 1);
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@ -90,6 +92,7 @@ bool Init()
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void DeInit()
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{
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DSi_I2C::DeInit();
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DSi_AES::DeInit();
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for (int i = 0; i < 8; i++) delete NDMAs[i];
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@ -110,6 +113,7 @@ void Reset()
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for (int i = 0; i < 8; i++) NDMAs[i]->Reset();
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DSi_I2C::Reset();
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DSi_AES::Reset();
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SDMMC->Reset();
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SDIO->Reset();
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@ -336,6 +340,24 @@ bool NDMAsRunning(u32 cpu)
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return false;
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}
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void CheckNDMAs(u32 cpu, u32 mode)
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{
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cpu <<= 2;
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NDMAs[cpu+0]->StartIfNeeded(mode);
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NDMAs[cpu+1]->StartIfNeeded(mode);
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NDMAs[cpu+2]->StartIfNeeded(mode);
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NDMAs[cpu+3]->StartIfNeeded(mode);
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}
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void StopNDMAs(u32 cpu, u32 mode)
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{
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cpu <<= 2;
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NDMAs[cpu+0]->StopIfNeeded(mode);
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NDMAs[cpu+1]->StopIfNeeded(mode);
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NDMAs[cpu+2]->StopIfNeeded(mode);
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NDMAs[cpu+3]->StopIfNeeded(mode);
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}
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// new WRAM mapping
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// TODO: find out what happens upon overlapping slots!!
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@ -1097,6 +1119,9 @@ u32 ARM7IORead32(u32 addr)
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case 0x04004168: return NDMAs[7]->SubblockTimer;
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case 0x0400416C: return NDMAs[7]->FillData;
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case 0x04004170: return NDMAs[7]->Cnt;
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case 0x04004400: return DSi_AES::ReadCnt();
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case 0x0400440C: return DSi_AES::ReadOutputFIFO();
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}
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if (addr >= 0x04004800 && addr < 0x04004A00)
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@ -1182,6 +1207,36 @@ void ARM7IOWrite32(u32 addr, u32 val)
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case 0x04004168: NDMAs[7]->SubblockTimer = val & 0x0003FFFF; return;
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case 0x0400416C: NDMAs[7]->FillData = val; return;
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case 0x04004170: NDMAs[7]->WriteCnt(val); return;
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case 0x04004400: DSi_AES::WriteCnt(val); return;
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case 0x04004404: DSi_AES::WriteBlkCnt(val); return;
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case 0x04004408: DSi_AES::WriteInputFIFO(val); return;
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}
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if (addr >= 0x04004420 && addr < 0x04004430)
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{
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addr -= 0x04004420;
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DSi_AES::WriteIV(addr, val, 0xFFFFFFFF);
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return;
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}
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if (addr >= 0x04004430 && addr < 0x04004440)
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{
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addr -= 0x04004430;
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DSi_AES::WriteMAC(addr, val, 0xFFFFFFFF);
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return;
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}
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if (addr >= 0x04004440 && addr < 0x04004500)
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{
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addr -= 0x04004440;
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int n = 0;
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while (addr > 0x30) { addr -= 0x30; n++; }
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switch (addr >> 4)
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{
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case 0: DSi_AES::WriteKeyNormal(n, addr&0xF, val, 0xFFFFFFFF); return;
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case 1: DSi_AES::WriteKeyX(n, addr&0xF, val, 0xFFFFFFFF); return;
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case 2: DSi_AES::WriteKeyY(n, addr&0xF, val, 0xFFFFFFFF); return;
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}
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}
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if (addr >= 0x04004800 && addr < 0x04004A00)
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@ -26,6 +26,7 @@ namespace DSi
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{
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extern u8 eMMC_CID[16];
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extern u64 ConsoleID;
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extern DSi_SDHost* SDMMC;
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extern DSi_SDHost* SDIO;
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@ -41,6 +42,8 @@ bool LoadNAND();
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void RunNDMAs(u32 cpu);
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void StallNDMAs();
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bool NDMAsRunning(u32 cpu);
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void CheckNDMAs(u32 cpu, u32 mode);
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void StopNDMAs(u32 cpu, u32 mode);
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void MapNWRAM_A(u32 num, u8 val);
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void MapNWRAM_B(u32 num, u8 val);
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303
src/DSi_AES.cpp
303
src/DSi_AES.cpp
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@ -15,3 +15,306 @@
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You should have received a copy of the GNU General Public License along
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with melonDS. If not, see http://www.gnu.org/licenses/.
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*/
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#include <stdio.h>
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#include <string.h>
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#include "DSi.h"
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#include "DSi_AES.h"
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#include "FIFO.h"
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#include "tiny-AES-c/aes.hpp"
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namespace DSi_AES
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{
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u32 Cnt;
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u32 BlkCnt;
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u32 RemBlocks;
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u32 InputDMASize, OutputDMASize;
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u32 AESMode;
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FIFO<u32>* InputFIFO;
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FIFO<u32>* OutputFIFO;
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u8 IV[16];
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u8 KeyNormal[4][16];
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u8 KeyX[4][16];
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u8 KeyY[4][16];
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u8 CurKey[16];
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AES_ctx Ctx;
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void Swap16(u8* dst, u8* src)
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{
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for (int i = 0; i < 16; i++)
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dst[i] = src[15-i];
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}
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void ROL16(u8* val, u32 n)
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{
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u32 n_coarse = n >> 3;
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u32 n_fine = n & 7;
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u8 tmp[16];
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for (u32 i = 0; i < 16; i++)
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{
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tmp[i] = val[(i - n_coarse) & 0xF];
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}
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for (u32 i = 0; i < 16; i++)
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{
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val[i] = (tmp[i] << n_fine) | (tmp[(i - 1) & 0xF] >> (8-n_fine));
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}
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}
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#define _printhex(str, size) { for (int z = 0; z < (size); z++) printf("%02X", (str)[z]); printf("\n"); }
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bool Init()
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{
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InputFIFO = new FIFO<u32>(16);
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OutputFIFO = new FIFO<u32>(16);
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const u8 zero[16] = {0};
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AES_init_ctx_iv(&Ctx, zero, zero);
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return true;
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}
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void DeInit()
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{
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delete InputFIFO;
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delete OutputFIFO;
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}
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void Reset()
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{
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Cnt = 0;
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BlkCnt = 0;
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RemBlocks = 0;
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InputDMASize = 0;
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OutputDMASize = 0;
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AESMode = 0;
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InputFIFO->Clear();
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OutputFIFO->Clear();
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memset(KeyNormal, 0, sizeof(KeyNormal));
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memset(KeyX, 0, sizeof(KeyX));
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memset(KeyY, 0, sizeof(KeyY));
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memset(CurKey, 0, sizeof(CurKey));
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// initialize keys, as per GBAtek
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// slot 3: console-unique eMMC crypto
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*(u32*)&KeyX[3][0] = (u32)DSi::ConsoleID;
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*(u32*)&KeyX[3][4] = (u32)DSi::ConsoleID ^ 0x24EE6906;
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*(u32*)&KeyX[3][8] = (u32)(DSi::ConsoleID >> 32) ^ 0xE65B601D;
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*(u32*)&KeyX[3][12] = (u32)(DSi::ConsoleID >> 32);
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*(u32*)&KeyY[3][0] = 0x0AB9DC76;
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*(u32*)&KeyY[3][4] = 0xBD4DC4D3;
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*(u32*)&KeyY[3][8] = 0x202DDD1D;
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}
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void ProcessBlock_CTR()
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{
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u8 data[16];
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u8 data_rev[16];
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*(u32*)&data[0] = InputFIFO->Read();
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*(u32*)&data[4] = InputFIFO->Read();
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*(u32*)&data[8] = InputFIFO->Read();
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*(u32*)&data[12] = InputFIFO->Read();
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//printf("AES-CTR: INPUT: "); _printhex(data, 16);
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Swap16(data_rev, data);
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AES_CTR_xcrypt_buffer(&Ctx, data_rev, 16);
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Swap16(data, data_rev);
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//printf("AES-CTR: OUTPUT: "); _printhex(data, 16);
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OutputFIFO->Write(*(u32*)&data[0]);
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OutputFIFO->Write(*(u32*)&data[4]);
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OutputFIFO->Write(*(u32*)&data[8]);
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OutputFIFO->Write(*(u32*)&data[12]);
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}
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u32 ReadCnt()
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{
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u32 ret = Cnt;
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ret |= InputFIFO->Level();
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ret |= (OutputFIFO->Level() << 5);
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return ret;
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}
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void WriteCnt(u32 val)
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{
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u32 oldcnt = Cnt;
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Cnt = val & 0xFC1FF000;
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if (val & (1<<10)) InputFIFO->Clear();
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if (val & (1<<11)) OutputFIFO->Clear();
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u32 dmasize[4] = {4, 8, 12, 16};
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InputDMASize = dmasize[3 - ((val >> 12) & 0x3)];
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OutputDMASize = dmasize[(val >> 14) & 0x3];
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AESMode = (val >> 28) & 0x3;
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if (AESMode < 2) printf("AES-CCM TODO\n");
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if (val & (1<<24))
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{
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u32 slot = (val >> 26) & 0x3;
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memcpy(CurKey, KeyNormal[slot], 16);
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//printf("AES: key(%d): ", slot); _printhex(CurKey, 16);
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u8 tmp[16];
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Swap16(tmp, CurKey);
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AES_init_ctx(&Ctx, tmp);
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}
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if (!(oldcnt & (1<<31)) && (val & (1<<31)))
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{
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// transfer start (checkme)
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RemBlocks = BlkCnt >> 16;
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}
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printf("AES CNT: %08X / mode=%d inDMA=%d outDMA=%d blocks=%d\n",
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val, AESMode, InputDMASize, OutputDMASize, RemBlocks);
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}
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void WriteBlkCnt(u32 val)
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{
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BlkCnt = val;
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}
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u32 ReadOutputFIFO()
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{
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return OutputFIFO->Read();
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}
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void WriteInputFIFO(u32 val)
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{
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// TODO: add some delay to processing
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InputFIFO->Write(val);
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if (!(Cnt & (1<<31))) return;
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while (InputFIFO->Level() >= 4 && RemBlocks > 0)
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{
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switch (AESMode)
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{
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case 2:
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case 3: ProcessBlock_CTR(); break;
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default:
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// dorp
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OutputFIFO->Write(InputFIFO->Read());
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OutputFIFO->Write(InputFIFO->Read());
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OutputFIFO->Write(InputFIFO->Read());
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OutputFIFO->Write(InputFIFO->Read());
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}
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RemBlocks--;
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}
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if (OutputFIFO->Level() >= OutputDMASize)
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{
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// trigger DMA
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DSi::CheckNDMAs(1, 0x2B);
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}
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// TODO: DMA the other way around
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if (RemBlocks == 0)
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{
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Cnt &= ~(1<<31);
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if (Cnt & (1<<30)) NDS::SetIRQ2(NDS::IRQ2_DSi_AES);
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}
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}
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void WriteIV(u32 offset, u32 val, u32 mask)
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{
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u32 old = *(u32*)&IV[offset];
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*(u32*)&IV[offset] = (old & ~mask) | (val & mask);
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//printf("AES: IV: "); _printhex(IV, 16);
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u8 tmp[16];
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Swap16(tmp, IV);
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AES_ctx_set_iv(&Ctx, tmp);
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}
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void WriteMAC(u32 offset, u32 val, u32 mask)
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{
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//
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}
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void DeriveNormalKey(u32 slot)
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{
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const u8 key_const[16] = {0xFF, 0xFE, 0xFB, 0x4E, 0x29, 0x59, 0x02, 0x58, 0x2A, 0x68, 0x0F, 0x5F, 0x1A, 0x4F, 0x3E, 0x79};
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u8 tmp[16];
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//printf("keyX: "); _printhex(KeyX[slot], 16);
|
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//printf("keyY: "); _printhex(KeyY[slot], 16);
|
||||
|
||||
for (int i = 0; i < 16; i++)
|
||||
tmp[i] = KeyX[slot][i] ^ KeyY[slot][i];
|
||||
|
||||
u32 carry = 0;
|
||||
for (int i = 0; i < 16; i++)
|
||||
{
|
||||
u32 res = tmp[i] + key_const[15-i] + carry;
|
||||
tmp[i] = res & 0xFF;
|
||||
carry = res >> 8;
|
||||
}
|
||||
|
||||
ROL16(tmp, 42);
|
||||
|
||||
//printf("derive normalkey %d\n", slot); _printhex(tmp, 16);
|
||||
|
||||
memcpy(KeyNormal[slot], tmp, 16);
|
||||
}
|
||||
|
||||
void WriteKeyNormal(u32 slot, u32 offset, u32 val, u32 mask)
|
||||
{
|
||||
u32 old = *(u32*)&KeyNormal[slot][offset];
|
||||
|
||||
*(u32*)&KeyNormal[slot][offset] = (old & ~mask) | (val & mask);
|
||||
}
|
||||
|
||||
void WriteKeyX(u32 slot, u32 offset, u32 val, u32 mask)
|
||||
{
|
||||
u32 old = *(u32*)&KeyX[slot][offset];
|
||||
|
||||
*(u32*)&KeyX[slot][offset] = (old & ~mask) | (val & mask);
|
||||
}
|
||||
|
||||
void WriteKeyY(u32 slot, u32 offset, u32 val, u32 mask)
|
||||
{
|
||||
u32 old = *(u32*)&KeyY[slot][offset];
|
||||
|
||||
*(u32*)&KeyY[slot][offset] = (old & ~mask) | (val & mask);
|
||||
|
||||
if (offset >= 0xC)
|
||||
{
|
||||
DeriveNormalKey(slot);
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,6 +19,30 @@
|
|||
#ifndef DSI_AES_H
|
||||
#define DSI_AES_H
|
||||
|
||||
//
|
||||
#include "types.h"
|
||||
|
||||
namespace DSi_AES
|
||||
{
|
||||
|
||||
extern u32 Cnt;
|
||||
|
||||
bool Init();
|
||||
void DeInit();
|
||||
void Reset();
|
||||
|
||||
u32 ReadCnt();
|
||||
void WriteCnt(u32 val);
|
||||
void WriteBlkCnt(u32 val);
|
||||
|
||||
u32 ReadOutputFIFO();
|
||||
void WriteInputFIFO(u32 val);
|
||||
|
||||
void WriteIV(u32 offset, u32 val, u32 mask);
|
||||
void WriteMAC(u32 offset, u32 val, u32 mask);
|
||||
void WriteKeyNormal(u32 slot, u32 offset, u32 val, u32 mask);
|
||||
void WriteKeyX(u32 slot, u32 offset, u32 val, u32 mask);
|
||||
void WriteKeyY(u32 slot, u32 offset, u32 val, u32 mask);
|
||||
|
||||
}
|
||||
|
||||
#endif // DSI_AES_H
|
||||
|
|
|
|||
|
|
@ -99,7 +99,8 @@ void DSi_NDMA::WriteCnt(u32 val)
|
|||
if ((StartMode & 0x1F) == 0x10)
|
||||
Start();
|
||||
|
||||
if (StartMode != 0x10 && StartMode != 0x30)
|
||||
if (StartMode != 0x10 && StartMode != 0x30 &&
|
||||
StartMode != 0x2B)
|
||||
printf("UNIMPLEMENTED ARM%d NDMA%d START MODE %02X, %08X->%08X\n", CPU?7:9, Num, StartMode, SrcAddr, DstAddr);
|
||||
}
|
||||
}
|
||||
|
|
@ -223,16 +224,19 @@ void DSi_NDMA::Run9()
|
|||
}
|
||||
|
||||
if ((StartMode & 0x1F) == 0x10) // CHECKME
|
||||
{
|
||||
Cnt &= ~(1<<31);
|
||||
if (Cnt & (1<<30)) NDS::SetIRQ(0, NDS::IRQ_DSi_NDMA0 + Num);
|
||||
}
|
||||
else if (!(Cnt & (1<<29)))
|
||||
{
|
||||
if (TotalRemCount == 0)
|
||||
{
|
||||
Cnt &= ~(1<<31);
|
||||
if (Cnt & (1<<30)) NDS::SetIRQ(0, NDS::IRQ_DSi_NDMA0 + Num);
|
||||
}
|
||||
}
|
||||
|
||||
if (Cnt & (1<<30))
|
||||
NDS::SetIRQ(0, NDS::IRQ_DSi_NDMA0 + Num);
|
||||
|
||||
Running = 0;
|
||||
InProgress = false;
|
||||
NDS::ResumeCPU(0, 1<<(Num+4));
|
||||
|
|
@ -305,16 +309,19 @@ void DSi_NDMA::Run7()
|
|||
}
|
||||
|
||||
if ((StartMode & 0x1F) == 0x10) // CHECKME
|
||||
{
|
||||
Cnt &= ~(1<<31);
|
||||
if (Cnt & (1<<30)) NDS::SetIRQ(1, NDS::IRQ_DSi_NDMA0 + Num);
|
||||
}
|
||||
else if (!(Cnt & (1<<29)))
|
||||
{
|
||||
if (TotalRemCount == 0)
|
||||
{
|
||||
Cnt &= ~(1<<31);
|
||||
if (Cnt & (1<<30)) NDS::SetIRQ(1, NDS::IRQ_DSi_NDMA0 + Num);
|
||||
}
|
||||
}
|
||||
|
||||
if (Cnt & (1<<30))
|
||||
NDS::SetIRQ(1, NDS::IRQ_DSi_NDMA0 + Num);
|
||||
|
||||
Running = 0;
|
||||
InProgress = false;
|
||||
NDS::ResumeCPU(1, 1<<(Num+4));
|
||||
|
|
|
|||
|
|
@ -473,10 +473,10 @@ void DSi_MMCStorage::SendCMD(u8 cmd, u32 param)
|
|||
|
||||
case 2:
|
||||
case 10: // get CID
|
||||
Host->SendResponse(*(u32*)&CID[0], false);
|
||||
Host->SendResponse(*(u32*)&CID[1], false);
|
||||
Host->SendResponse(*(u32*)&CID[2], false);
|
||||
Host->SendResponse(*(u32*)&CID[3], true);
|
||||
Host->SendResponse(*(u32*)&CID[12], false);
|
||||
Host->SendResponse(*(u32*)&CID[8], false);
|
||||
Host->SendResponse(*(u32*)&CID[4], false);
|
||||
Host->SendResponse(*(u32*)&CID[0], true);
|
||||
//if (cmd == 2) SetState(0x02);
|
||||
return;
|
||||
|
||||
|
|
@ -502,13 +502,18 @@ void DSi_MMCStorage::SendCMD(u8 cmd, u32 param)
|
|||
return;
|
||||
|
||||
case 9: // get CSD
|
||||
Host->SendResponse(*(u32*)&CSD[0], false);
|
||||
Host->SendResponse(*(u32*)&CSD[1], false);
|
||||
Host->SendResponse(*(u32*)&CSD[2], false);
|
||||
Host->SendResponse(*(u32*)&CSD[3], true);
|
||||
Host->SendResponse(*(u32*)&CSD[12], false);
|
||||
Host->SendResponse(*(u32*)&CSD[8], false);
|
||||
Host->SendResponse(*(u32*)&CSD[4], false);
|
||||
Host->SendResponse(*(u32*)&CSD[0], true);
|
||||
return;
|
||||
|
||||
case 12: // stop operation
|
||||
// TODO
|
||||
Host->SendResponse(CSR, true);
|
||||
return;
|
||||
|
||||
case 13: // get status
|
||||
Host->SendResponse(CSR, true);
|
||||
return;
|
||||
|
||||
|
|
|
|||
|
|
@ -1582,12 +1582,12 @@ void debug(u32 param)
|
|||
printf("ARM7 PC=%08X LR=%08X %08X\n", ARM7->R[15], ARM7->R[14], ARM7->R_IRQ[1]);
|
||||
|
||||
printf("ARM9 IME=%08X IE=%08X IF=%08X\n", IME[0], IE[0], IF[0]);
|
||||
printf("ARM7 IME=%08X IE=%08X IF=%08X\n", IME[1], IE[1], IF[1]);
|
||||
printf("ARM7 IME=%08X IE=%08X IF=%08X IE2=%04X IF2=%04X\n", IME[1], IE[1], IF[1], IE2, IF2);
|
||||
|
||||
//for (int i = 0; i < 9; i++)
|
||||
// printf("VRAM %c: %02X\n", 'A'+i, GPU::VRAMCNT[i]);
|
||||
|
||||
FILE*
|
||||
/*FILE*
|
||||
shit = fopen("debug/card.bin", "wb");
|
||||
for (u32 i = 0x02000000; i < 0x02400000; i+=4)
|
||||
{
|
||||
|
|
@ -1599,7 +1599,7 @@ void debug(u32 param)
|
|||
u32 val = ARM7Read32(i);
|
||||
fwrite(&val, 4, 1, shit);
|
||||
}
|
||||
fclose(shit);
|
||||
fclose(shit);*/
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue