Commit Graph

8 Commits

Author SHA1 Message Date
Flyinghead 3dd16e80d2 arm64 and x64 recs use ssa regalloc 2019-06-10 13:57:10 +02:00
Flyinghead 75a04d6d28 arm64 dynarec: implement tail calling and block linking 2019-01-22 18:37:04 +01:00
Flyinghead cb8e81d473 arm64: direct memory access and jit rewrite
generates direct vmem read & write accesses
trap sigsegv and rewrite using slow path
add w29 to allocatable registers
get rid of literals and use pc-rel branching
minor optimizations and cleanup
2019-01-16 13:04:16 +01:00
Flyinghead c2a048e8d8 arm64: use explode_spans to allocate regs for V2 and F64 params 2019-01-15 08:47:07 +01:00
Flyinghead 523b110412 arm64: dynarec fixes 2019-01-13 11:32:28 +01:00
Flyinghead e5ee48efa9 arm64: implement swaplb and pref. Various optimizations 2019-01-11 15:58:48 +01:00
Flyinghead 18a16f83ac arm64: more native opcodes implemented 2019-01-10 18:58:29 +01:00
Flyinghead a9a2aad8f6 arm64: use register spans allocation. Implement some opcodes natively 2019-01-09 16:35:23 +01:00