flycast

Commit Graph

Author	SHA1	Message	Date
Flyinghead	93ae9d0375	sh4: refactor interpreter and recompiler with Sh4Executor interface	2024-11-07 18:14:18 +01:00
scribam	b840a4f477	windows: fix unit tests	2024-06-01 19:05:23 +02:00
scribam	d8137a967c	C++17 (#926 ) * cmake: use c++17 * Use std::size * Use std::make_unique * Use std::clamp * Use structured binding * Use [[fallthrough]] * Use enable_if_t/is_enum_v/is_integral_v/is_same_v * Use if constexpr * Use try_emplace * Use auto for iterators * Use inline variables	2023-02-18 13:24:34 +01:00
Flyinghead	b1479e6e34	aica: use namespaces, simplify api, handle serialization Rename VArray2 to RamRegion. Add alloc(), free(), setRegion() and de/serialize()	2023-01-30 10:40:07 +01:00
Flyinghead	143073b61d	rename _vmem to addrspace and move platform vmem stuff to virtmem ns use namespaces simplify names no functional changes	2023-01-29 18:48:33 +01:00
Flyinghead	99bf7f77c4	single-threaded mode. refactoring. single-threaded mode similar to libretro core stateful Emulator object disable memory watcher when !gppo ggpo: poll input as late as possible in !threaded	2021-09-29 10:22:58 +02:00
Flyinghead	00a74d81c2	aica arm dynarec: conditional LDR with write back issue	2021-05-16 20:21:09 +02:00
Flyinghead	521d69f5e0	aicaarm: get rid of inline and source assembler	2021-02-15 18:47:09 +01:00
Flyinghead	c4cb055e3f	fix tests and macOS build	2021-02-14 19:34:26 +01:00
Flyinghead	89fe36b881	arm7 rec: lr wasn't updated in conditional bl missing changes for previous arm64rec commit more aica arm tests wince vmem handler now uses direct ram access	2021-01-31 12:02:20 +01:00
Flyinghead	3bd34e1d9b	fix aica arm test	2021-01-29 11:40:18 +01:00
Flyinghead	882e14f13f	aica: x64 jit for arm aica arm x86: use pc-relative addressing to access arm registers OSX project fix arm7: add simple ldm/stm handling. optimize arm32 and x64 recs update CMakeLists.txt and Makefile. finish rebase	2021-01-26 21:32:43 +01:00

12 Commits