Use double for canonical FIPR and FTRV on all platforms.
Fix interpreter implementation of FTRC.
Fix canonical implementation of cvt_f2i (FTRC).
arm32: use Vfma instead of Vmla for FMAC. Vfma does not a fused
muliply-add, Vmla doesn't.
arm32: Use canonical implementations of FIPR and FTRV.
arm32,arm64: Correct implemetation of cvt_f2i (FTRC)
Fixes desync with NBA 2k1/2k2 online games.
AppleClang doesn't mask the operand in the callee. This must be done in
the dynarec.
See 6115a918b2
Tentative fix for barcode reader not working on macOS/arm
The sh4 cpu is stopped/restarted during a soft reset, and dynarec code
reset (arm64, arm, x86). If the emulator is stopped concurrently, the
call may hang. Use a mutex-protected method to restart the cpu only if
the emu is still running.
`sh4_core.h` has defines for symbols like `r` and `pr` which conflict with the variable names in `arm64_unwind.h` and cause even deeper errors over in `wingdi.h(4954)` and `wincrypt.h(4741)`.
Swapping the include order avoids this collision.
dynarec: use double to implement fipr and ftrv except on arm32
interpreter: always use double for fipr and ftrv
fsrra: perform division before square root
fmac: use std::fma or native fma op
get rid of unused dynarec op shop_swap
ssa: dead register pass must assume interpreter fallback modifies all
registers
ssa: replace reg+0 address by reg in constant propagation pass
decoder: replace address offset 0 by null param for indexed mem access
Fixes crash with doa2a and doa2m and some atomiswave conversions.
Regression due to b47f4f56ef
Fixes MINIDUMP-1TY, MINIDUMP-1TD, MINIDUMP-16Q, MINIDUMP-1AC
Handle case where mov64 must swap its operands depending on register
allocation.
Fix canonical call for FSCA when return operands are register-allocated.
Issue #1020
arm, arm64, x86: only account for current block cycles if block is
executed. Test cycle_counter before updating it.
arm, arm64: use function for mmu block check (vaddr and FPU ops) to
reduce host code size per block.
Eliminate duplicate code for immediate memory read/write in all dynarecs
Simplify PREF to use do_sqw_nommu even for simple SQ remap
Check for address errors before mmu translation
Get rid of unneeded template params in mmu translation funcs
* cmake: use c++17
* Use std::size
* Use std::make_unique
* Use std::clamp
* Use structured binding
* Use [[fallthrough]]
* Use enable_if_t/is_enum_v/is_integral_v/is_same_v
* Use if constexpr
* Use try_emplace
* Use auto for iterators
* Use inline variables
Option to reg alloc 64-bit regs in two host regs. Used when FPSCR.SZ ==
1 (64-bit reg and memory transfers.) Enabled for arm, arm64 and x64
(windows only) dynarecs.
Don't fallback to interpreter when FPSCR.PR==1 (double precision) for
FMOV, FLDS and FLTS.
Do not attempt to reserve 4GM of virtual space on 64-bit hosts. Use
512MB everywhere.
Don't map elan RAM if not needed and dont protect/unprotect it in
memwatch.
scheduler reset and unregister
schedule requests during reset(), not init()
preserve cntx.sh4_sched_next on sh4 reset
Use cntx.cycle_counter in dynarecs and interpreter
Fixes Confidential Mission hang at boot with HLE
Close naomi/aw cart on reset. Reset input mapping/button names
Get rid of ngen_GetFeatures()
throw exception instead of failing verify if not internal error
catch sh4 exceptions in dynarecs and throw fatal error
* Add audio arm64 cpp into Xcode project
* Build universal binary for SDL2 also
* Add vixl aarch64 dependency + build arm64 in cmake
* hardcode pagesize for M1 CPU
* Use `MAP_JIT` and toggle between RX and RW
* add pthread.h for cmake
* Disable audio dynarec temporary
* Enable aica arm dynarec
* Supports `br` with condition
* Dynamic linker flag for libSDL2.a since Homebrew path is different on arm (for xcodeproj)
* Fallback path for Intel
* de-dup for arm64, allow cross compilation on both Intel and Apple Silicon Mac
* Rename WriteProtect() to JITWriteProtect(), Move JITWriteProtect from arm7_rec to arm7_rec_arm64
* Remove CodeCache memset
* Remove keyboard_device.cpp from xcodeproj
* Use hard tab
* Update libchdr to support compiling on M1 (thanks @scribam)