UNIF BMC 12 IN 1 - fixed with correct hardwre info, new "12-in-1" dump is working now
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@ -18,42 +18,44 @@
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* 7-in-1 Darkwing Duck, Snake, MagicBlock (PCB marked as "12 in 1")
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* 12-in-1 1991 New Star Co. Ltd.
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*
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*/
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#include "mapinc.h"
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static uint8 reg[4];
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static uint8 prgchr[2], ctrl;
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static SFORMAT StateRegs[] =
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{
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{ reg, 4, "REGS" },
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{ prgchr, 2, "REGS" },
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{ &ctrl, 1, "CTRL" },
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{ 0 }
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};
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static void Sync(void) {
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uint8 bank = (reg[3] & 3) << 3;
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setchr4(0x0000, (reg[1] >> 3) | (bank << 2));
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setchr4(0x1000, (reg[2] >> 3) | (bank << 2));
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if (reg[3] & 8) {
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setprg32(0x8000, ((reg[2] & 7) >> 1) | bank);
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uint8 bank = (ctrl & 3) << 3;
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setchr4(0x0000, (prgchr[0] >> 3) | (bank << 2));
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setchr4(0x1000, (prgchr[1] >> 3) | (bank << 2));
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if (ctrl & 8) {
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setprg16(0x8000, bank | (prgchr[0] & 6) | 0); // actually, both 0 and 1 registers used, but they will switch each PA12 transition
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setprg16(0xc000, bank | (prgchr[0] & 6) | 1); // if bits are different for both registers, so they must be programmed strongly the same!
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} else {
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setprg16(0x8000, (reg[1] & 7) | bank);
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setprg16(0xc000, 7 | bank);
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setprg16(0x8000, bank | (prgchr[0] & 7));
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setprg16(0xc000, bank | 7 );
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}
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setmirror(((reg[3] & 4) >> 2) ^ 1);
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setmirror(((ctrl & 4) >> 2) ^ 1);
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}
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static DECLFW(BMC12IN1Write) {
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switch (A) {
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case 0xafff: reg[0] = V; break;
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case 0xbfff: reg[1] = V; break;
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case 0xdfff: reg[2] = V; break;
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case 0xefff: reg[3] = V; break;
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switch (A & 0xE000) {
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case 0xA000: prgchr[0] = V; Sync(); break;
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case 0xC000: prgchr[1] = V; Sync(); break;
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case 0xE000: ctrl = V & 0x0F; Sync(); break;
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}
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Sync();
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}
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static void BMC12IN1Power(void) {
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reg[0] = reg[1] = reg[2] = reg[3] = 0;
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prgchr[0] = prgchr[1] = ctrl = 0;
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Sync();
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SetReadHandler(0x8000, 0xFFFF, CartBR);
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SetWriteHandler(0x8000, 0xFFFF, BMC12IN1Write);
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@ -68,3 +70,4 @@ void BMC12IN1_Init(CartInfo *info) {
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GameStateRestore = StateRestore;
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AddExState(&StateRegs, ~0, 0, 0);
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}
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