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UNIF BMC 12 IN 1 - fixed with correct hardwre info, new "12-in-1" dump is working now

This commit is contained in:
CaH4e3 2013-11-08 18:49:44 +00:00
parent c78892ea15
commit d98397ecc1
1 changed files with 21 additions and 18 deletions
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39
trunk/src/boards/12in1.cpp
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@ -17,43 +17,45 @@
* along with this program; if not, write to the Free Software * along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
* *
* 7-in-1 Darkwing Duck, Snake, MagicBlock (PCB marked as "12 in 1") * 7-in-1 Darkwing Duck, Snake, MagicBlock (PCB marked as "12 in 1")
* 12-in-1 1991 New Star Co. Ltd.
*
*/ */
#include "mapinc.h" #include "mapinc.h"
static uint8 reg[4]; static uint8 prgchr[2], ctrl;
static SFORMAT StateRegs[] = static SFORMAT StateRegs[] =
{ {
{ reg, 4, "REGS" }, { prgchr, 2, "REGS" },
{ &ctrl, 1, "CTRL" },
{ 0 } { 0 }
}; };
static void Sync(void) { static void Sync(void) {
uint8 bank = (reg[3] & 3) << 3; uint8 bank = (ctrl & 3) << 3;
setchr4(0x0000, (reg[1] >> 3) | (bank << 2)); setchr4(0x0000, (prgchr[0] >> 3) | (bank << 2));
setchr4(0x1000, (reg[2] >> 3) | (bank << 2)); setchr4(0x1000, (prgchr[1] >> 3) | (bank << 2));
if (reg[3] & 8) { if (ctrl & 8) {
setprg32(0x8000, ((reg[2] & 7) >> 1) | bank); setprg16(0x8000, bank | (prgchr[0] & 6) | 0); // actually, both 0 and 1 registers used, but they will switch each PA12 transition
setprg16(0xc000, bank | (prgchr[0] & 6) | 1); // if bits are different for both registers, so they must be programmed strongly the same!
} else { } else {
setprg16(0x8000, (reg[1] & 7) | bank); setprg16(0x8000, bank | (prgchr[0] & 7));
setprg16(0xc000, 7 | bank); setprg16(0xc000, bank | 7 );
} }
setmirror(((reg[3] & 4) >> 2) ^ 1); setmirror(((ctrl & 4) >> 2) ^ 1);
} }
static DECLFW(BMC12IN1Write) { static DECLFW(BMC12IN1Write) {
switch (A) { switch (A & 0xE000) {
case 0xafff: reg[0] = V; break; case 0xA000: prgchr[0] = V; Sync(); break;
case 0xbfff: reg[1] = V; break; case 0xC000: prgchr[1] = V; Sync(); break;
case 0xdfff: reg[2] = V; break; case 0xE000: ctrl = V & 0x0F; Sync(); break;
case 0xefff: reg[3] = V; break;
} }
Sync();
} }
static void BMC12IN1Power(void) { static void BMC12IN1Power(void) {
reg[0] = reg[1] = reg[2] = reg[3] = 0; prgchr[0] = prgchr[1] = ctrl = 0;
Sync(); Sync();
SetReadHandler(0x8000, 0xFFFF, CartBR); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetWriteHandler(0x8000, 0xFFFF, BMC12IN1Write); SetWriteHandler(0x8000, 0xFFFF, BMC12IN1Write);
@ -68,3 +70,4 @@ void BMC12IN1_Init(CartInfo *info) {
GameStateRestore = StateRestore; GameStateRestore = StateRestore;
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }