Merge branch 'master' of https://github.com/TASVideos/fceux into development
This commit is contained in:
Matthew Budd
commit
b3b46adcd5
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/* FCE Ultra - NES/Famicom Emulator
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*
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* Copyright notice for this file:
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* Copyright (C) 2020 CaH4e3
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* Double Dragon 310000-in-1 (4040R)
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* 700000-in-1 (BS-400R)(Unl)
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*/
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#include "mapinc.h"
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#include "mmc3.h"
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static uint8 pointer;
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static uint8 offset;
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static uint8 *WRAM = NULL;
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static uint32 WRAMSIZE;
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static int getPRGBankBS4XXXR(int bank)
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{
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if (((~bank) & 1) && (pointer & 0x40))
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bank ^= 2;
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return (bank & 2) ? (0xFE | (bank & 1)) : EXPREGS[4 | (bank & 1)];
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}
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static void BS4XXXRPW(uint32 A, uint8 V) {
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if ((EXPREGS[3] >> 4) & 0x01)
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{
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int AND = ((EXPREGS[0] >> 1) & 1) ? 0x0F : 0x0F;
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int OR = (EXPREGS[0] & 7) << 4;
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int bank0 = getPRGBankBS4XXXR(0);
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int bank1 = getPRGBankBS4XXXR(1);
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if (!((EXPREGS[3] >> 1) & 1)) //16K Mode
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{
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setprg8(0x8000, ((bank0) & AND) | OR);
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setprg8(0xA000, ((bank1) & AND) | OR);
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setprg8(0xC000, ((bank0) & AND) | OR);
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setprg8(0xE000, ((bank1) & AND) | OR);
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}
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else // 32K Mode
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{
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setprg8(0x8000, ((bank0) & AND) | OR);
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setprg8(0xA000, ((bank1) & AND) | OR);
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setprg8(0xC000, ((bank0 | 2) & AND) | OR);
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setprg8(0xE000, ((bank1 | 2) & AND) | OR);
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}
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}
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else // MMC3 Mode
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{
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int prgAND = ((EXPREGS[0] >> offset) & 1) ? 0x0F : 0x1F;
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int prgOR = (EXPREGS[0] & 7) << 4;
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setprg8(A, (V & prgAND) | (prgOR));
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}
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setprg8r(0x10, 0x6000, 0);
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}
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static void BS4XXXRCW(uint32 A, uint8 V) {
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if ((EXPREGS[3] >> 4) & 1)
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{
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int AND = ((EXPREGS[0] >> 1) & 1) ? 0x0F : 0x0F;
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int bank = EXPREGS[2] & AND;
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int chrOR = ((EXPREGS[0] >> 3) & 7) << 4;
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setchr8((bank) | (chrOR));
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}
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else
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{
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int chrAND = ((EXPREGS[0] >> 1) & 1) ? 0xFF : 0xFF;
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int chrOR = ((EXPREGS[0] >> 3) & 7) << 7;
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setchr1(A, (V & chrAND) | (chrOR));
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}
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}
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static DECLFW(BS4XXXRHiWrite) {
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// FCEU_printf("w: %04x-%02x\n",A,V)
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if (A==0x8000)
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{
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pointer = MMC3_cmd ^ V;
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}
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else if (A == 0x8001)
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{
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if((MMC3_cmd & 7) > 5)
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EXPREGS[4|(MMC3_cmd & 1)] = V;
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}
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MMC3_CMDWrite(A, V);
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}
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static DECLFW(BS4XXXRLoWrite) {
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// FCEU_printf("w: %04x-%02x\n", A, V);
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if (A & 0x800)
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{
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if (!(EXPREGS[3] & 0x80)) {
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EXPREGS[A & 0x03] = V;
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FixMMC3PRG(MMC3_cmd);
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FixMMC3CHR(MMC3_cmd);
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}
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else if (EXPREGS[3] & 0x10)
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{
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EXPREGS[A & 0x03] = V;
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FixMMC3PRG(MMC3_cmd);
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FixMMC3CHR(MMC3_cmd);
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}
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else
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WRAM[A - 0x6000] = V;
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}
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else
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WRAM[A - 0x6000] = V;
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}
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static void BSXXXXRPower(void) {
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EXPREGS[0] = EXPREGS[1] = EXPREGS[2] = EXPREGS[3] = EXPREGS[4] = EXPREGS[5] = 0;
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GenMMC3Power();
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SetReadHandler(0x6000, 0x7FFF, CartBR);
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SetWriteHandler(0x6000, 0x7FFF, BS4XXXRLoWrite);
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SetWriteHandler(0x8000, 0x9FFF, BS4XXXRHiWrite);
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FixMMC3PRG(MMC3_cmd);
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FixMMC3CHR(MMC3_cmd);
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}
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static void BS4XXXRClose(void) {
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if (WRAM)
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FCEU_gfree(WRAM);
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WRAM = NULL;
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}
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void BSXXXXR_Init(CartInfo *info) {
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GenMMC3_Init(info, 512, 256, 8, 0);
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cwrap = BS4XXXRCW;
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pwrap = BS4XXXRPW;
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info->Power = BSXXXXRPower;
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info->Close = BS4XXXRClose;
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WRAMSIZE = 8192;
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WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
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SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
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AddExState(WRAM, WRAMSIZE, 0, "WRAM");
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AddExState(EXPREGS, 8, 0, "EXPR");
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}
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void BS400R_Init(CartInfo *info) {
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offset = 1;
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BSXXXXR_Init(info);
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}
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void BS4040R_Init(CartInfo *info) {
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offset = 6;
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BSXXXXR_Init(info);
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}
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@ -473,6 +473,8 @@ static BMAPPING bmap[] = {
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{ "HPxx", BMCHPxx_Init, 0 },
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{ "MINDKIDS", MINDKIDS_Init, BMCFLAG_256KCHRR },
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{ "FNS", FNS_Init, BMCFLAG_16KCHRR },
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{ "BS-400R", BS400R_Init, 0 },
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{ "BS-4040R", BS4040R_Init, 0 },
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{ 0, 0, 0 }
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};
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@ -537,7 +539,7 @@ static int InitializeBoard(void) {
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CHRRAMSize = 256;
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else
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CHRRAMSize = 8;
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CHRRAMSize <<= 10;
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CHRRAMSize <<= 10;
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if ((UNIFchrrama = (uint8*)FCEU_malloc(CHRRAMSize))) {
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SetupCartCHRMapping(0, UNIFchrrama, CHRRAMSize, 1);
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AddExState(UNIFchrrama, CHRRAMSize, 0, "CHRR");
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@ -160,6 +160,8 @@ void BMC80013B_Init(CartInfo *info);
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void BMCHPxx_Init(CartInfo *info);
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void MINDKIDS_Init(CartInfo *info);
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void FNS_Init(CartInfo *info);
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void BS400R_Init(CartInfo *info);
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void BS4040R_Init(CartInfo *info);
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extern uint8 *UNIFchrrama; // Meh. So I can stop CHR RAM
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// bank switcherooing with certain boards...
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@ -454,6 +454,7 @@
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<ClCompile Include="..\src\boards\ac-08.cpp" />
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<ClCompile Include="..\src\boards\bb.cpp" />
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<ClCompile Include="..\src\boards\BMW8544.cpp" />
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<ClCompile Include="..\src\boards\bs4xxxr.cpp" />
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<ClCompile Include="..\src\boards\cheapocabra.cpp" />
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<ClCompile Include="..\src\boards\cityfighter.cpp" />
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<ClCompile Include="..\src\boards\coolboy.cpp" />
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@ -1108,6 +1108,9 @@
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<ClCompile Include="..\src\input\lcdcompzapper.cpp">
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<Filter>input</Filter>
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</ClCompile>
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<ClCompile Include="..\src\boards\bs4xxxr.cpp">
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<Filter>boards</Filter>
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</ClCompile>
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</ItemGroup>
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<ItemGroup>
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<ClInclude Include="..\src\drivers\common\args.h">
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