mapper 3 - "Hayauchi Super Igo (J)" RAM support
mapper 0 - "Family BASIC (J) (V3.0)" RAM support UNIF OneBus - supported TODO: fix other project files, please
This commit is contained in:
CaH4e3
parent
64b8ef4793
commit
8ac26b296c
|
|
@ -0,0 +1 @@
|
|||
/onebus.c
|
||||
|
|
@ -1,205 +0,0 @@
|
|||
/* FCE Ultra - NES/Famicom Emulator
|
||||
*
|
||||
* Copyright notice for this file:
|
||||
* Copyright (C) 2007 CaH4e3
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
* Street Dance (Dance pad) (Unl)
|
||||
*/
|
||||
|
||||
#include "mapinc.h"
|
||||
|
||||
static uint8 reg4[16];
|
||||
static uint8 regc[6];
|
||||
static uint8 reg2000, mmc3cmd, pcm_enable = 0, pcm_irq = 0;
|
||||
static int16 pcm_addr, pcm_size, pcm_latch, pcm_clock = 0xF6;
|
||||
static writefunc old4011write, old4012write, old4013write, old4015write;
|
||||
static readfunc old4015read;
|
||||
|
||||
static SFORMAT StateRegs[]=
|
||||
{
|
||||
{reg4, 16, "reg4"},
|
||||
{regc, 6, "REGSC"},
|
||||
{®2000, 1, "REGS2"},
|
||||
{&pcm_enable, 1, "PCME"},
|
||||
{&pcm_irq, 1, "PCMIRQ"},
|
||||
{&pcm_addr, 2, "PCMADDR"},
|
||||
{&pcm_size, 2, "PCMSIZE"},
|
||||
{&pcm_latch, 2, "PCMLATCH"},
|
||||
{&pcm_clock, 2, "PCMCLOCK"},
|
||||
{&mmc3cmd, 1, "MMC3CMD"},
|
||||
{0}
|
||||
};
|
||||
|
||||
static void Sync(void)
|
||||
{
|
||||
uint8 cbase = reg2000 - ((reg4[0x0B]&4)?6:0);
|
||||
uint8 pbase = reg4[0x09] & 0xC0;
|
||||
|
||||
setchr1(0x0000,cbase|(regc[0]&(~1)));
|
||||
setchr1(0x0400,cbase|(regc[0]|1));
|
||||
setchr1(0x0800,cbase|(regc[1]&(-1)));
|
||||
setchr1(0x0c00,cbase|(regc[1]|1));
|
||||
setchr1(0x1000,cbase|regc[2]);
|
||||
setchr1(0x1400,cbase|regc[3]);
|
||||
setchr1(0x1800,cbase|regc[4]);
|
||||
setchr1(0x1c00,cbase|regc[5]);
|
||||
|
||||
|
||||
if(reg4[0x0B]&1)
|
||||
{
|
||||
setprg8(0x8000,reg4[0x07] + 0x20);
|
||||
setprg8(0xA000,reg4[0x08] + 0x20);
|
||||
}
|
||||
else
|
||||
{
|
||||
setprg8(0x8000,reg4[0x07] + pbase);
|
||||
setprg8(0xA000,reg4[0x08] + pbase);
|
||||
}
|
||||
|
||||
setprg8(0xC000,reg4[0x09]);
|
||||
setprg8(0xE000,reg4[0x0A]);
|
||||
}
|
||||
|
||||
static DECLFW(UNLDANCEWrite2)
|
||||
{
|
||||
reg2000 = V;
|
||||
Sync();
|
||||
//FCEU_printf("write %04x:%04x\n",A,V);
|
||||
}
|
||||
|
||||
static DECLFW(UNLDANCEWrite4)
|
||||
{
|
||||
reg4[A & 0x0F] = V;
|
||||
Sync();
|
||||
//FCEU_printf("write %04x:%04x\n",A,V);
|
||||
}
|
||||
|
||||
static DECLFW(UNLDANCEWrite8)
|
||||
{
|
||||
if(A&1)
|
||||
{
|
||||
if(mmc3cmd<6)
|
||||
regc[mmc3cmd] = V;
|
||||
else
|
||||
reg4[0x07 + mmc3cmd - 6] = V;
|
||||
}
|
||||
else
|
||||
mmc3cmd = V & 7;
|
||||
Sync();
|
||||
//FCEU_printf("write %04x:%04x\n",A,V);
|
||||
}
|
||||
|
||||
static DECLFW(UNLDANCEWrite4012)
|
||||
{
|
||||
pcm_addr = V << 6;
|
||||
old4012write(A,V);
|
||||
}
|
||||
|
||||
static DECLFW(UNLDANCEWrite4013)
|
||||
{
|
||||
pcm_size = (V << 4) + 1;
|
||||
old4013write(A,V);
|
||||
}
|
||||
|
||||
static DECLFW(UNLDANCEWrite4015)
|
||||
{
|
||||
pcm_enable = V&0x10;
|
||||
if(pcm_irq)
|
||||
{
|
||||
X6502_IRQEnd(FCEU_IQEXT);
|
||||
pcm_irq = 0;
|
||||
}
|
||||
if(pcm_enable)
|
||||
pcm_latch = pcm_clock;
|
||||
old4015write(A,V&0xEF);
|
||||
}
|
||||
|
||||
static DECLFR(UNLDANCERead4015)
|
||||
{
|
||||
return (old4015read(A) & 0x7F) | pcm_irq;
|
||||
}
|
||||
|
||||
static void UNLDANCECpuHook(int a)
|
||||
{
|
||||
if(pcm_enable)
|
||||
{
|
||||
pcm_latch-=a;
|
||||
if(pcm_latch<=0)
|
||||
{
|
||||
pcm_latch+=pcm_clock;
|
||||
pcm_size--;
|
||||
if(pcm_size<0)
|
||||
{
|
||||
pcm_irq = 0x80;
|
||||
pcm_enable = 0;
|
||||
X6502_IRQBegin(FCEU_IQEXT);
|
||||
}
|
||||
else
|
||||
{
|
||||
uint8 raw_pcm = ARead[pcm_addr](pcm_addr) >> 1;
|
||||
old4011write(0x4011,raw_pcm);
|
||||
pcm_addr++;
|
||||
pcm_addr&=0x7FFF;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void UNLDANCEPower(void)
|
||||
{
|
||||
reg4[0x09]=0x3E;
|
||||
reg4[0x0A]=0x3F;
|
||||
SetupCartCHRMapping(0,PRGptr[0],512 * 1024,0);
|
||||
|
||||
old4015read=GetReadHandler(0x4015);
|
||||
SetReadHandler(0x4015,0x4015,UNLDANCERead4015);
|
||||
SetReadHandler(0x8000,0xFFFF,CartBR);
|
||||
|
||||
old4011write=GetWriteHandler(0x4011);
|
||||
old4012write=GetWriteHandler(0x4012);
|
||||
SetWriteHandler(0x4012,0x4012,UNLDANCEWrite4012);
|
||||
old4013write=GetWriteHandler(0x4013);
|
||||
SetWriteHandler(0x4013,0x4013,UNLDANCEWrite4013);
|
||||
old4015write=GetWriteHandler(0x4015);
|
||||
SetWriteHandler(0x4015,0x4015,UNLDANCEWrite4015);
|
||||
|
||||
SetWriteHandler(0x201A,0x201A,UNLDANCEWrite2);
|
||||
SetWriteHandler(0x4100,0x410F,UNLDANCEWrite4);
|
||||
SetWriteHandler(0x8000,0x8001,UNLDANCEWrite8);
|
||||
Sync();
|
||||
}
|
||||
|
||||
static void UNLDANCEReset(void)
|
||||
{
|
||||
reg4[0x09]=0x3E;
|
||||
reg4[0x0A]=0x3F;
|
||||
Sync();
|
||||
}
|
||||
|
||||
static void StateRestore(int version)
|
||||
{
|
||||
Sync();
|
||||
}
|
||||
|
||||
void UNLDANCE_Init(CartInfo *info)
|
||||
{
|
||||
info->Power=UNLDANCEPower;
|
||||
info->Reset=UNLDANCEReset;
|
||||
MapIRQHook=UNLDANCECpuHook;
|
||||
GameStateRestore=StateRestore;
|
||||
AddExState(&StateRegs, ~0, 0, 0);
|
||||
}
|
||||
|
|
@ -23,6 +23,8 @@
|
|||
static uint8 bus_conflict = 0;
|
||||
static uint8 latche, latcheinit;
|
||||
static uint16 addrreg0, addrreg1;
|
||||
static uint8 *WRAM=NULL;
|
||||
static uint32 WRAMSIZE;
|
||||
static void(*WSync)(void);
|
||||
|
||||
static DECLFW(LatchWrite)
|
||||
|
|
@ -39,23 +41,44 @@ static void LatchPower(void)
|
|||
{
|
||||
latche=latcheinit;
|
||||
WSync();
|
||||
SetReadHandler(0x8000,0xFFFF,CartBR);
|
||||
SetReadHandler(0x6000,0xFFFF,CartBR);
|
||||
SetWriteHandler(0x6000,0x7FFF,CartBW);
|
||||
SetWriteHandler(addrreg0,addrreg1,LatchWrite);
|
||||
}
|
||||
|
||||
static void LatchClose(void)
|
||||
{
|
||||
if(WRAM)
|
||||
FCEU_gfree(WRAM);
|
||||
WRAM=NULL;
|
||||
}
|
||||
|
||||
static void StateRestore(int version)
|
||||
{
|
||||
WSync();
|
||||
}
|
||||
|
||||
static void Latch_Init(CartInfo *info, void (*proc)(void), uint8 init, uint16 adr0, uint16 adr1)
|
||||
static void Latch_Init(CartInfo *info, void (*proc)(void), uint8 init, uint16 adr0, uint16 adr1, uint8 wram)
|
||||
{
|
||||
latcheinit=init;
|
||||
addrreg0=adr0;
|
||||
addrreg1=adr1;
|
||||
WSync=proc;
|
||||
info->Power=LatchPower;
|
||||
info->Close=LatchClose;
|
||||
GameStateRestore=StateRestore;
|
||||
if(wram)
|
||||
{
|
||||
WRAMSIZE=8192;
|
||||
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE);
|
||||
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1);
|
||||
if(info->battery)
|
||||
{
|
||||
info->SaveGame[0]=WRAM;
|
||||
info->SaveGameLen[0]=WRAMSIZE;
|
||||
}
|
||||
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
|
||||
}
|
||||
AddExState(&latche, 1, 0, "LATC");
|
||||
AddExState(&bus_conflict, 1, 0, "BUSC");
|
||||
}
|
||||
|
|
@ -72,7 +95,7 @@ static void CPROMSync(void)
|
|||
|
||||
void CPROM_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, CPROMSync, 0, 0x8000, 0xFFFF);
|
||||
Latch_Init(info, CPROMSync, 0, 0x8000, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
//------------------ Map 184 ---------------------------
|
||||
|
|
@ -87,7 +110,7 @@ static void M184Sync(void)
|
|||
|
||||
void Mapper184_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, M184Sync, 0, 0x6000, 0x7FFF);
|
||||
Latch_Init(info, M184Sync, 0, 0x6000, 0x7FFF, 0);
|
||||
}
|
||||
|
||||
//------------------ CNROM ---------------------------
|
||||
|
|
@ -99,12 +122,13 @@ static void CNROMSync(void)
|
|||
setchr8(latche);
|
||||
setprg16(0x8000,0);
|
||||
setprg16(0xC000,1);
|
||||
setprg8r(0x10,0x6000,0); // Hayauchy IGO uses 2Kb or RAM
|
||||
}
|
||||
|
||||
void CNROM_Init(CartInfo *info)
|
||||
{
|
||||
bus_conflict = 1;
|
||||
Latch_Init(info, CNROMSync, 0, 0x8000, 0xFFFF);
|
||||
Latch_Init(info, CNROMSync, 0, 0x8000, 0xFFFF, 1);
|
||||
}
|
||||
|
||||
//------------------ ANROM ---------------------------
|
||||
|
|
@ -118,7 +142,7 @@ static void ANROMSync()
|
|||
|
||||
void ANROM_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, ANROMSync, 0, 0x8000, 0xFFFF);
|
||||
Latch_Init(info, ANROMSync, 0, 0x8000, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
//------------------ Map 70 ---------------------------
|
||||
|
|
@ -132,7 +156,7 @@ static void M70Sync()
|
|||
|
||||
void Mapper70_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, M70Sync, 0, 0x8000, 0xFFFF);
|
||||
Latch_Init(info, M70Sync, 0, 0x8000, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
//------------------ Map 152 ---------------------------
|
||||
|
|
@ -147,7 +171,7 @@ static void M152Sync()
|
|||
|
||||
void Mapper152_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, M152Sync, 0, 0x8000, 0xFFFF);
|
||||
Latch_Init(info, M152Sync, 0, 0x8000, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
//------------------ Map 78 ---------------------------
|
||||
|
|
@ -162,7 +186,7 @@ static void M78Sync()
|
|||
|
||||
void Mapper78_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, M78Sync, 0, 0x8000, 0xFFFF);
|
||||
Latch_Init(info, M78Sync, 0, 0x8000, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
//------------------ MHROM ---------------------------
|
||||
|
|
@ -175,17 +199,17 @@ static void MHROMSync(void)
|
|||
|
||||
void MHROM_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, MHROMSync, 0, 0x8000, 0xFFFF);
|
||||
Latch_Init(info, MHROMSync, 0, 0x8000, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
void Mapper140_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, MHROMSync, 0, 0x6000, 0x7FFF);
|
||||
Latch_Init(info, MHROMSync, 0, 0x6000, 0x7FFF, 0);
|
||||
}
|
||||
|
||||
void Mapper240_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, MHROMSync, 0, 0x4020, 0x5FFF);
|
||||
Latch_Init(info, MHROMSync, 0, 0x4020, 0x5FFF, 0);
|
||||
// need SRAM.
|
||||
}
|
||||
|
||||
|
|
@ -201,7 +225,7 @@ static void M87Sync(void)
|
|||
|
||||
void Mapper87_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, M87Sync, ~0, 0x6000, 0xFFFF);
|
||||
Latch_Init(info, M87Sync, ~0, 0x6000, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
//------------------ Map 101 ---------------------------
|
||||
|
|
@ -215,7 +239,7 @@ static void M101Sync(void)
|
|||
|
||||
void Mapper101_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, M101Sync, ~0, 0x6000, 0x7FFF);
|
||||
Latch_Init(info, M101Sync, ~0, 0x6000, 0x7FFF, 0);
|
||||
}
|
||||
|
||||
//------------------ Map 11 ---------------------------
|
||||
|
|
@ -228,12 +252,12 @@ static void M11Sync(void)
|
|||
|
||||
void Mapper11_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, M11Sync, 0, 0x8000, 0xFFFF);
|
||||
Latch_Init(info, M11Sync, 0, 0x8000, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
void Mapper144_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, M11Sync, 0, 0x8001, 0xFFFF);
|
||||
Latch_Init(info, M11Sync, 0, 0x8001, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
//------------------ Map 38 ---------------------------
|
||||
|
|
@ -246,7 +270,7 @@ static void M38Sync(void)
|
|||
|
||||
void Mapper38_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, M38Sync, 0, 0x7000, 0x7FFF);
|
||||
Latch_Init(info, M38Sync, 0, 0x7000, 0x7FFF, 0);
|
||||
}
|
||||
|
||||
//------------------ Map 36 ---------------------------
|
||||
|
|
@ -259,7 +283,7 @@ static void M36Sync(void)
|
|||
|
||||
void Mapper36_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, M36Sync, 0, 0x8400, 0xfffe);
|
||||
Latch_Init(info, M36Sync, 0, 0x8400, 0xfffe, 0);
|
||||
}
|
||||
//------------------ UNROM ---------------------------
|
||||
|
||||
|
|
@ -273,7 +297,7 @@ static void UNROMSync(void)
|
|||
void UNROM_Init(CartInfo *info)
|
||||
{
|
||||
bus_conflict = 1;
|
||||
Latch_Init(info, UNROMSync, 0, 0x8000, 0xFFFF);
|
||||
Latch_Init(info, UNROMSync, 0, 0x8000, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
//------------------ Map 93 ---------------------------
|
||||
|
|
@ -287,7 +311,7 @@ static void SSUNROMSync(void)
|
|||
|
||||
void SUNSOFT_UNROM_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, SSUNROMSync, 0, 0x8000, 0xFFFF);
|
||||
Latch_Init(info, SSUNROMSync, 0, 0x8000, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
//------------------ Map 94 ---------------------------
|
||||
|
|
@ -301,7 +325,7 @@ static void M94Sync(void)
|
|||
|
||||
void Mapper94_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, M94Sync, 0, 0x8000, 0xFFFF);
|
||||
Latch_Init(info, M94Sync, 0, 0x8000, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
//------------------ Map 180 ---------------------------
|
||||
|
|
@ -315,7 +339,7 @@ static void M180Sync(void)
|
|||
|
||||
void Mapper180_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, M180Sync, 0, 0x8000, 0xFFFF);
|
||||
Latch_Init(info, M180Sync, 0, 0x8000, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
//------------------ Map 107 ---------------------------
|
||||
|
|
@ -328,7 +352,7 @@ static void M107Sync(void)
|
|||
|
||||
void Mapper107_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, M107Sync, ~0, 0x8000, 0xFFFF);
|
||||
Latch_Init(info, M107Sync, ~0, 0x8000, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
//------------------ Map 113 ---------------------------
|
||||
|
|
@ -342,7 +366,7 @@ static void M113Sync(void)
|
|||
|
||||
void Mapper113_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, M113Sync, 0, 0x4100, 0x7FFF);
|
||||
Latch_Init(info, M113Sync, 0, 0x4100, 0x7FFF, 0);
|
||||
}
|
||||
|
||||
//------------------ A65AS ---------------------------
|
||||
|
|
@ -370,7 +394,7 @@ static void BMCA65ASSync(void)
|
|||
|
||||
void BMCA65AS_Init(CartInfo *info)
|
||||
{
|
||||
Latch_Init(info, BMCA65ASSync, 0, 0x8000, 0xFFFF);
|
||||
Latch_Init(info, BMCA65ASSync, 0, 0x8000, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
//------------------ NROM ---------------------------
|
||||
|
|
@ -379,15 +403,21 @@ void BMCA65AS_Init(CartInfo *info)
|
|||
static DECLFW(WriteHandler)
|
||||
{
|
||||
FCEU_printf("bs %04x %02x\n",A,V);
|
||||
CartBW(A,V);
|
||||
}
|
||||
#endif
|
||||
|
||||
static void NROMPower(void)
|
||||
{
|
||||
setprg8r(0x10,0x6000,0); // Famili BASIC (v3.0) need it (uses only 4KB), FP-BASIC uses 8KB
|
||||
setprg16(0x8000,0);
|
||||
setprg16(0xC000,~0);
|
||||
setchr8(0);
|
||||
|
||||
SetReadHandler(0x6000,0x6FFF,CartBR);
|
||||
SetWriteHandler(0x6000,0x6FFF,CartBW);
|
||||
SetReadHandler(0x8000,0xFFFF,CartBR);
|
||||
|
||||
#ifdef DEBUG_MAPPER
|
||||
SetWriteHandler(0x4020,0xFFFF,WriteHandler);
|
||||
#endif
|
||||
|
|
@ -396,4 +426,16 @@ static void NROMPower(void)
|
|||
void NROM_Init(CartInfo *info)
|
||||
{
|
||||
info->Power=NROMPower;
|
||||
info->Close=LatchClose;
|
||||
|
||||
WRAMSIZE=8192;
|
||||
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE);
|
||||
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1);
|
||||
if(info->battery)
|
||||
{
|
||||
info->SaveGame[0]=WRAM;
|
||||
info->SaveGameLen[0]=WRAMSIZE;
|
||||
}
|
||||
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,308 @@
|
|||
/* FCE Ultra - NES/Famicom Emulator
|
||||
*
|
||||
* Copyright notice for this file:
|
||||
* Copyright (C) 2007-2010 CaH4e3
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
* OneBus system
|
||||
* Street Dance (Dance pad) (Unl)
|
||||
* 101-in-1 Arcade Action II
|
||||
* DreamGEAR 75-in-1
|
||||
*/
|
||||
|
||||
#include "mapinc.h"
|
||||
|
||||
static uint8 isDance;
|
||||
static uint8 regs[16],regc[6];
|
||||
static uint8 IRQCount,IRQLatch,IRQa, IRQReload, pcm_enable = 0, pcm_irq = 0;
|
||||
static int16 pcm_addr, pcm_size, pcm_latch, pcm_clock = 0xF6;
|
||||
static writefunc old4011write, old4012write, old4013write, old4015write;
|
||||
static readfunc old4015read;
|
||||
|
||||
static SFORMAT StateRegs[]=
|
||||
{
|
||||
{regc, 6, "REGC"},
|
||||
{regs, 16, "REGS"},
|
||||
{&IRQReload, 1, "IRQR"},
|
||||
{&IRQCount, 1, "IRQC"},
|
||||
{&IRQLatch, 1, "IRQL"},
|
||||
{&IRQa, 1, "IRQA"},
|
||||
{&pcm_enable, 1, "PCME"},
|
||||
{&pcm_irq, 1, "PCMIRQ"},
|
||||
{&pcm_addr, 2, "PCMADDR"},
|
||||
{&pcm_size, 2, "PCMSIZE"},
|
||||
{&pcm_latch, 2, "PCMLATCH"},
|
||||
{&pcm_clock, 2, "PCMCLOCK"},
|
||||
{0}
|
||||
};
|
||||
|
||||
static void Sync(void)
|
||||
{
|
||||
uint16 cswap = (regs[0xf] & 0x80) << 5;
|
||||
uint16 pswap = (regs[0xd]&1)?((regs[0xf] & 0x40) << 8):0;
|
||||
uint16 pbase = (regs[0]&0xf0)<<4;
|
||||
uint16 cbase = (((regs[0]&0x0f)<<8)|(regs[0xc]<<1)|((regs[0xd]&0xf8)>>3))<<3;
|
||||
uint16 pmask = 0x3f>>(regs[0xb]&0xf);
|
||||
|
||||
setchr1(cswap^0x0000,cbase|(regc[0]&(~1)));
|
||||
setchr1(cswap^0x0400,cbase|(regc[0]|1));
|
||||
setchr1(cswap^0x0800,cbase|(regc[1]&(-1)));
|
||||
setchr1(cswap^0x0c00,cbase|(regc[1]|1));
|
||||
setchr1(cswap^0x1000,cbase|(regc[2]));
|
||||
setchr1(cswap^0x1400,cbase|(regc[3]));
|
||||
setchr1(cswap^0x1800,cbase|(regc[4]));
|
||||
setchr1(cswap^0x1c00,cbase|(regc[5]));
|
||||
|
||||
if(regs[0xd]&2)
|
||||
{
|
||||
setprg8(pswap^0x8000, pbase|(regs[0x7]&pmask)|(regs[0xa]&(~pmask)));
|
||||
setprg8( 0xA000, pbase|(regs[0x8]&pmask)|(regs[0xa]&(~pmask)));
|
||||
setprg8(pswap^0xC000, pbase|(regs[0x9]&pmask)|(regs[0xa]&(~pmask)));
|
||||
setprg8( 0xE000, pbase|regs[0xa]);
|
||||
}
|
||||
else
|
||||
{
|
||||
setprg8(pswap^0x8000, pbase|(regs[0x7]&pmask)|(regs[0xa]&(~pmask)));
|
||||
setprg8( 0xA000, pbase|(regs[0x8]&pmask)|(regs[0xa]&(~pmask)));
|
||||
setprg8(pswap^0xC000, pbase|((~1)&pmask)|(regs[0xa]&(~pmask)));
|
||||
setprg8( 0xE000, pbase|((~0)&pmask)|(regs[0xa]&(~pmask)));
|
||||
}
|
||||
|
||||
setmirror(regs[0xe]);
|
||||
}
|
||||
|
||||
static DECLFW(UNLOneBusWrite20XX)
|
||||
{
|
||||
// FCEU_printf("PPU %04x:%04x\n",A,V);
|
||||
if(A == 0x201A)
|
||||
regs[0xd] = V;
|
||||
else if(A == 0x2018)
|
||||
regs[0xc] = V;
|
||||
Sync();
|
||||
}
|
||||
|
||||
static DECLFW(UNLOneBusWriteExp)
|
||||
{
|
||||
// FCEU_printf("EXP %04x:%04x\n",A,V);
|
||||
// switch(A & 0x0F)
|
||||
// {
|
||||
// case 2: pcm_latch = pcm_clock; FCEU_printf("write %04x:%04x\n",A,V); break;
|
||||
// case 3: pcm_irqa = 0; X6502_IRQEnd(FCEU_IQEXT); pcm_irq = 0; FCEU_printf("write %04x:%04x\n",A,V); break;
|
||||
// case 4: pcm_irqa = 1; FCEU_printf("write %04x:%04x\n",A,V); break;
|
||||
// default:
|
||||
regs[A & 0x0F] = V;
|
||||
Sync();
|
||||
// }
|
||||
}
|
||||
|
||||
static DECLFW(UNLOneBusWriteDebug)
|
||||
{
|
||||
// FCEU_printf("write %04x:%04x\n",A,V);
|
||||
}
|
||||
|
||||
static DECLFW(UNLOneBusWriteMMC)
|
||||
{
|
||||
// FCEU_printf("MMC %04x:%04x\n",A,V);
|
||||
switch(A&0xE001)
|
||||
{
|
||||
case 0x8000: regs[0xf] = V; Sync(); break;
|
||||
case 0x8001:
|
||||
{
|
||||
uint8 mask = 0xff, mmc3cmd = regs[0xf]&7;
|
||||
switch(mmc3cmd)
|
||||
{
|
||||
case 0:
|
||||
case 1:
|
||||
case 2:
|
||||
case 3:
|
||||
case 4:
|
||||
case 5:
|
||||
if(regs[0xd]&4)
|
||||
mask = 0x0f;
|
||||
else
|
||||
mask >>= ((regs[0xb]&0xf0)>>4);
|
||||
regc[mmc3cmd] = V&mask;
|
||||
break;
|
||||
case 6:
|
||||
case 7:
|
||||
mask = (mask&0x3f)>>(regs[0xb]&0xf);
|
||||
regs[mmc3cmd+1] = (regs[mmc3cmd+1]&(~mask))|(V&mask);
|
||||
break;
|
||||
}
|
||||
|
||||
Sync();
|
||||
break;
|
||||
}
|
||||
case 0xA000: regs[0xe] = (V & 1)^1; Sync(); break;
|
||||
case 0xC000: IRQLatch = V&0xfe; break;
|
||||
case 0xC001: IRQReload = 1; break;
|
||||
case 0xE000: X6502_IRQEnd(FCEU_IQEXT); IRQa = 0; break;
|
||||
case 0xE001: IRQa = 1; break;
|
||||
}
|
||||
}
|
||||
|
||||
static void UNLOneBusIRQHook(void)
|
||||
{
|
||||
int count = IRQCount;
|
||||
if(!count || IRQReload)
|
||||
{
|
||||
IRQCount = IRQLatch;
|
||||
IRQReload = 0;
|
||||
}
|
||||
else
|
||||
IRQCount--;
|
||||
if(count && !IRQCount)
|
||||
{
|
||||
if(IRQa)
|
||||
X6502_IRQBegin(FCEU_IQEXT);
|
||||
}
|
||||
}
|
||||
|
||||
static DECLFW(UNLOneBusWriteAPU2)
|
||||
{
|
||||
// FCEU_printf("APU2 %04x:%04x\n",A,V);
|
||||
CartBW(A&0xffdf,V);
|
||||
}
|
||||
|
||||
static DECLFW(UNLOneBusWrite4012)
|
||||
{
|
||||
// FCEU_printf("write %04x:%04x\n",A,V);
|
||||
pcm_addr = V << 6;
|
||||
old4012write(A,V);
|
||||
}
|
||||
|
||||
static DECLFW(UNLOneBusWrite4013)
|
||||
{
|
||||
// FCEU_printf("write %04x:%04x\n",A,V);
|
||||
pcm_size = (V << 4) + 1;
|
||||
old4013write(A,V);
|
||||
}
|
||||
|
||||
static DECLFW(UNLOneBusWrite4015)
|
||||
{
|
||||
// FCEU_printf("write %04x:%04x\n",A,V);
|
||||
pcm_enable = V&0x10;
|
||||
if(pcm_irq)
|
||||
{
|
||||
X6502_IRQEnd(FCEU_IQEXT);
|
||||
pcm_irq = 0;
|
||||
}
|
||||
if(pcm_enable)
|
||||
pcm_latch = pcm_clock;
|
||||
old4015write(A,V&0xEF);
|
||||
}
|
||||
|
||||
static DECLFR(UNLOneBusRead4015)
|
||||
{
|
||||
uint8 result = (old4015read(A) & 0x7F)|pcm_irq;
|
||||
// FCEU_printf("read %04x, %02x\n",A,result);
|
||||
return result;
|
||||
}
|
||||
|
||||
static void UNLOneBusCpuHook(int a)
|
||||
{
|
||||
if(pcm_enable)
|
||||
{
|
||||
pcm_latch-=a;
|
||||
if(pcm_latch<=0)
|
||||
{
|
||||
pcm_latch+=pcm_clock;
|
||||
pcm_size--;
|
||||
if(pcm_size<0)
|
||||
{
|
||||
pcm_irq = 0x80;
|
||||
pcm_enable = 0;
|
||||
X6502_IRQBegin(FCEU_IQEXT);
|
||||
}
|
||||
else
|
||||
{
|
||||
uint8 raw_pcm = ARead[pcm_addr](pcm_addr) >> 1;
|
||||
old4011write(0x4011,raw_pcm);
|
||||
pcm_addr++;
|
||||
pcm_addr&=0x7FFF;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void UNLOneBusPower(void)
|
||||
{
|
||||
IRQCount=IRQLatch=IRQa==0;
|
||||
regs[0]=regs[1]=regs[1]=regs[2]=regs[3]=regs[4]=regs[5]=regs[6]=0;
|
||||
regs[7]=regs[8]=regs[11]=regs[12]=regs[13]=regs[14]=regs[15]=0;
|
||||
regs[0x09]=0x3E;
|
||||
regs[0x0A]=0x3F;
|
||||
|
||||
SetupCartCHRMapping(0,PRGptr[0],4096 * 1024,0);
|
||||
|
||||
if(isDance) // quick workaround, TODO: figure out how it works together
|
||||
{
|
||||
old4015read=GetReadHandler(0x4015);
|
||||
SetReadHandler(0x4015,0x4015,UNLOneBusRead4015);
|
||||
old4011write=GetWriteHandler(0x4011);
|
||||
old4012write=GetWriteHandler(0x4012);
|
||||
SetWriteHandler(0x4012,0x4012,UNLOneBusWrite4012);
|
||||
old4013write=GetWriteHandler(0x4013);
|
||||
SetWriteHandler(0x4013,0x4013,UNLOneBusWrite4013);
|
||||
old4015write=GetWriteHandler(0x4015);
|
||||
SetWriteHandler(0x4015,0x4015,UNLOneBusWrite4015);
|
||||
}
|
||||
|
||||
SetReadHandler(0x8000,0xFFFF,CartBR);
|
||||
SetWriteHandler(0x2009,0x2fff,UNLOneBusWrite20XX);
|
||||
// SetWriteHandler(0x4020,0xffff,UNLOneBusWriteDebug);
|
||||
// SetWriteHandler(0x4020,0x4040,UNLOneBusWriteAPU2);
|
||||
SetWriteHandler(0x4100,0x410f,UNLOneBusWriteExp);
|
||||
SetWriteHandler(0x8000,0xefff,UNLOneBusWriteMMC);
|
||||
Sync();
|
||||
}
|
||||
|
||||
static void UNLOneBusReset(void)
|
||||
{
|
||||
IRQCount=IRQLatch=IRQa=0;
|
||||
regs[0]=regs[1]=regs[1]=regs[2]=regs[3]=regs[4]=regs[5]=regs[6]=0;
|
||||
regs[7]=regs[8]=regs[11]=regs[12]=regs[13]=regs[14]=regs[15]=0;
|
||||
regs[0x09]=0x3E;
|
||||
regs[0x0A]=0x3F;
|
||||
Sync();
|
||||
}
|
||||
|
||||
static void StateRestore(int version)
|
||||
{
|
||||
Sync();
|
||||
}
|
||||
|
||||
void UNLOneBus_Init(CartInfo *info)
|
||||
{
|
||||
isDance = 0;
|
||||
info->Power=UNLOneBusPower;
|
||||
info->Reset=UNLOneBusReset;
|
||||
GameHBIRQHook=UNLOneBusIRQHook;
|
||||
// MapIRQHook=UNLOneBusCpuHook;
|
||||
GameStateRestore=StateRestore;
|
||||
AddExState(&StateRegs, ~0, 0, 0);
|
||||
}
|
||||
|
||||
void UNLDANCE_Init(CartInfo *info)
|
||||
{
|
||||
isDance = 1;
|
||||
info->Power=UNLOneBusPower;
|
||||
info->Reset=UNLOneBusReset;
|
||||
GameHBIRQHook=UNLOneBusIRQHook;
|
||||
MapIRQHook=UNLOneBusCpuHook;
|
||||
GameStateRestore=StateRestore;
|
||||
AddExState(&StateRegs, ~0, 0, 0);
|
||||
}
|
||||
|
|
@ -653,7 +653,8 @@ static BMAPPINGLocal bmap[] = {
|
|||
{"", 215, Mapper215_Init},
|
||||
{"", 216, Mapper216_Init},
|
||||
{"", 217, Mapper217_Init},
|
||||
{"UNLA9746", 219, UNLA9746_Init},
|
||||
{"UNLA9746", 219, UNLA9746_Init},
|
||||
{"OneBus", 220, UNLOneBus_Init},
|
||||
|
||||
// {220, BMCFK23C_Init},
|
||||
// {220, UNL3DBlock_Init},
|
||||
|
|
|
|||
61
src/unif.cpp
61
src/unif.cpp
|
|
@ -129,7 +129,7 @@ static int DoMirroring(FCEUFILE *fp)
|
|||
{
|
||||
uint8 t;
|
||||
t=FCEU_fgetc(fp);
|
||||
mirrortodo=t;
|
||||
mirrortodo=t;
|
||||
|
||||
{
|
||||
static char *stuffo[6]={"Horizontal","Vertical","$2000","$2400","\"Four-screen\"","Controlled by Mapper Hardware"};
|
||||
|
|
@ -266,7 +266,7 @@ static int LoadPRG(FCEUFILE *fp)
|
|||
else
|
||||
FCEU_printf("\n");
|
||||
|
||||
SetupCartPRGMapping(z,malloced[z],t,0);
|
||||
SetupCartPRGMapping(z,malloced[z],t,0);
|
||||
return(1);
|
||||
}
|
||||
|
||||
|
|
@ -324,11 +324,11 @@ static BMAPPING bmap[] = {
|
|||
{ "Sachen-8259D", S8259D_Init,0},
|
||||
{ "Sachen-74LS374N", S74LS374N_Init,0},
|
||||
{ "Sachen-74LS374NA", S74LS374NA_Init,0}, //seems to be custom mapper
|
||||
{ "SA-002", TCU02_Init, 0},
|
||||
{ "SA-002", TCU02_Init, 0},
|
||||
{ "SA-016-1M", SA0161M_Init,0},
|
||||
{ "SA-72007", SA72007_Init,0},
|
||||
{ "SA-72008", SA72008_Init,0},
|
||||
{ "SA-009", SA009_Init,0},
|
||||
{ "SA-009", SA009_Init,0},
|
||||
{ "SA-0036", SA0036_Init,0},
|
||||
{ "SA-0037", SA0037_Init,0},
|
||||
{ "SA-NROM", TCA01_Init,0},
|
||||
|
|
@ -362,7 +362,7 @@ static BMAPPING bmap[] = {
|
|||
{ "TGROM", TGROM_Init,0},
|
||||
{ "TR1ROM", TFROM_Init,BMCFLAG_FORCE4},
|
||||
|
||||
{ "TBROM", TBROM_Init,0},
|
||||
{ "TBROM", TBROM_Init,0},
|
||||
{ "TEROM", TEROM_Init,0},
|
||||
{ "TFROM", TFROM_Init,0},
|
||||
{ "TLROM", TLROM_Init,0},
|
||||
|
|
@ -374,7 +374,7 @@ static BMAPPING bmap[] = {
|
|||
{ "TQROM", TQROM_Init,0},
|
||||
{ "TVROM", TLROM_Init,BMCFLAG_FORCE4},
|
||||
|
||||
{ "NTBROM", Mapper68_Init,0},
|
||||
{ "NTBROM", Mapper68_Init,0},
|
||||
|
||||
{ "CPROM", CPROM_Init,BMCFLAG_16KCHRR},
|
||||
{ "CNROM", CNROM_Init,0},
|
||||
|
|
@ -385,12 +385,12 @@ static BMAPPING bmap[] = {
|
|||
{ "RROM-128", NROM_Init,0 }, //NROM128_Init,0 },
|
||||
{ "MHROM", MHROM_Init,0},
|
||||
{ "UNROM", UNROM_Init,0},
|
||||
{ "UOROM", UNROM_Init,0},
|
||||
{ "UOROM", UNROM_Init,0},
|
||||
{ "SUNSOFT_UNROM", SUNSOFT_UNROM_Init,0},
|
||||
{ "MARIO1-MALEE2", MALEE_Init,0},
|
||||
{ "3D-BLOCK", UNL3DBlock_Init, 0},
|
||||
{ "SMB2J", UNLSMB2J_Init, 0},
|
||||
{ "AX5705", UNLAX5705_Init, 0},
|
||||
{ "3D-BLOCK", UNL3DBlock_Init, 0},
|
||||
{ "SMB2J", UNLSMB2J_Init, 0},
|
||||
{ "AX5705", UNLAX5705_Init, 0},
|
||||
{ "CC-21", UNLCC21_Init,0},
|
||||
|
||||
{ "H2288", UNLH2288_Init,0},
|
||||
|
|
@ -405,7 +405,7 @@ static BMAPPING bmap[] = {
|
|||
{ "C-N22M", UNLCN22M_Init,0},
|
||||
{ "EDU2000", UNLEDU2000_Init,0},
|
||||
{ "603-5052", UNL6035052_Init,0},
|
||||
{ "N625092", UNLN625092_Init,0},
|
||||
{ "N625092", UNLN625092_Init,0},
|
||||
{ "Supervision16in1", Supervision16_Init,0},
|
||||
{ "NovelDiamond9999999in1", Novel_Init,0},
|
||||
{ "Super24in1SC03", Super24_Init,0},
|
||||
|
|
@ -417,27 +417,28 @@ static BMAPPING bmap[] = {
|
|||
{ "GK-192", BMCGK192_Init, 0},
|
||||
{ "SuperHIK8in1", Mapper45_Init,0},
|
||||
{ "22211", UNL22211_Init,0},
|
||||
{ "TF1201", UNLTF1201_Init, 0},
|
||||
{ "GS-2004", BMCGS2004_Init, 0},
|
||||
{ "GS-2013", BMCGS2013_Init, 0},
|
||||
{ "KS7032", UNLKS7032_Init, 0},
|
||||
{ "T-230", UNLT230_Init, 0},
|
||||
{ "190in1", BMC190in1_Init, 0},
|
||||
{ "Ghostbusters63in1", BMCGhostbusters63in1_Init, 0},
|
||||
{ "BS-5",BMCBS5_Init, 0},
|
||||
{ "411120-C",BMC411120C_Init, 0},
|
||||
{ "830118C",BMC830118C_Init, 0},
|
||||
{ "T-227-1",BMCT2271_Init,0},
|
||||
{ "TF1201", UNLTF1201_Init, 0},
|
||||
{ "GS-2004", BMCGS2004_Init, 0},
|
||||
{ "GS-2013", BMCGS2013_Init, 0},
|
||||
{ "KS7032", UNLKS7032_Init, 0},
|
||||
{ "T-230", UNLT230_Init, 0},
|
||||
{ "190in1", BMC190in1_Init, 0},
|
||||
{ "Ghostbusters63in1", BMCGhostbusters63in1_Init, 0},
|
||||
{ "BS-5",BMCBS5_Init, 0},
|
||||
{ "411120-C",BMC411120C_Init, 0},
|
||||
{ "830118C",BMC830118C_Init, 0},
|
||||
{ "T-227-1",BMCT2271_Init,0},
|
||||
|
||||
{ "DREAMTECH01", DreamTech01_Init,0},
|
||||
{ "KONAMI-QTAI", Mapper190_Init,0},
|
||||
|
||||
{ "DANCE", UNLDANCE_Init,0},
|
||||
{ "SC-127", UNLSC127_Init,0},
|
||||
{ "DANCE", UNLDANCE_Init,0},
|
||||
{ "OneBus", UNLOneBus_Init,0},
|
||||
{ "SC-127", UNLSC127_Init,0},
|
||||
|
||||
{ "TEK90", Mapper90_Init,0},
|
||||
|
||||
{ "COPYFAMI_MMC3", MapperCopyFamiMMC3_Init,0},
|
||||
{ "COPYFAMI_MMC3", MapperCopyFamiMMC3_Init,0},
|
||||
|
||||
{0,0,0}
|
||||
};
|
||||
|
|
@ -462,13 +463,13 @@ int LoadUNIFChunks(FCEUFILE *fp)
|
|||
for(;;)
|
||||
{
|
||||
t=FCEU_fread(&uchead,1,4,fp);
|
||||
if(t<4)
|
||||
if(t<4)
|
||||
{
|
||||
if(t>0)
|
||||
return 0;
|
||||
return 0;
|
||||
return 1;
|
||||
}
|
||||
if(!(FCEU_read32le(&uchead.info,fp)))
|
||||
if(!(FCEU_read32le(&uchead.info,fp)))
|
||||
return 0;
|
||||
t=0;
|
||||
x=0;
|
||||
|
|
@ -480,7 +481,7 @@ int LoadUNIFChunks(FCEUFILE *fp)
|
|||
if(!bfunc[x].init(fp))
|
||||
return 0;
|
||||
t=1;
|
||||
break;
|
||||
break;
|
||||
}
|
||||
x++;
|
||||
}
|
||||
|
|
@ -557,7 +558,7 @@ int UNIFLoad(const char *name, FCEUFILE *fp)
|
|||
FCEU_fseek(fp,0,SEEK_SET);
|
||||
FCEU_fread(&unhead,1,4,fp);
|
||||
if(memcmp(&unhead,"UNIF",4))
|
||||
return 0;
|
||||
return 0;
|
||||
|
||||
ResetCartMapping();
|
||||
|
||||
|
|
|
|||
|
|
@ -115,6 +115,7 @@ void UNLKS7032_Init(CartInfo *info);
|
|||
void UNLT230_Init(CartInfo *info);
|
||||
void UNLAX5705_Init(CartInfo *info);
|
||||
void UNLDANCE_Init(CartInfo *info);
|
||||
void UNLOneBus_Init(CartInfo *info);
|
||||
void UNLSC127_Init(CartInfo *info);
|
||||
|
||||
void UNLEDU2000_Init(CartInfo *info);
|
||||
|
|
|
|||
|
|
@ -260,6 +260,7 @@
|
|||
<ClCompile Include="..\src\boards\88.cpp" />
|
||||
<ClCompile Include="..\src\boards\90.cpp" />
|
||||
<ClCompile Include="..\src\boards\95.cpp" />
|
||||
<ClCompile Include="..\src\boards\onebus.cpp" />
|
||||
<ClCompile Include="..\src\boards\__dummy_mapper.cpp">
|
||||
<ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">true</ExcludedFromBuild>
|
||||
</ClCompile>
|
||||
|
|
@ -274,7 +275,6 @@
|
|||
<ClCompile Include="..\src\boards\bonza.cpp" />
|
||||
<ClCompile Include="..\src\boards\bs-5.cpp" />
|
||||
<ClCompile Include="..\src\boards\copyfami_mmc3.cpp" />
|
||||
<ClCompile Include="..\src\boards\dance.cpp" />
|
||||
<ClCompile Include="..\src\boards\datalatch.cpp" />
|
||||
<ClCompile Include="..\src\boards\deirom.cpp" />
|
||||
<ClCompile Include="..\src\boards\dream.cpp" />
|
||||
|
|
|
|||
|
|
@ -196,9 +196,6 @@
|
|||
<ClCompile Include="..\src\boards\copyfami_mmc3.cpp">
|
||||
<Filter>boards</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\src\boards\dance.cpp">
|
||||
<Filter>boards</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\src\boards\datalatch.cpp">
|
||||
<Filter>boards</Filter>
|
||||
</ClCompile>
|
||||
|
|
@ -910,6 +907,9 @@
|
|||
<ClCompile Include="..\src\drivers\common\nes_ntsc.c">
|
||||
<Filter>drivers\common</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\src\boards\onebus.cpp">
|
||||
<Filter>boards</Filter>
|
||||
</ClCompile>
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<ClInclude Include="..\src\cart.h">
|
||||
|
|
|
|||
Loading…
Reference in New Issue