Fix compilation issues with __fastcall changes
This commit is contained in:
parent
2e0475630a
commit
ec30af942c
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@ -1006,7 +1006,7 @@ static void palette_write(INT32 offset, INT32 offset2)
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DrvPalette[offset3] = BurnHighCol((r << 3) | (r >> 2), (g << 3) | (g >> 2), (b << 3) | (b >> 2), 0);
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}
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UINT8 __fastcall m72_main_read(UINT32 address)
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UINT8 m72_main_read(UINT32 address)
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{
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if ((address & 0xff000) == 0xb0000) {
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return protection_read(address);
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@ -1015,7 +1015,7 @@ UINT8 __fastcall m72_main_read(UINT32 address)
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return 0;
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}
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void __fastcall m72_main_write(UINT32 address, UINT8 data)
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void m72_main_write(UINT32 address, UINT8 data)
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{
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if ((address & 0xff000) == 0xb0000) {
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protection_write(address, data);
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@ -1037,7 +1037,7 @@ void __fastcall m72_main_write(UINT32 address, UINT8 data)
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}
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}
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void __fastcall rtype2_main_write(UINT32 address, UINT8 data)
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void rtype2_main_write(UINT32 address, UINT8 data)
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{
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if ((address & 0xff000) == 0xc8000 || (address & 0xff000) == 0xa0000 || (address & 0xff000) == 0xcc000) {
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if (address & 1) data = 0xff;
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@ -1074,7 +1074,7 @@ void __fastcall rtype2_main_write(UINT32 address, UINT8 data)
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}
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}
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void __fastcall m72_main_write_port(UINT32 port, UINT8 data)
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void m72_main_write_port(UINT32 port, UINT8 data)
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{
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// bprintf (0, _T("%2.2x, %2.2x wp\n"), port, data);
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@ -1193,7 +1193,7 @@ static UINT16 poundfor_trackball_r(INT32 offset)
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return 0;
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}
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UINT8 __fastcall m72_main_read_port(UINT32 port)
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UINT8 m72_main_read_port(UINT32 port)
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{
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switch (port)
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{
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@ -822,7 +822,7 @@ static inline void update_palette_entry(INT32 entry)
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DrvPalette[entry / 2] = BurnHighCol(r, g, b, 0);
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}
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void __fastcall m90_main_write(UINT32 address, UINT8 data)
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void m90_main_write(UINT32 address, UINT8 data)
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{
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if ((address & 0xffc00) == 0xe0000) {
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DrvPalRAM[address & 0x3ff] = data;
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@ -831,12 +831,12 @@ void __fastcall m90_main_write(UINT32 address, UINT8 data)
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}
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}
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UINT8 __fastcall m90_main_read(UINT32 /*address*/)
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UINT8 m90_main_read(UINT32 /*address*/)
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{
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return 0;
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}
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void __fastcall m90_main_write_port(UINT32 port, UINT8 data)
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void m90_main_write_port(UINT32 port, UINT8 data)
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{
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if ((port & ~0x0f) == 0x80) {
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m90_video_control[port & 0x0f] = data;
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@ -875,7 +875,7 @@ void __fastcall m90_main_write_port(UINT32 port, UINT8 data)
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}
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}
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UINT8 __fastcall m90_main_read_port(UINT32 port)
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UINT8 m90_main_read_port(UINT32 port)
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{
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switch (port)
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{
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@ -1239,7 +1239,7 @@ static void m92YM2151IRQHandler(INT32 nStatus)
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VezRun(100);
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}
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UINT8 __fastcall m92ReadByte(UINT32 address)
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UINT8 m92ReadByte(UINT32 address)
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{
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if ((address & 0xff800) == 0xf8800 )
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return DrvPalRAM[ address - 0xf8800 + PalBank ];
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@ -1255,7 +1255,7 @@ UINT8 __fastcall m92ReadByte(UINT32 address)
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return 0;
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}
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void __fastcall m92WriteByte(UINT32 address, UINT8 data)
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void m92WriteByte(UINT32 address, UINT8 data)
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{
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if ((address & 0xff800) == 0xf8800 ) {
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DrvPalRAM[ address - 0xf8800 + PalBank ] = data;
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@ -1300,7 +1300,7 @@ void __fastcall m92WriteByte(UINT32 address, UINT8 data)
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}
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}
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UINT8 __fastcall m92ReadPort(UINT32 port)
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UINT8 m92ReadPort(UINT32 port)
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{
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switch (port)
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{
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@ -1348,7 +1348,7 @@ static void set_pf_scroll(INT32 layer)
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ptr->scrolly = (pf_control[layer][0] << 0) | (pf_control[layer][1] << 8);
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}
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void __fastcall m92WritePort(UINT32 port, UINT8 data)
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void m92WritePort(UINT32 port, UINT8 data)
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{
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switch (port)
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{
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@ -1444,7 +1444,7 @@ void __fastcall m92WritePort(UINT32 port, UINT8 data)
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}
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}
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UINT8 __fastcall m92SndReadByte(UINT32 address)
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UINT8 m92SndReadByte(UINT32 address)
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{
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if ((address & 0xfffc0) == 0xa8000) {
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return iremga20_read( 0, (address & 0x0003f) / 2 );
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@ -1468,7 +1468,7 @@ UINT8 __fastcall m92SndReadByte(UINT32 address)
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return 0;
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}
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void __fastcall m92SndWriteByte(UINT32 address, UINT8 data)
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void m92SndWriteByte(UINT32 address, UINT8 data)
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{
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if ((address & 0xfffc0) == 0xa8000) {
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iremga20_write( 0, (address & 0x0003f) / 2, data );
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@ -320,7 +320,7 @@ INT32 raidenSynchroniseStream(INT32 nSoundRate)
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return (INT64)ZetTotalCycles() * nSoundRate / 3579545;
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}
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UINT8 __fastcall raidenReadByte(UINT32 vezAddress)
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UINT8 raidenReadByte(UINT32 vezAddress)
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{
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switch (vezAddress) {
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case 0x0b000: return ~DrvInput[1];
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@ -349,7 +349,7 @@ UINT8 __fastcall raidenReadByte(UINT32 vezAddress)
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return 0;
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}
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void __fastcall raidenWriteByte(UINT32 vezAddress, UINT8 byteValue)
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void raidenWriteByte(UINT32 vezAddress, UINT8 byteValue)
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{
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switch (vezAddress) {
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@ -398,7 +398,7 @@ void __fastcall raidenWriteByte(UINT32 vezAddress, UINT8 byteValue)
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}
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}
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UINT8 __fastcall raidenAltReadByte(UINT32 vezAddress)
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UINT8 raidenAltReadByte(UINT32 vezAddress)
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{
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switch (vezAddress) {
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case 0x0a000:
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@ -427,7 +427,7 @@ UINT8 __fastcall raidenAltReadByte(UINT32 vezAddress)
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return 0;
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}
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void __fastcall raidenAltWriteByte(UINT32 vezAddress, UINT8 byteValue)
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void raidenAltWriteByte(UINT32 vezAddress, UINT8 byteValue)
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{
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switch (vezAddress) {
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@ -474,7 +474,7 @@ void __fastcall raidenAltWriteByte(UINT32 vezAddress, UINT8 byteValue)
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}
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}
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UINT8 __fastcall raidenSubReadByte(UINT32 vezAddress)
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UINT8 raidenSubReadByte(UINT32 vezAddress)
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{
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switch (vezAddress) {
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case 0x04008: {
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@ -493,7 +493,7 @@ UINT8 __fastcall raidenSubReadByte(UINT32 vezAddress)
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return 0;
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}
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void __fastcall raidenSubWriteByte(UINT32 vezAddress, UINT8 byteValue)
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void raidenSubWriteByte(UINT32 vezAddress, UINT8 byteValue)
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{
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if ((vezAddress & 0xFF000) == 0x03000 ) {
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vezAddress -= 0x03000;
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@ -151,7 +151,7 @@ static void sync_sound_cpu()
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}
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}
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void __fastcall master_write(UINT32 address, UINT8 data)
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void master_write(UINT32 address, UINT8 data)
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{
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switch (address)
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{
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@ -180,7 +180,7 @@ void __fastcall master_write(UINT32 address, UINT8 data)
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}
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}
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UINT8 __fastcall master_read(UINT32 address)
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UINT8 master_read(UINT32 address)
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{
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switch (address)
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{
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@ -220,7 +220,7 @@ static inline void palette_update_entry(INT32 entry)
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DrvPalette[entry] = BurnHighCol((r<<4)|r, (g<<4)|g, (b<<4)|b, 0);
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}
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void __fastcall slave_write(UINT32 address, UINT8 data)
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void slave_write(UINT32 address, UINT8 data)
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{
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if ((address & 0xff000) == 0x07000) {
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DrvPalRAM[(address & 0xfff)] = data;
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@ -73,7 +73,7 @@ static struct BurnDIPInfo DrvDIPList[]=
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STDDIPINFO(Drv)
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void mrflea_write(UINT16 a, UINT8 d)
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void __fastcall mrflea_write(UINT16 a, UINT8 d)
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{
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if (a >= 0xe000 && a <= 0xe7ff) // video ram
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{
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@ -107,7 +107,7 @@ void mrflea_write(UINT16 a, UINT8 d)
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}
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void mrflea_out_port(UINT16 a, UINT8 data)
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void __fastcall mrflea_out_port(UINT16 a, UINT8 data)
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{
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switch (a & 0xff)
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{
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@ -134,7 +134,7 @@ void mrflea_out_port(UINT16 a, UINT8 data)
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}
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}
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UINT8 mrflea_in_port(UINT16 a)
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UINT8 __fastcall mrflea_in_port(UINT16 a)
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{
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switch (a & 0xff)
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{
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@ -152,7 +152,7 @@ UINT8 mrflea_in_port(UINT16 a)
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return 0;
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}
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void mrflea_cpu1_out_port(UINT16 a, UINT8 data)
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void __fastcall mrflea_cpu1_out_port(UINT16 a, UINT8 data)
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{
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switch (a & 0xff)
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{
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@ -194,7 +194,7 @@ void mrflea_cpu1_out_port(UINT16 a, UINT8 data)
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}
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}
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UINT8 mrflea_cpu1_in_port(UINT16 a)
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UINT8 __fastcall mrflea_cpu1_in_port(UINT16 a)
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{
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UINT8 ret = 0;
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@ -400,7 +400,7 @@ void __fastcall batsugunWriteWord(UINT32 sekAddress, UINT16 wordValue)
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}
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}
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void __fastcall batsugun_v25_write(UINT32 address, UINT8 data)
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void batsugun_v25_write(UINT32 address, UINT8 data)
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{
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switch (address)
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{
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@ -418,7 +418,7 @@ void __fastcall batsugun_v25_write(UINT32 address, UINT8 data)
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}
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}
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UINT8 __fastcall batsugun_v25_read(UINT32 address)
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UINT8 batsugun_v25_read(UINT32 address)
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{
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switch (address)
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{
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@ -432,7 +432,7 @@ UINT8 __fastcall batsugun_v25_read(UINT32 address)
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return 0;
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}
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UINT8 __fastcall batsugun_v25_read_port(UINT32 port)
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UINT8 batsugun_v25_read_port(UINT32 port)
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{
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switch (port)
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{
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@ -460,7 +460,7 @@ void __fastcall dogyuunWriteWord(UINT32 sekAddress, UINT16 wordValue)
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}
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}
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void __fastcall dogyuun_v25_write(UINT32 address, UINT8 data)
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void dogyuun_v25_write(UINT32 address, UINT8 data)
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{
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switch (address)
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{
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@ -478,7 +478,7 @@ void __fastcall dogyuun_v25_write(UINT32 address, UINT8 data)
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}
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}
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UINT8 __fastcall dogyuun_v25_read(UINT32 address)
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UINT8 dogyuun_v25_read(UINT32 address)
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{
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switch (address)
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{
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@ -492,7 +492,7 @@ UINT8 __fastcall dogyuun_v25_read(UINT32 address)
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return 0;
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}
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UINT8 __fastcall dogyuun_v25_read_port(UINT32 port)
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UINT8 dogyuun_v25_read_port(UINT32 port)
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{
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switch (port)
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{
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@ -208,7 +208,7 @@ void __fastcall fixeightWriteWord(UINT32 sekAddress, UINT16 wordValue)
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}
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}
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void __fastcall fixeight_v25_write(UINT32 address, UINT8 data)
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void fixeight_v25_write(UINT32 address, UINT8 data)
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{
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switch (address)
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{
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@ -226,7 +226,7 @@ void __fastcall fixeight_v25_write(UINT32 address, UINT8 data)
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}
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}
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UINT8 __fastcall fixeight_v25_read(UINT32 address)
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UINT8 fixeight_v25_read(UINT32 address)
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{
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switch (address)
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{
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@ -243,7 +243,7 @@ UINT8 __fastcall fixeight_v25_read(UINT32 address)
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return 0;
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}
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UINT8 __fastcall fixeight_v25_read_port(UINT32 port)
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UINT8 fixeight_v25_read_port(UINT32 port)
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{
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switch (port)
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{
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@ -254,7 +254,7 @@ UINT8 __fastcall fixeight_v25_read_port(UINT32 port)
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return 0;
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}
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void __fastcall fixeight_v25_write_port(UINT32 port, UINT8 data)
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void fixeight_v25_write_port(UINT32 port, UINT8 data)
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{
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switch (port)
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{
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@ -313,7 +313,7 @@ void __fastcall kbashWriteWord(UINT32 sekAddress, UINT16 wordValue)
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}
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}
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void __fastcall kbash_v25_write(UINT32 address, UINT8 data)
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void kbash_v25_write(UINT32 address, UINT8 data)
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{
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switch (address)
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{
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@ -331,7 +331,7 @@ void __fastcall kbash_v25_write(UINT32 address, UINT8 data)
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}
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}
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UINT8 __fastcall kbash_v25_read(UINT32 address)
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UINT8 kbash_v25_read(UINT32 address)
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{
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switch (address)
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{
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@ -345,7 +345,7 @@ UINT8 __fastcall kbash_v25_read(UINT32 address)
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return 0;
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}
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UINT8 __fastcall kbash_v25_read_port(UINT32 port)
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UINT8 kbash_v25_read_port(UINT32 port)
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{
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switch (port)
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{
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@ -366,7 +366,7 @@ void __fastcall vfiveWriteWord(UINT32 sekAddress, UINT16 wordValue)
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}
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}
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void __fastcall vfive_v25_write(UINT32 address, UINT8 data)
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void vfive_v25_write(UINT32 address, UINT8 data)
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{
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switch (address)
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{
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@ -380,7 +380,7 @@ void __fastcall vfive_v25_write(UINT32 address, UINT8 data)
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}
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}
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UINT8 __fastcall vfive_v25_read(UINT32 address)
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UINT8 vfive_v25_read(UINT32 address)
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{
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switch (address)
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{
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@ -391,7 +391,7 @@ UINT8 __fastcall vfive_v25_read(UINT32 address)
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return 0;
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}
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UINT8 __fastcall vfive_v25_read_port(UINT32 port)
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UINT8 vfive_v25_read_port(UINT32 port)
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{
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switch (port)
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{
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