add new WIP (work-in-progress) / unfinished driver
This commit is contained in:
dinkc64
parent
ee8fa376b3
commit
56fa5ab559
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@ -2,13 +2,13 @@ alldir = burn burn/devices burn/snd burn/drv burn/drv/atari burn/drv/capcom bur
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burn/drv/galaxian burn/drv/irem burn/drv/konami burn/drv/megadrive burn/drv/midway burn/drv/pce burn/drv/pst90s burn/drv/pre90s burn/drv/neogeo burn/drv/nes \
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burn/drv/pgm burn/drv/psikyo burn/drv/sega burn/drv/sg1000 burn/drv/sms burn/drv/msx burn/drv/spectrum burn/drv/taito \
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burn/drv/toaplan cpu cpu/a68k cpu/arm cpu/arm7 cpu/e132xs cpu/f8 cpu/h6280 cpu/hd6309 cpu/i386 cpu/i8039 cpu/i8x41 cpu/i8051 cpu/adsp2100 cpu/konami cpu/m377 cpu/mips3 cpu/m68k \
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cpu/m6502 cpu/m6800 cpu/m6805 cpu/m6809 cpu/nec cpu/pic16c5x cpu/s2650 cpu/tlcs90 cpu/tlcs900 cpu/sh2 cpu/tms32010 cpu/tms34 cpu/upd7725 cpu/upd7810 \
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cpu/m6502 cpu/m6800 cpu/m6805 cpu/m6809 cpu/nec cpu/pic16c5x cpu/s2650 cpu/tlcs90 cpu/tlcs900 cpu/sh2 cpu/sh4 cpu/tms32010 cpu/tms34 cpu/upd7725 cpu/upd7810 \
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cpu/v60 cpu/z80 cpu/z180
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drvsrc = d_akkaarrh.o d_arcadecl.o d_atarig1.o d_badlands.o d_batman.o d_blstroid.o d_eprom.o d_gauntlet.o d_klax.o d_missile.o d_offtwall.o d_rampart.o \
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d_relief.o d_shuuz.o d_skullxbo.o d_thunderj.o d_toobin.o d_vindictr.o d_xybots.o \
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\
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d_dodonpachi.o d_donpachi.o d_esprade.o d_feversos.o d_gaia.o d_guwange.o d_hotdogst.o d_korokoro.o d_mazinger.o d_metmqstr.o d_pwrinst2.o \
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d_cv1k.o d_dodonpachi.o d_donpachi.o d_esprade.o d_feversos.o d_gaia.o d_guwange.o d_hotdogst.o d_korokoro.o d_mazinger.o d_metmqstr.o d_pwrinst2.o \
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d_sailormn.o d_tjumpman.o d_uopoko.o \
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\
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d_cps1.o \
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@ -101,7 +101,7 @@ drvsrc = d_akkaarrh.o d_arcadecl.o d_atarig1.o d_badlands.o d_batman.o d_blstro
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depobj = burn.o burn_bitmap.o burn_gun.o burn_led.o burn_shift.o burn_memory.o burn_pal.o burn_sound.o burn_sound_c.o cheat.o debug_track.o hiscore.o \
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load.o tilemap_generic.o tiles_generic.o timer.o vector.o \
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\
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6821pia.o 8255ppi.o 8257dma.o c169.o atariic.o atarijsa.o atarimo.o atarirle.o atarivad.o avgdvg.o bsmt2000.o decobsmt.o ds2404.o earom.o eeprom.o gaelco_crypt.o i4x00.o intelfsh.o \
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6821pia.o 8255ppi.o 8257dma.o c169.o atariic.o atarijsa.o atarimo.o atarirle.o atarivad.o avgdvg.o bsmt2000.o decobsmt.o ds2404.o earom.o eeprom.o epic12.o gaelco_crypt.o i4x00.o intelfsh.o \
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joyprocess.o nb1414m4.o nb1414m4_8bit.o nmk004.o nmk112.o k1ge.o kaneko_tmap.o mathbox.o mb87078.o mermaid.o midcsd.o midsat.o midsg.o midssio.o midtcs.o \
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namco_c45.o namcoio.o pandora.o poly.o qs1000.o resnet.o rtc9701.o seibucop.o seibusnd.o serflash.o sknsspr.o slapstic.o st0020.o t5182.o timekpr.o tlc34076.o tms34061.o v3021.o vdc.o \
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tms9928a.o watchdog.o x2212.o \
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@ -116,7 +116,7 @@ depobj = burn.o burn_bitmap.o burn_gun.o burn_led.o burn_shift.o burn_memory.o
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m68000_intf.o mips3_intf.o nec_intf.o pic16c5x_intf.o s2650_intf.o tlcs90_intf.o tms34010.o tms34_intf.o z80_intf.o \
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z180_intf.o \
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\
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arm.o arm7.o e132xs.o h6280.o hd6309.o i386.o i8039.o m37710.o mcs48.o mcs51.o konami.o m6502.o m6800.o m6805.o m6809.o nec.o pic16c5x.o s2650.o sh2.o tms32010.o tlcs90.o tlcs900.o \
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arm.o arm7.o e132xs.o h6280.o hd6309.o i386.o i8039.o m37710.o mcs48.o mcs51.o konami.o m6502.o m6800.o m6805.o m6809.o nec.o pic16c5x.o s2650.o sh2.o sh4.o tms32010.o tlcs90.o tlcs900.o \
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upd7725.o upd7810.o v25.o v60.o z80.o z80daisy.o z80ctc.o z80pio.o z180.o \
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\
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cop0.o cop1.o mips3.o \
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@ -550,6 +550,7 @@ INT32 GetIpsesMaxLen(char* rom_name);
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#define HARDWARE_CAVE_68K_Z80 (HARDWARE_PREFIX_CAVE | 0x0001)
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#define HARDWARE_CAVE_M6295 (0x0002)
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#define HARDWARE_CAVE_YM2151 (0x0004)
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#define HARDWARE_CAVE_CV1000 (HARDWARE_PREFIX_CAVE | 0x00010000)
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#define HARDWARE_IGS_PGM (HARDWARE_PREFIX_IGS_PGM)
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#define HARDWARE_IGS_USE_ARM_CPU (0x0001)
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@ -0,0 +1,935 @@
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/* emulation of Altera Cyclone EPIC12 FPGA programmed as a blitter */
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#include "burnint.h"
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#include "tiles_generic.h"
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#include "sh4_intf.h"
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#include "thready.h"
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struct rectangle
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{
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// mame-compatible rectangle object
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INT32 min_x;
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INT32 max_x;
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INT32 min_y;
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INT32 max_y;
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rectangle(INT32 minx = 0, INT32 maxx = 0, INT32 miny = 0, INT32 maxy = 0) {
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set(minx, maxx, miny, maxy);
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}
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void set(INT32 minx, INT32 maxx, INT32 miny, INT32 maxy) {
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min_x = minx; max_x = maxx;
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min_y = miny; max_y = maxy;
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}
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rectangle operator &= (const rectangle &other) {
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if (min_x < other.min_x) min_x = other.min_x;
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if (min_y < other.min_y) min_y = other.min_y;
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if (max_x > other.max_x) max_x = other.max_x;
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if (max_y > other.max_y) max_y = other.max_y;
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if (min_y > max_y) min_y = max_y;
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if (min_x > max_x) min_x = max_x;
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return *this;
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}
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};
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static UINT16* m_ram16;
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static UINT32 m_gfx_addr;
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static UINT32 m_gfx_scroll_0_x, m_gfx_scroll_0_y;
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static UINT32 m_gfx_scroll_1_x, m_gfx_scroll_1_y;
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static int m_gfx_size;
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static UINT32 *m_bitmaps;
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static rectangle m_clip;
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static UINT64 epic12_device_blit_delay;
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static int m_blitter_busy;
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static UINT16* m_use_ram;
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static int m_main_ramsize; // type D has double the main ram
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static int m_main_rammask;
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static int m_delay_scale;
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static int m_burn_cycles;
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static UINT8 epic12_device_colrtable[0x20][0x40];
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static UINT8 epic12_device_colrtable_rev[0x20][0x40];
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static UINT8 epic12_device_colrtable_add[0x20][0x20];
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#include "epic12.h"
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struct _clr_t
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{
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UINT8 b,g,r,t;
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};
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typedef struct _clr_t clr_t;
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union colour_t
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{
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clr_t trgb;
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UINT32 u32;
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};
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typedef const void (*epic12_device_blitfunction)(
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const rectangle *,
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UINT32 *, /* gfx */
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int , /* src_x */
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int , /* src_y */
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const int , /* dst_x_start */
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const int , /* dst_y_start */
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int , /* dimx */
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int , /* dimy */
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const int , /* flipy */
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const UINT8 , /* s_alpha */
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const UINT8 , /* d_alpha */
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//int , /* tint */
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const clr_t * );
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#define BLIT_PARAMS const rectangle *clip, UINT32 *gfx, int src_x, int src_y, const int dst_x_start, const int dst_y_start, int dimx, int dimy, const int flipy, const UINT8 s_alpha, const UINT8 d_alpha, const clr_t *tint_clr
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static inline void pen_to_clr(UINT32 pen, clr_t *clr)
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{
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// --t- ---- rrrr r--- gggg g--- bbbb b--- format
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clr->r = (pen >> (16+3));// & 0x1f;
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clr->g = (pen >> (8+3));// & 0x1f;
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clr->b = (pen >> 3);// & 0x1f;
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// --t- ---- ---r rrrr ---g gggg ---b bbbb format
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// clr->r = (pen >> 16) & 0x1f;
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// clr->g = (pen >> 8) & 0x1f;
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// clr->b = (pen >> 0) & 0x1f;
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}
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// convert separate r,g,b biases (0..80..ff) to clr_t (-1f..0..1f)
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static inline void tint_to_clr(UINT8 r, UINT8 g, UINT8 b, clr_t *clr)
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{
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clr->r = r>>2;
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clr->g = g>>2;
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clr->b = b>>2;
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}
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// clr_t to r5g5b5
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static inline UINT32 clr_to_pen(const clr_t *clr)
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{
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// --t- ---- rrrr r--- gggg g--- bbbb b--- format
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return (clr->r << (16+3)) | (clr->g << (8+3)) | (clr->b << 3);
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// --t- ---- ---r rrrr ---g gggg ---b bbbb format
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// return (clr->r << (16)) | (clr->g << (8)) | (clr->b);
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}
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static inline void clr_add_with_clr_mul_fixed(clr_t *clr, const clr_t *clr0, const UINT8 mulfixed_val, const clr_t *mulfixed_clr0)
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{
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clr->r = epic12_device_colrtable_add[clr0->r][epic12_device_colrtable[(mulfixed_clr0->r)][mulfixed_val]];
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clr->g = epic12_device_colrtable_add[clr0->g][epic12_device_colrtable[(mulfixed_clr0->g)][mulfixed_val]];
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clr->b = epic12_device_colrtable_add[clr0->b][epic12_device_colrtable[(mulfixed_clr0->b)][mulfixed_val]];
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}
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static inline void clr_add_with_clr_mul_3param(clr_t *clr, const clr_t *clr0, const clr_t *clr1, const clr_t *clr2)
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{
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clr->r = epic12_device_colrtable_add[clr0->r][epic12_device_colrtable[(clr2->r)][(clr1->r)]];
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clr->g = epic12_device_colrtable_add[clr0->g][epic12_device_colrtable[(clr2->g)][(clr1->g)]];
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clr->b = epic12_device_colrtable_add[clr0->b][epic12_device_colrtable[(clr2->b)][(clr1->b)]];
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}
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static inline void clr_add_with_clr_square(clr_t *clr, const clr_t *clr0, const clr_t *clr1)
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{
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clr->r = epic12_device_colrtable_add[clr0->r][epic12_device_colrtable[(clr1->r)][(clr1->r)]];
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clr->g = epic12_device_colrtable_add[clr0->r][epic12_device_colrtable[(clr1->g)][(clr1->g)]];
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clr->b = epic12_device_colrtable_add[clr0->r][epic12_device_colrtable[(clr1->b)][(clr1->b)]];
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}
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static inline void clr_add_with_clr_mul_fixed_rev(clr_t *clr, const clr_t *clr0, const UINT8 val, const clr_t *clr1)
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{
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clr->r = epic12_device_colrtable_add[clr0->r][epic12_device_colrtable_rev[val][(clr1->r)]];
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clr->g = epic12_device_colrtable_add[clr0->g][epic12_device_colrtable_rev[val][(clr1->g)]];
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clr->b = epic12_device_colrtable_add[clr0->b][epic12_device_colrtable_rev[val][(clr1->b)]];
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}
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static inline void clr_add_with_clr_mul_rev_3param(clr_t *clr, const clr_t *clr0, const clr_t *clr1, const clr_t *clr2)
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{
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clr->r = epic12_device_colrtable_add[clr0->r][epic12_device_colrtable_rev[(clr2->r)][(clr1->r)]];
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clr->g = epic12_device_colrtable_add[clr0->g][epic12_device_colrtable_rev[(clr2->g)][(clr1->g)]];
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clr->b = epic12_device_colrtable_add[clr0->b][epic12_device_colrtable_rev[(clr2->b)][(clr1->b)]];
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}
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static inline void clr_add_with_clr_mul_rev_square(clr_t *clr, const clr_t *clr0, const clr_t *clr1)
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{
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clr->r = epic12_device_colrtable_add[clr0->r][epic12_device_colrtable_rev[(clr1->r)][(clr1->r)]];
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clr->g = epic12_device_colrtable_add[clr0->g][epic12_device_colrtable_rev[(clr1->g)][(clr1->g)]];
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clr->b = epic12_device_colrtable_add[clr0->b][epic12_device_colrtable_rev[(clr1->b)][(clr1->b)]];
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}
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static inline void clr_add(clr_t *clr, const clr_t *clr0, const clr_t *clr1)
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{
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/*
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clr->r = clr0->r + clr1->r;
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clr->g = clr0->g + clr1->g;
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clr->b = clr0->b + clr1->b;
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*/
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// use pre-clamped lookup table
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clr->r = epic12_device_colrtable_add[clr0->r][clr1->r];
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clr->g = epic12_device_colrtable_add[clr0->g][clr1->g];
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clr->b = epic12_device_colrtable_add[clr0->b][clr1->b];
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}
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static inline void clr_mul(clr_t *clr0, const clr_t *clr1)
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{
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clr0->r = epic12_device_colrtable[(clr0->r)][(clr1->r)];
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clr0->g = epic12_device_colrtable[(clr0->g)][(clr1->g)];
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clr0->b = epic12_device_colrtable[(clr0->b)][(clr1->b)];
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}
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static inline void clr_square(clr_t *clr0, const clr_t *clr1)
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{
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clr0->r = epic12_device_colrtable[(clr1->r)][(clr1->r)];
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clr0->g = epic12_device_colrtable[(clr1->g)][(clr1->g)];
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clr0->b = epic12_device_colrtable[(clr1->b)][(clr1->b)];
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}
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static inline void clr_mul_3param(clr_t *clr0, const clr_t *clr1, const clr_t *clr2)
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{
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clr0->r = epic12_device_colrtable[(clr2->r)][(clr1->r)];
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clr0->g = epic12_device_colrtable[(clr2->g)][(clr1->g)];
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clr0->b = epic12_device_colrtable[(clr2->b)][(clr1->b)];
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}
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static inline void clr_mul_rev(clr_t *clr0, const clr_t *clr1)
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{
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clr0->r = epic12_device_colrtable_rev[(clr0->r)][(clr1->r)];
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clr0->g = epic12_device_colrtable_rev[(clr0->g)][(clr1->g)];
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clr0->b = epic12_device_colrtable_rev[(clr0->b)][(clr1->b)];
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}
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static inline void clr_mul_rev_square(clr_t *clr0, const clr_t *clr1)
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{
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clr0->r = epic12_device_colrtable_rev[(clr1->r)][(clr1->r)];
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clr0->g = epic12_device_colrtable_rev[(clr1->g)][(clr1->g)];
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clr0->b = epic12_device_colrtable_rev[(clr1->b)][(clr1->b)];
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}
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static inline void clr_mul_rev_3param(clr_t *clr0, const clr_t *clr1, const clr_t *clr2)
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{
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clr0->r = epic12_device_colrtable_rev[(clr2->r)][(clr1->r)];
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clr0->g = epic12_device_colrtable_rev[(clr2->g)][(clr1->g)];
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clr0->b = epic12_device_colrtable_rev[(clr2->b)][(clr1->b)];
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}
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static inline void clr_mul_fixed(clr_t *clr, const UINT8 val, const clr_t *clr0)
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{
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clr->r = epic12_device_colrtable[val][(clr0->r)];
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clr->g = epic12_device_colrtable[val][(clr0->g)];
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clr->b = epic12_device_colrtable[val][(clr0->b)];
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}
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static inline void clr_mul_fixed_rev(clr_t *clr, const UINT8 val, const clr_t *clr0)
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{
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clr->r = epic12_device_colrtable_rev[val][(clr0->r)];
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clr->g = epic12_device_colrtable_rev[val][(clr0->g)];
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clr->b = epic12_device_colrtable_rev[val][(clr0->b)];
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}
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static inline void clr_copy(clr_t *clr, const clr_t *clr0)
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{
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clr->r = clr0->r;
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clr->g = clr0->g;
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clr->b = clr0->b;
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}
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// (1|s|d) * s_factor * s + (1|s|d) * d_factor * d
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// 0: +alpha
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// 1: +source
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// 2: +dest
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// 3: *
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// 4: -alpha
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// 5: -source
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// 6: -dest
|
||||
// 7: *
|
||||
|
||||
#include "epic12_blit0.inc"
|
||||
#include "epic12_blit1.inc"
|
||||
#include "epic12_blit2.inc"
|
||||
#include "epic12_blit3.inc"
|
||||
#include "epic12_blit4.inc"
|
||||
#include "epic12_blit5.inc"
|
||||
#include "epic12_blit6.inc"
|
||||
#include "epic12_blit7.inc"
|
||||
#include "epic12_blit8.inc"
|
||||
|
||||
static UINT8 *dips; // pointer to cv1k's dips
|
||||
|
||||
static void blitter_delay_callback(int)
|
||||
{
|
||||
m_blitter_busy = 0;
|
||||
//bprintf(0, _T("cyc @ blitdelay callback: %d\n"), Sh3TotalCycles());
|
||||
}
|
||||
|
||||
static void gfx_exec(); // forward
|
||||
|
||||
static void run_blitter_cb()
|
||||
{
|
||||
epic12_device_blit_delay = 0;
|
||||
gfx_exec();
|
||||
}
|
||||
|
||||
void epic12_exit()
|
||||
{
|
||||
BurnFree(m_bitmaps);
|
||||
|
||||
thready.exit();
|
||||
}
|
||||
|
||||
void epic12_init(INT32 ram_size, UINT16 *ram, UINT8 *dippy)
|
||||
{
|
||||
m_main_ramsize = ram_size;
|
||||
m_main_rammask = ram_size - 1;
|
||||
|
||||
m_use_ram = m_ram16 = ram;
|
||||
|
||||
dips = dippy;
|
||||
|
||||
m_gfx_size = 0x2000 * 0x1000;
|
||||
m_bitmaps = (UINT32*)BurnMalloc (0x2000 * 0x1000 * 4);
|
||||
|
||||
m_clip.set(0, 0x2000-1, 0, 0x1000-1);
|
||||
|
||||
m_delay_scale = 50;
|
||||
m_blitter_busy = 0;
|
||||
m_gfx_addr = 0;
|
||||
m_gfx_scroll_0_x = 0;
|
||||
m_gfx_scroll_0_y = 0;
|
||||
m_gfx_scroll_1_x = 0;
|
||||
m_gfx_scroll_1_y = 0;
|
||||
epic12_device_blit_delay = 0;
|
||||
|
||||
thready.init(run_blitter_cb);
|
||||
|
||||
sh4_set_cave_blitter_delay_func(blitter_delay_callback);
|
||||
}
|
||||
|
||||
void epic12_set_blitterthreading(INT32 value)
|
||||
{
|
||||
thready.set_threading(value);
|
||||
}
|
||||
|
||||
void epic12_set_blitterdelay(INT32 delay, INT32 burn_cycles)
|
||||
{
|
||||
m_delay_scale = delay;
|
||||
m_burn_cycles = burn_cycles;
|
||||
}
|
||||
|
||||
void epic12_reset()
|
||||
{
|
||||
// cache table to avoid divides in blit code, also pre-clamped
|
||||
int x,y;
|
||||
for (y=0;y<0x40;y++)
|
||||
{
|
||||
for (x=0;x<0x20;x++)
|
||||
{
|
||||
epic12_device_colrtable[x][y] = (x*y) / 0x1f;
|
||||
if (epic12_device_colrtable[x][y]>0x1f) epic12_device_colrtable[x][y] = 0x1f;
|
||||
|
||||
epic12_device_colrtable_rev[x^0x1f][y] = (x*y) / 0x1f;
|
||||
if (epic12_device_colrtable_rev[x^0x1f][y]>0x1f) epic12_device_colrtable_rev[x^0x1f][y] = 0x1f;
|
||||
}
|
||||
}
|
||||
|
||||
// preclamped add table
|
||||
for (y=0;y<0x20;y++)
|
||||
{
|
||||
for (x=0;x<0x20;x++)
|
||||
{
|
||||
epic12_device_colrtable_add[x][y] = (x+y);
|
||||
if (epic12_device_colrtable_add[x][y]>0x1f) epic12_device_colrtable_add[x][y] = 0x1f;
|
||||
}
|
||||
}
|
||||
|
||||
m_blitter_busy = 0;
|
||||
m_gfx_addr = 0;
|
||||
m_gfx_scroll_0_x = 0;
|
||||
m_gfx_scroll_0_y = 0;
|
||||
m_gfx_scroll_1_x = 0;
|
||||
m_gfx_scroll_1_y = 0;
|
||||
epic12_device_blit_delay = 0;
|
||||
}
|
||||
|
||||
static UINT16 READ_NEXT_WORD(UINT32 *addr)
|
||||
{
|
||||
UINT16 data = m_use_ram[((*addr & m_main_rammask) >> 1)];
|
||||
|
||||
*addr += 2;
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
static void gfx_upload(UINT32 *addr)
|
||||
{
|
||||
UINT32 x,y, dst_p,dst_x_start,dst_y_start, dimx,dimy;
|
||||
UINT32 *dst;
|
||||
|
||||
// 0x20000000
|
||||
READ_NEXT_WORD(addr);
|
||||
READ_NEXT_WORD(addr);
|
||||
|
||||
// 0x99999999
|
||||
READ_NEXT_WORD(addr);
|
||||
READ_NEXT_WORD(addr);
|
||||
|
||||
dst_x_start = READ_NEXT_WORD(addr);
|
||||
dst_y_start = READ_NEXT_WORD(addr);
|
||||
|
||||
dst_p = 0;
|
||||
dst_x_start &= 0x1fff;
|
||||
dst_y_start &= 0x0fff;
|
||||
|
||||
dimx = (READ_NEXT_WORD(addr) & 0x1fff) + 1;
|
||||
dimy = (READ_NEXT_WORD(addr) & 0x0fff) + 1;
|
||||
|
||||
//bprintf(0, _T("GFX COPY: DST %02X,%02X,%03X DIM %02X,%03X\n"), dst_p,dst_x_start,dst_y_start, dimx,dimy);
|
||||
|
||||
for (y = 0; y < dimy; y++)
|
||||
{
|
||||
//dst = &m_bitmaps->pix(dst_y_start + y, 0);
|
||||
dst = m_bitmaps + (dst_y_start + y) * 0x2000;
|
||||
|
||||
dst += dst_x_start;
|
||||
|
||||
for (x = 0; x < dimx; x++)
|
||||
{
|
||||
UINT16 pendat = READ_NEXT_WORD(addr);
|
||||
// real hw would upload the gfxword directly, but our VRAM is 32-bit, so convert it.
|
||||
//dst[dst_x_start + x] = pendat;
|
||||
*dst++ = ((pendat&0x8000)<<14) | ((pendat&0x7c00)<<9) | ((pendat&0x03e0)<<6) | ((pendat&0x001f)<<3); // --t- ---- rrrr r--- gggg g--- bbbb b--- format
|
||||
//dst[dst_x_start + x] = ((pendat&0x8000)<<14) | ((pendat&0x7c00)<<6) | ((pendat&0x03e0)<<3) | ((pendat&0x001f)<<0); // --t- ---- ---r rrrr ---g gggg ---b bbbb format
|
||||
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#define draw_params &m_clip, m_bitmaps,src_x,src_y, x,y, dimx,dimy, flipy, s_alpha, d_alpha, &tint_clr
|
||||
|
||||
|
||||
|
||||
static epic12_device_blitfunction epic12_device_f0_ti1_tr1_blit_funcs[] =
|
||||
{
|
||||
draw_sprite_f0_ti1_tr1_s0_d0, draw_sprite_f0_ti1_tr1_s1_d0, draw_sprite_f0_ti1_tr1_s2_d0, draw_sprite_f0_ti1_tr1_s3_d0, draw_sprite_f0_ti1_tr1_s4_d0, draw_sprite_f0_ti1_tr1_s5_d0, draw_sprite_f0_ti1_tr1_s6_d0, draw_sprite_f0_ti1_tr1_s7_d0,
|
||||
draw_sprite_f0_ti1_tr1_s0_d1, draw_sprite_f0_ti1_tr1_s1_d1, draw_sprite_f0_ti1_tr1_s2_d1, draw_sprite_f0_ti1_tr1_s3_d1, draw_sprite_f0_ti1_tr1_s4_d1, draw_sprite_f0_ti1_tr1_s5_d1, draw_sprite_f0_ti1_tr1_s6_d1, draw_sprite_f0_ti1_tr1_s7_d1,
|
||||
draw_sprite_f0_ti1_tr1_s0_d2, draw_sprite_f0_ti1_tr1_s1_d2, draw_sprite_f0_ti1_tr1_s2_d2, draw_sprite_f0_ti1_tr1_s3_d2, draw_sprite_f0_ti1_tr1_s4_d2, draw_sprite_f0_ti1_tr1_s5_d2, draw_sprite_f0_ti1_tr1_s6_d2, draw_sprite_f0_ti1_tr1_s7_d2,
|
||||
draw_sprite_f0_ti1_tr1_s0_d3, draw_sprite_f0_ti1_tr1_s1_d3, draw_sprite_f0_ti1_tr1_s2_d3, draw_sprite_f0_ti1_tr1_s3_d3, draw_sprite_f0_ti1_tr1_s4_d3, draw_sprite_f0_ti1_tr1_s5_d3, draw_sprite_f0_ti1_tr1_s6_d3, draw_sprite_f0_ti1_tr1_s7_d3,
|
||||
draw_sprite_f0_ti1_tr1_s0_d4, draw_sprite_f0_ti1_tr1_s1_d4, draw_sprite_f0_ti1_tr1_s2_d4, draw_sprite_f0_ti1_tr1_s3_d4, draw_sprite_f0_ti1_tr1_s4_d4, draw_sprite_f0_ti1_tr1_s5_d4, draw_sprite_f0_ti1_tr1_s6_d4, draw_sprite_f0_ti1_tr1_s7_d4,
|
||||
draw_sprite_f0_ti1_tr1_s0_d5, draw_sprite_f0_ti1_tr1_s1_d5, draw_sprite_f0_ti1_tr1_s2_d5, draw_sprite_f0_ti1_tr1_s3_d5, draw_sprite_f0_ti1_tr1_s4_d5, draw_sprite_f0_ti1_tr1_s5_d5, draw_sprite_f0_ti1_tr1_s6_d5, draw_sprite_f0_ti1_tr1_s7_d5,
|
||||
draw_sprite_f0_ti1_tr1_s0_d6, draw_sprite_f0_ti1_tr1_s1_d6, draw_sprite_f0_ti1_tr1_s2_d6, draw_sprite_f0_ti1_tr1_s3_d6, draw_sprite_f0_ti1_tr1_s4_d6, draw_sprite_f0_ti1_tr1_s5_d6, draw_sprite_f0_ti1_tr1_s6_d6, draw_sprite_f0_ti1_tr1_s7_d6,
|
||||
draw_sprite_f0_ti1_tr1_s0_d7, draw_sprite_f0_ti1_tr1_s1_d7, draw_sprite_f0_ti1_tr1_s2_d7, draw_sprite_f0_ti1_tr1_s3_d7, draw_sprite_f0_ti1_tr1_s4_d7, draw_sprite_f0_ti1_tr1_s5_d7, draw_sprite_f0_ti1_tr1_s6_d7, draw_sprite_f0_ti1_tr1_s7_d7,
|
||||
};
|
||||
|
||||
static epic12_device_blitfunction epic12_device_f0_ti1_tr0_blit_funcs[] =
|
||||
{
|
||||
draw_sprite_f0_ti1_tr0_s0_d0, draw_sprite_f0_ti1_tr0_s1_d0, draw_sprite_f0_ti1_tr0_s2_d0, draw_sprite_f0_ti1_tr0_s3_d0, draw_sprite_f0_ti1_tr0_s4_d0, draw_sprite_f0_ti1_tr0_s5_d0, draw_sprite_f0_ti1_tr0_s6_d0, draw_sprite_f0_ti1_tr0_s7_d0,
|
||||
draw_sprite_f0_ti1_tr0_s0_d1, draw_sprite_f0_ti1_tr0_s1_d1, draw_sprite_f0_ti1_tr0_s2_d1, draw_sprite_f0_ti1_tr0_s3_d1, draw_sprite_f0_ti1_tr0_s4_d1, draw_sprite_f0_ti1_tr0_s5_d1, draw_sprite_f0_ti1_tr0_s6_d1, draw_sprite_f0_ti1_tr0_s7_d1,
|
||||
draw_sprite_f0_ti1_tr0_s0_d2, draw_sprite_f0_ti1_tr0_s1_d2, draw_sprite_f0_ti1_tr0_s2_d2, draw_sprite_f0_ti1_tr0_s3_d2, draw_sprite_f0_ti1_tr0_s4_d2, draw_sprite_f0_ti1_tr0_s5_d2, draw_sprite_f0_ti1_tr0_s6_d2, draw_sprite_f0_ti1_tr0_s7_d2,
|
||||
draw_sprite_f0_ti1_tr0_s0_d3, draw_sprite_f0_ti1_tr0_s1_d3, draw_sprite_f0_ti1_tr0_s2_d3, draw_sprite_f0_ti1_tr0_s3_d3, draw_sprite_f0_ti1_tr0_s4_d3, draw_sprite_f0_ti1_tr0_s5_d3, draw_sprite_f0_ti1_tr0_s6_d3, draw_sprite_f0_ti1_tr0_s7_d3,
|
||||
draw_sprite_f0_ti1_tr0_s0_d4, draw_sprite_f0_ti1_tr0_s1_d4, draw_sprite_f0_ti1_tr0_s2_d4, draw_sprite_f0_ti1_tr0_s3_d4, draw_sprite_f0_ti1_tr0_s4_d4, draw_sprite_f0_ti1_tr0_s5_d4, draw_sprite_f0_ti1_tr0_s6_d4, draw_sprite_f0_ti1_tr0_s7_d4,
|
||||
draw_sprite_f0_ti1_tr0_s0_d5, draw_sprite_f0_ti1_tr0_s1_d5, draw_sprite_f0_ti1_tr0_s2_d5, draw_sprite_f0_ti1_tr0_s3_d5, draw_sprite_f0_ti1_tr0_s4_d5, draw_sprite_f0_ti1_tr0_s5_d5, draw_sprite_f0_ti1_tr0_s6_d5, draw_sprite_f0_ti1_tr0_s7_d5,
|
||||
draw_sprite_f0_ti1_tr0_s0_d6, draw_sprite_f0_ti1_tr0_s1_d6, draw_sprite_f0_ti1_tr0_s2_d6, draw_sprite_f0_ti1_tr0_s3_d6, draw_sprite_f0_ti1_tr0_s4_d6, draw_sprite_f0_ti1_tr0_s5_d6, draw_sprite_f0_ti1_tr0_s6_d6, draw_sprite_f0_ti1_tr0_s7_d6,
|
||||
draw_sprite_f0_ti1_tr0_s0_d7, draw_sprite_f0_ti1_tr0_s1_d7, draw_sprite_f0_ti1_tr0_s2_d7, draw_sprite_f0_ti1_tr0_s3_d7, draw_sprite_f0_ti1_tr0_s4_d7, draw_sprite_f0_ti1_tr0_s5_d7, draw_sprite_f0_ti1_tr0_s6_d7, draw_sprite_f0_ti1_tr0_s7_d7,
|
||||
};
|
||||
|
||||
static epic12_device_blitfunction epic12_device_f1_ti1_tr1_blit_funcs[] =
|
||||
{
|
||||
draw_sprite_f1_ti1_tr1_s0_d0, draw_sprite_f1_ti1_tr1_s1_d0, draw_sprite_f1_ti1_tr1_s2_d0, draw_sprite_f1_ti1_tr1_s3_d0, draw_sprite_f1_ti1_tr1_s4_d0, draw_sprite_f1_ti1_tr1_s5_d0, draw_sprite_f1_ti1_tr1_s6_d0, draw_sprite_f1_ti1_tr1_s7_d0,
|
||||
draw_sprite_f1_ti1_tr1_s0_d1, draw_sprite_f1_ti1_tr1_s1_d1, draw_sprite_f1_ti1_tr1_s2_d1, draw_sprite_f1_ti1_tr1_s3_d1, draw_sprite_f1_ti1_tr1_s4_d1, draw_sprite_f1_ti1_tr1_s5_d1, draw_sprite_f1_ti1_tr1_s6_d1, draw_sprite_f1_ti1_tr1_s7_d1,
|
||||
draw_sprite_f1_ti1_tr1_s0_d2, draw_sprite_f1_ti1_tr1_s1_d2, draw_sprite_f1_ti1_tr1_s2_d2, draw_sprite_f1_ti1_tr1_s3_d2, draw_sprite_f1_ti1_tr1_s4_d2, draw_sprite_f1_ti1_tr1_s5_d2, draw_sprite_f1_ti1_tr1_s6_d2, draw_sprite_f1_ti1_tr1_s7_d2,
|
||||
draw_sprite_f1_ti1_tr1_s0_d3, draw_sprite_f1_ti1_tr1_s1_d3, draw_sprite_f1_ti1_tr1_s2_d3, draw_sprite_f1_ti1_tr1_s3_d3, draw_sprite_f1_ti1_tr1_s4_d3, draw_sprite_f1_ti1_tr1_s5_d3, draw_sprite_f1_ti1_tr1_s6_d3, draw_sprite_f1_ti1_tr1_s7_d3,
|
||||
draw_sprite_f1_ti1_tr1_s0_d4, draw_sprite_f1_ti1_tr1_s1_d4, draw_sprite_f1_ti1_tr1_s2_d4, draw_sprite_f1_ti1_tr1_s3_d4, draw_sprite_f1_ti1_tr1_s4_d4, draw_sprite_f1_ti1_tr1_s5_d4, draw_sprite_f1_ti1_tr1_s6_d4, draw_sprite_f1_ti1_tr1_s7_d4,
|
||||
draw_sprite_f1_ti1_tr1_s0_d5, draw_sprite_f1_ti1_tr1_s1_d5, draw_sprite_f1_ti1_tr1_s2_d5, draw_sprite_f1_ti1_tr1_s3_d5, draw_sprite_f1_ti1_tr1_s4_d5, draw_sprite_f1_ti1_tr1_s5_d5, draw_sprite_f1_ti1_tr1_s6_d5, draw_sprite_f1_ti1_tr1_s7_d5,
|
||||
draw_sprite_f1_ti1_tr1_s0_d6, draw_sprite_f1_ti1_tr1_s1_d6, draw_sprite_f1_ti1_tr1_s2_d6, draw_sprite_f1_ti1_tr1_s3_d6, draw_sprite_f1_ti1_tr1_s4_d6, draw_sprite_f1_ti1_tr1_s5_d6, draw_sprite_f1_ti1_tr1_s6_d6, draw_sprite_f1_ti1_tr1_s7_d6,
|
||||
draw_sprite_f1_ti1_tr1_s0_d7, draw_sprite_f1_ti1_tr1_s1_d7, draw_sprite_f1_ti1_tr1_s2_d7, draw_sprite_f1_ti1_tr1_s3_d7, draw_sprite_f1_ti1_tr1_s4_d7, draw_sprite_f1_ti1_tr1_s5_d7, draw_sprite_f1_ti1_tr1_s6_d7, draw_sprite_f1_ti1_tr1_s7_d7,
|
||||
};
|
||||
|
||||
static epic12_device_blitfunction epic12_device_f1_ti1_tr0_blit_funcs[] =
|
||||
{
|
||||
draw_sprite_f1_ti1_tr0_s0_d0, draw_sprite_f1_ti1_tr0_s1_d0, draw_sprite_f1_ti1_tr0_s2_d0, draw_sprite_f1_ti1_tr0_s3_d0, draw_sprite_f1_ti1_tr0_s4_d0, draw_sprite_f1_ti1_tr0_s5_d0, draw_sprite_f1_ti1_tr0_s6_d0, draw_sprite_f1_ti1_tr0_s7_d0,
|
||||
draw_sprite_f1_ti1_tr0_s0_d1, draw_sprite_f1_ti1_tr0_s1_d1, draw_sprite_f1_ti1_tr0_s2_d1, draw_sprite_f1_ti1_tr0_s3_d1, draw_sprite_f1_ti1_tr0_s4_d1, draw_sprite_f1_ti1_tr0_s5_d1, draw_sprite_f1_ti1_tr0_s6_d1, draw_sprite_f1_ti1_tr0_s7_d1,
|
||||
draw_sprite_f1_ti1_tr0_s0_d2, draw_sprite_f1_ti1_tr0_s1_d2, draw_sprite_f1_ti1_tr0_s2_d2, draw_sprite_f1_ti1_tr0_s3_d2, draw_sprite_f1_ti1_tr0_s4_d2, draw_sprite_f1_ti1_tr0_s5_d2, draw_sprite_f1_ti1_tr0_s6_d2, draw_sprite_f1_ti1_tr0_s7_d2,
|
||||
draw_sprite_f1_ti1_tr0_s0_d3, draw_sprite_f1_ti1_tr0_s1_d3, draw_sprite_f1_ti1_tr0_s2_d3, draw_sprite_f1_ti1_tr0_s3_d3, draw_sprite_f1_ti1_tr0_s4_d3, draw_sprite_f1_ti1_tr0_s5_d3, draw_sprite_f1_ti1_tr0_s6_d3, draw_sprite_f1_ti1_tr0_s7_d3,
|
||||
draw_sprite_f1_ti1_tr0_s0_d4, draw_sprite_f1_ti1_tr0_s1_d4, draw_sprite_f1_ti1_tr0_s2_d4, draw_sprite_f1_ti1_tr0_s3_d4, draw_sprite_f1_ti1_tr0_s4_d4, draw_sprite_f1_ti1_tr0_s5_d4, draw_sprite_f1_ti1_tr0_s6_d4, draw_sprite_f1_ti1_tr0_s7_d4,
|
||||
draw_sprite_f1_ti1_tr0_s0_d5, draw_sprite_f1_ti1_tr0_s1_d5, draw_sprite_f1_ti1_tr0_s2_d5, draw_sprite_f1_ti1_tr0_s3_d5, draw_sprite_f1_ti1_tr0_s4_d5, draw_sprite_f1_ti1_tr0_s5_d5, draw_sprite_f1_ti1_tr0_s6_d5, draw_sprite_f1_ti1_tr0_s7_d5,
|
||||
draw_sprite_f1_ti1_tr0_s0_d6, draw_sprite_f1_ti1_tr0_s1_d6, draw_sprite_f1_ti1_tr0_s2_d6, draw_sprite_f1_ti1_tr0_s3_d6, draw_sprite_f1_ti1_tr0_s4_d6, draw_sprite_f1_ti1_tr0_s5_d6, draw_sprite_f1_ti1_tr0_s6_d6, draw_sprite_f1_ti1_tr0_s7_d6,
|
||||
draw_sprite_f1_ti1_tr0_s0_d7, draw_sprite_f1_ti1_tr0_s1_d7, draw_sprite_f1_ti1_tr0_s2_d7, draw_sprite_f1_ti1_tr0_s3_d7, draw_sprite_f1_ti1_tr0_s4_d7, draw_sprite_f1_ti1_tr0_s5_d7, draw_sprite_f1_ti1_tr0_s6_d7, draw_sprite_f1_ti1_tr0_s7_d7,
|
||||
};
|
||||
|
||||
|
||||
|
||||
static epic12_device_blitfunction epic12_device_f0_ti0_tr1_blit_funcs[] =
|
||||
{
|
||||
draw_sprite_f0_ti0_tr1_s0_d0, draw_sprite_f0_ti0_tr1_s1_d0, draw_sprite_f0_ti0_tr1_s2_d0, draw_sprite_f0_ti0_tr1_s3_d0, draw_sprite_f0_ti0_tr1_s4_d0, draw_sprite_f0_ti0_tr1_s5_d0, draw_sprite_f0_ti0_tr1_s6_d0, draw_sprite_f0_ti0_tr1_s7_d0,
|
||||
draw_sprite_f0_ti0_tr1_s0_d1, draw_sprite_f0_ti0_tr1_s1_d1, draw_sprite_f0_ti0_tr1_s2_d1, draw_sprite_f0_ti0_tr1_s3_d1, draw_sprite_f0_ti0_tr1_s4_d1, draw_sprite_f0_ti0_tr1_s5_d1, draw_sprite_f0_ti0_tr1_s6_d1, draw_sprite_f0_ti0_tr1_s7_d1,
|
||||
draw_sprite_f0_ti0_tr1_s0_d2, draw_sprite_f0_ti0_tr1_s1_d2, draw_sprite_f0_ti0_tr1_s2_d2, draw_sprite_f0_ti0_tr1_s3_d2, draw_sprite_f0_ti0_tr1_s4_d2, draw_sprite_f0_ti0_tr1_s5_d2, draw_sprite_f0_ti0_tr1_s6_d2, draw_sprite_f0_ti0_tr1_s7_d2,
|
||||
draw_sprite_f0_ti0_tr1_s0_d3, draw_sprite_f0_ti0_tr1_s1_d3, draw_sprite_f0_ti0_tr1_s2_d3, draw_sprite_f0_ti0_tr1_s3_d3, draw_sprite_f0_ti0_tr1_s4_d3, draw_sprite_f0_ti0_tr1_s5_d3, draw_sprite_f0_ti0_tr1_s6_d3, draw_sprite_f0_ti0_tr1_s7_d3,
|
||||
draw_sprite_f0_ti0_tr1_s0_d4, draw_sprite_f0_ti0_tr1_s1_d4, draw_sprite_f0_ti0_tr1_s2_d4, draw_sprite_f0_ti0_tr1_s3_d4, draw_sprite_f0_ti0_tr1_s4_d4, draw_sprite_f0_ti0_tr1_s5_d4, draw_sprite_f0_ti0_tr1_s6_d4, draw_sprite_f0_ti0_tr1_s7_d4,
|
||||
draw_sprite_f0_ti0_tr1_s0_d5, draw_sprite_f0_ti0_tr1_s1_d5, draw_sprite_f0_ti0_tr1_s2_d5, draw_sprite_f0_ti0_tr1_s3_d5, draw_sprite_f0_ti0_tr1_s4_d5, draw_sprite_f0_ti0_tr1_s5_d5, draw_sprite_f0_ti0_tr1_s6_d5, draw_sprite_f0_ti0_tr1_s7_d5,
|
||||
draw_sprite_f0_ti0_tr1_s0_d6, draw_sprite_f0_ti0_tr1_s1_d6, draw_sprite_f0_ti0_tr1_s2_d6, draw_sprite_f0_ti0_tr1_s3_d6, draw_sprite_f0_ti0_tr1_s4_d6, draw_sprite_f0_ti0_tr1_s5_d6, draw_sprite_f0_ti0_tr1_s6_d6, draw_sprite_f0_ti0_tr1_s7_d6,
|
||||
draw_sprite_f0_ti0_tr1_s0_d7, draw_sprite_f0_ti0_tr1_s1_d7, draw_sprite_f0_ti0_tr1_s2_d7, draw_sprite_f0_ti0_tr1_s3_d7, draw_sprite_f0_ti0_tr1_s4_d7, draw_sprite_f0_ti0_tr1_s5_d7, draw_sprite_f0_ti0_tr1_s6_d7, draw_sprite_f0_ti0_tr1_s7_d7,
|
||||
};
|
||||
|
||||
static epic12_device_blitfunction epic12_device_f0_ti0_tr0_blit_funcs[] =
|
||||
{
|
||||
draw_sprite_f0_ti0_tr0_s0_d0, draw_sprite_f0_ti0_tr0_s1_d0, draw_sprite_f0_ti0_tr0_s2_d0, draw_sprite_f0_ti0_tr0_s3_d0, draw_sprite_f0_ti0_tr0_s4_d0, draw_sprite_f0_ti0_tr0_s5_d0, draw_sprite_f0_ti0_tr0_s6_d0, draw_sprite_f0_ti0_tr0_s7_d0,
|
||||
draw_sprite_f0_ti0_tr0_s0_d1, draw_sprite_f0_ti0_tr0_s1_d1, draw_sprite_f0_ti0_tr0_s2_d1, draw_sprite_f0_ti0_tr0_s3_d1, draw_sprite_f0_ti0_tr0_s4_d1, draw_sprite_f0_ti0_tr0_s5_d1, draw_sprite_f0_ti0_tr0_s6_d1, draw_sprite_f0_ti0_tr0_s7_d1,
|
||||
draw_sprite_f0_ti0_tr0_s0_d2, draw_sprite_f0_ti0_tr0_s1_d2, draw_sprite_f0_ti0_tr0_s2_d2, draw_sprite_f0_ti0_tr0_s3_d2, draw_sprite_f0_ti0_tr0_s4_d2, draw_sprite_f0_ti0_tr0_s5_d2, draw_sprite_f0_ti0_tr0_s6_d2, draw_sprite_f0_ti0_tr0_s7_d2,
|
||||
draw_sprite_f0_ti0_tr0_s0_d3, draw_sprite_f0_ti0_tr0_s1_d3, draw_sprite_f0_ti0_tr0_s2_d3, draw_sprite_f0_ti0_tr0_s3_d3, draw_sprite_f0_ti0_tr0_s4_d3, draw_sprite_f0_ti0_tr0_s5_d3, draw_sprite_f0_ti0_tr0_s6_d3, draw_sprite_f0_ti0_tr0_s7_d3,
|
||||
draw_sprite_f0_ti0_tr0_s0_d4, draw_sprite_f0_ti0_tr0_s1_d4, draw_sprite_f0_ti0_tr0_s2_d4, draw_sprite_f0_ti0_tr0_s3_d4, draw_sprite_f0_ti0_tr0_s4_d4, draw_sprite_f0_ti0_tr0_s5_d4, draw_sprite_f0_ti0_tr0_s6_d4, draw_sprite_f0_ti0_tr0_s7_d4,
|
||||
draw_sprite_f0_ti0_tr0_s0_d5, draw_sprite_f0_ti0_tr0_s1_d5, draw_sprite_f0_ti0_tr0_s2_d5, draw_sprite_f0_ti0_tr0_s3_d5, draw_sprite_f0_ti0_tr0_s4_d5, draw_sprite_f0_ti0_tr0_s5_d5, draw_sprite_f0_ti0_tr0_s6_d5, draw_sprite_f0_ti0_tr0_s7_d5,
|
||||
draw_sprite_f0_ti0_tr0_s0_d6, draw_sprite_f0_ti0_tr0_s1_d6, draw_sprite_f0_ti0_tr0_s2_d6, draw_sprite_f0_ti0_tr0_s3_d6, draw_sprite_f0_ti0_tr0_s4_d6, draw_sprite_f0_ti0_tr0_s5_d6, draw_sprite_f0_ti0_tr0_s6_d6, draw_sprite_f0_ti0_tr0_s7_d6,
|
||||
draw_sprite_f0_ti0_tr0_s0_d7, draw_sprite_f0_ti0_tr0_s1_d7, draw_sprite_f0_ti0_tr0_s2_d7, draw_sprite_f0_ti0_tr0_s3_d7, draw_sprite_f0_ti0_tr0_s4_d7, draw_sprite_f0_ti0_tr0_s5_d7, draw_sprite_f0_ti0_tr0_s6_d7, draw_sprite_f0_ti0_tr0_s7_d7,
|
||||
};
|
||||
|
||||
static epic12_device_blitfunction epic12_device_f1_ti0_tr1_blit_funcs[] =
|
||||
{
|
||||
draw_sprite_f1_ti0_tr1_s0_d0, draw_sprite_f1_ti0_tr1_s1_d0, draw_sprite_f1_ti0_tr1_s2_d0, draw_sprite_f1_ti0_tr1_s3_d0, draw_sprite_f1_ti0_tr1_s4_d0, draw_sprite_f1_ti0_tr1_s5_d0, draw_sprite_f1_ti0_tr1_s6_d0, draw_sprite_f1_ti0_tr1_s7_d0,
|
||||
draw_sprite_f1_ti0_tr1_s0_d1, draw_sprite_f1_ti0_tr1_s1_d1, draw_sprite_f1_ti0_tr1_s2_d1, draw_sprite_f1_ti0_tr1_s3_d1, draw_sprite_f1_ti0_tr1_s4_d1, draw_sprite_f1_ti0_tr1_s5_d1, draw_sprite_f1_ti0_tr1_s6_d1, draw_sprite_f1_ti0_tr1_s7_d1,
|
||||
draw_sprite_f1_ti0_tr1_s0_d2, draw_sprite_f1_ti0_tr1_s1_d2, draw_sprite_f1_ti0_tr1_s2_d2, draw_sprite_f1_ti0_tr1_s3_d2, draw_sprite_f1_ti0_tr1_s4_d2, draw_sprite_f1_ti0_tr1_s5_d2, draw_sprite_f1_ti0_tr1_s6_d2, draw_sprite_f1_ti0_tr1_s7_d2,
|
||||
draw_sprite_f1_ti0_tr1_s0_d3, draw_sprite_f1_ti0_tr1_s1_d3, draw_sprite_f1_ti0_tr1_s2_d3, draw_sprite_f1_ti0_tr1_s3_d3, draw_sprite_f1_ti0_tr1_s4_d3, draw_sprite_f1_ti0_tr1_s5_d3, draw_sprite_f1_ti0_tr1_s6_d3, draw_sprite_f1_ti0_tr1_s7_d3,
|
||||
draw_sprite_f1_ti0_tr1_s0_d4, draw_sprite_f1_ti0_tr1_s1_d4, draw_sprite_f1_ti0_tr1_s2_d4, draw_sprite_f1_ti0_tr1_s3_d4, draw_sprite_f1_ti0_tr1_s4_d4, draw_sprite_f1_ti0_tr1_s5_d4, draw_sprite_f1_ti0_tr1_s6_d4, draw_sprite_f1_ti0_tr1_s7_d4,
|
||||
draw_sprite_f1_ti0_tr1_s0_d5, draw_sprite_f1_ti0_tr1_s1_d5, draw_sprite_f1_ti0_tr1_s2_d5, draw_sprite_f1_ti0_tr1_s3_d5, draw_sprite_f1_ti0_tr1_s4_d5, draw_sprite_f1_ti0_tr1_s5_d5, draw_sprite_f1_ti0_tr1_s6_d5, draw_sprite_f1_ti0_tr1_s7_d5,
|
||||
draw_sprite_f1_ti0_tr1_s0_d6, draw_sprite_f1_ti0_tr1_s1_d6, draw_sprite_f1_ti0_tr1_s2_d6, draw_sprite_f1_ti0_tr1_s3_d6, draw_sprite_f1_ti0_tr1_s4_d6, draw_sprite_f1_ti0_tr1_s5_d6, draw_sprite_f1_ti0_tr1_s6_d6, draw_sprite_f1_ti0_tr1_s7_d6,
|
||||
draw_sprite_f1_ti0_tr1_s0_d7, draw_sprite_f1_ti0_tr1_s1_d7, draw_sprite_f1_ti0_tr1_s2_d7, draw_sprite_f1_ti0_tr1_s3_d7, draw_sprite_f1_ti0_tr1_s4_d7, draw_sprite_f1_ti0_tr1_s5_d7, draw_sprite_f1_ti0_tr1_s6_d7, draw_sprite_f1_ti0_tr1_s7_d7,
|
||||
};
|
||||
|
||||
static epic12_device_blitfunction epic12_device_f1_ti0_tr0_blit_funcs[] =
|
||||
{
|
||||
draw_sprite_f1_ti0_tr0_s0_d0, draw_sprite_f1_ti0_tr0_s1_d0, draw_sprite_f1_ti0_tr0_s2_d0, draw_sprite_f1_ti0_tr0_s3_d0, draw_sprite_f1_ti0_tr0_s4_d0, draw_sprite_f1_ti0_tr0_s5_d0, draw_sprite_f1_ti0_tr0_s6_d0, draw_sprite_f1_ti0_tr0_s7_d0,
|
||||
draw_sprite_f1_ti0_tr0_s0_d1, draw_sprite_f1_ti0_tr0_s1_d1, draw_sprite_f1_ti0_tr0_s2_d1, draw_sprite_f1_ti0_tr0_s3_d1, draw_sprite_f1_ti0_tr0_s4_d1, draw_sprite_f1_ti0_tr0_s5_d1, draw_sprite_f1_ti0_tr0_s6_d1, draw_sprite_f1_ti0_tr0_s7_d1,
|
||||
draw_sprite_f1_ti0_tr0_s0_d2, draw_sprite_f1_ti0_tr0_s1_d2, draw_sprite_f1_ti0_tr0_s2_d2, draw_sprite_f1_ti0_tr0_s3_d2, draw_sprite_f1_ti0_tr0_s4_d2, draw_sprite_f1_ti0_tr0_s5_d2, draw_sprite_f1_ti0_tr0_s6_d2, draw_sprite_f1_ti0_tr0_s7_d2,
|
||||
draw_sprite_f1_ti0_tr0_s0_d3, draw_sprite_f1_ti0_tr0_s1_d3, draw_sprite_f1_ti0_tr0_s2_d3, draw_sprite_f1_ti0_tr0_s3_d3, draw_sprite_f1_ti0_tr0_s4_d3, draw_sprite_f1_ti0_tr0_s5_d3, draw_sprite_f1_ti0_tr0_s6_d3, draw_sprite_f1_ti0_tr0_s7_d3,
|
||||
draw_sprite_f1_ti0_tr0_s0_d4, draw_sprite_f1_ti0_tr0_s1_d4, draw_sprite_f1_ti0_tr0_s2_d4, draw_sprite_f1_ti0_tr0_s3_d4, draw_sprite_f1_ti0_tr0_s4_d4, draw_sprite_f1_ti0_tr0_s5_d4, draw_sprite_f1_ti0_tr0_s6_d4, draw_sprite_f1_ti0_tr0_s7_d4,
|
||||
draw_sprite_f1_ti0_tr0_s0_d5, draw_sprite_f1_ti0_tr0_s1_d5, draw_sprite_f1_ti0_tr0_s2_d5, draw_sprite_f1_ti0_tr0_s3_d5, draw_sprite_f1_ti0_tr0_s4_d5, draw_sprite_f1_ti0_tr0_s5_d5, draw_sprite_f1_ti0_tr0_s6_d5, draw_sprite_f1_ti0_tr0_s7_d5,
|
||||
draw_sprite_f1_ti0_tr0_s0_d6, draw_sprite_f1_ti0_tr0_s1_d6, draw_sprite_f1_ti0_tr0_s2_d6, draw_sprite_f1_ti0_tr0_s3_d6, draw_sprite_f1_ti0_tr0_s4_d6, draw_sprite_f1_ti0_tr0_s5_d6, draw_sprite_f1_ti0_tr0_s6_d6, draw_sprite_f1_ti0_tr0_s7_d6,
|
||||
draw_sprite_f1_ti0_tr0_s0_d7, draw_sprite_f1_ti0_tr0_s1_d7, draw_sprite_f1_ti0_tr0_s2_d7, draw_sprite_f1_ti0_tr0_s3_d7, draw_sprite_f1_ti0_tr0_s4_d7, draw_sprite_f1_ti0_tr0_s5_d7, draw_sprite_f1_ti0_tr0_s6_d7, draw_sprite_f1_ti0_tr0_s7_d7,
|
||||
};
|
||||
|
||||
|
||||
static void gfx_draw(UINT32 *addr)
|
||||
{
|
||||
int x,y, dimx,dimy, flipx,flipy;//, src_p;
|
||||
int trans,blend, s_mode, d_mode;
|
||||
clr_t tint_clr;
|
||||
int tinted = 0;
|
||||
|
||||
UINT16 attr = READ_NEXT_WORD(addr);
|
||||
UINT16 alpha = READ_NEXT_WORD(addr);
|
||||
UINT16 src_x = READ_NEXT_WORD(addr);
|
||||
UINT16 src_y = READ_NEXT_WORD(addr);
|
||||
UINT16 dst_x_start = READ_NEXT_WORD(addr);
|
||||
UINT16 dst_y_start = READ_NEXT_WORD(addr);
|
||||
UINT16 w = READ_NEXT_WORD(addr);
|
||||
UINT16 h = READ_NEXT_WORD(addr);
|
||||
UINT16 tint_r = READ_NEXT_WORD(addr);
|
||||
UINT16 tint_gb = READ_NEXT_WORD(addr);
|
||||
|
||||
// 0: +alpha
|
||||
// 1: +source
|
||||
// 2: +dest
|
||||
// 3: *
|
||||
// 4: -alpha
|
||||
// 5: -source
|
||||
// 6: -dest
|
||||
// 7: *
|
||||
|
||||
d_mode = attr & 0x0007;
|
||||
s_mode = (attr & 0x0070) >> 4;
|
||||
|
||||
trans = attr & 0x0100;
|
||||
blend = attr & 0x0200;
|
||||
|
||||
flipy = attr & 0x0400;
|
||||
flipx = attr & 0x0800;
|
||||
|
||||
const UINT8 d_alpha = ((alpha & 0x00ff) )>>3;
|
||||
const UINT8 s_alpha = ((alpha & 0xff00) >> 8 )>>3;
|
||||
|
||||
// src_p = 0;
|
||||
src_x = src_x & 0x1fff;
|
||||
src_y = src_y & 0x0fff;
|
||||
|
||||
|
||||
x = (dst_x_start & 0x7fff) - (dst_x_start & 0x8000);
|
||||
y = (dst_y_start & 0x7fff) - (dst_y_start & 0x8000);
|
||||
|
||||
dimx = (w & 0x1fff) + 1;
|
||||
dimy = (h & 0x0fff) + 1;
|
||||
|
||||
// convert parameters to clr
|
||||
|
||||
|
||||
tint_to_clr(tint_r & 0x00ff, (tint_gb >> 8) & 0xff, tint_gb & 0xff, &tint_clr);
|
||||
|
||||
/* interestingly this gets set to 0x20 for 'normal' not 0x1f */
|
||||
|
||||
if (tint_clr.r!=0x20)
|
||||
tinted = 1;
|
||||
|
||||
if (tint_clr.g!=0x20)
|
||||
tinted = 1;
|
||||
|
||||
if (tint_clr.b!=0x20)
|
||||
tinted = 1;
|
||||
|
||||
|
||||
// surprisingly frequent, need to verify if it produces a worthwhile speedup tho.
|
||||
if ((s_mode==0 && s_alpha==0x1f) && (d_mode==4 && d_alpha==0x1f))
|
||||
blend = 0;
|
||||
|
||||
if (tinted)
|
||||
{
|
||||
if (!flipx)
|
||||
{
|
||||
if (trans)
|
||||
{
|
||||
if (!blend)
|
||||
{
|
||||
draw_sprite_f0_ti1_tr1_plain(draw_params);
|
||||
}
|
||||
else
|
||||
{
|
||||
epic12_device_f0_ti1_tr1_blit_funcs[s_mode | (d_mode<<3)](draw_params);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (!blend)
|
||||
{
|
||||
draw_sprite_f0_ti1_tr0_plain(draw_params);
|
||||
}
|
||||
else
|
||||
{
|
||||
epic12_device_f0_ti1_tr0_blit_funcs[s_mode | (d_mode<<3)](draw_params);
|
||||
}
|
||||
}
|
||||
}
|
||||
else // flipx
|
||||
{
|
||||
if (trans)
|
||||
{
|
||||
if (!blend)
|
||||
{
|
||||
draw_sprite_f1_ti1_tr1_plain(draw_params);
|
||||
}
|
||||
else
|
||||
{
|
||||
epic12_device_f1_ti1_tr1_blit_funcs[s_mode | (d_mode<<3)](draw_params);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (!blend)
|
||||
{
|
||||
draw_sprite_f1_ti1_tr0_plain(draw_params);
|
||||
}
|
||||
else
|
||||
{
|
||||
epic12_device_f1_ti1_tr0_blit_funcs[s_mode | (d_mode<<3)](draw_params);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (blend==0 && tinted==0)
|
||||
{
|
||||
if (!flipx)
|
||||
{
|
||||
if (trans)
|
||||
{
|
||||
draw_sprite_f0_ti0_tr1_simple(draw_params);
|
||||
}
|
||||
else
|
||||
{
|
||||
draw_sprite_f0_ti0_tr0_simple(draw_params);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (trans)
|
||||
{
|
||||
draw_sprite_f1_ti0_tr1_simple(draw_params);
|
||||
}
|
||||
else
|
||||
{
|
||||
draw_sprite_f1_ti0_tr0_simple(draw_params);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
|
||||
//printf("smode %d dmode %d\n", s_mode, d_mode);
|
||||
|
||||
if (!flipx)
|
||||
{
|
||||
if (trans)
|
||||
{
|
||||
if (!blend)
|
||||
{
|
||||
draw_sprite_f0_ti0_plain(draw_params);
|
||||
}
|
||||
else
|
||||
{
|
||||
epic12_device_f0_ti0_tr1_blit_funcs[s_mode | (d_mode<<3)](draw_params);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (!blend)
|
||||
{
|
||||
draw_sprite_f0_ti0_tr0_plain(draw_params);
|
||||
}
|
||||
else
|
||||
{
|
||||
epic12_device_f0_ti0_tr0_blit_funcs[s_mode | (d_mode<<3)](draw_params);
|
||||
}
|
||||
}
|
||||
}
|
||||
else // flipx
|
||||
{
|
||||
if (trans)
|
||||
{
|
||||
if (!blend)
|
||||
{
|
||||
draw_sprite_f1_ti0_plain(draw_params);
|
||||
}
|
||||
else
|
||||
{
|
||||
epic12_device_f1_ti0_tr1_blit_funcs[s_mode | (d_mode<<3)](draw_params);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (!blend)
|
||||
{
|
||||
draw_sprite_f1_ti0_tr0_plain(draw_params);
|
||||
}
|
||||
else
|
||||
{
|
||||
epic12_device_f1_ti0_tr0_blit_funcs[s_mode | (d_mode<<3)](draw_params);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void gfx_exec()
|
||||
{
|
||||
UINT32 addr = m_gfx_addr & 0x1fffffff;
|
||||
m_clip.set(m_gfx_scroll_1_x, m_gfx_scroll_1_x + 320-1, m_gfx_scroll_1_y, m_gfx_scroll_1_y + 240-1);
|
||||
|
||||
// logerror("GFX EXEC: %08X\n", addr);
|
||||
|
||||
while (1)
|
||||
{
|
||||
UINT16 data = READ_NEXT_WORD(&addr);
|
||||
|
||||
switch( data & 0xf000 )
|
||||
{
|
||||
case 0x0000:
|
||||
case 0xf000:
|
||||
return;
|
||||
|
||||
case 0xc000:
|
||||
if (READ_NEXT_WORD(&addr)) // cliptype
|
||||
m_clip.set(m_gfx_scroll_1_x, m_gfx_scroll_1_x + 320-1, m_gfx_scroll_1_y, m_gfx_scroll_1_y + 240-1);
|
||||
else
|
||||
m_clip.set(0, 0x2000-1, 0, 0x1000-1);
|
||||
break;
|
||||
|
||||
case 0x2000:
|
||||
addr -= 2;
|
||||
gfx_upload(&addr);
|
||||
break;
|
||||
|
||||
case 0x1000:
|
||||
addr -= 2;
|
||||
gfx_draw(&addr);
|
||||
break;
|
||||
|
||||
default:
|
||||
//popmessage("GFX op = %04X", data);
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
static UINT32 gfx_ready_read()
|
||||
{
|
||||
if (m_blitter_busy)
|
||||
{
|
||||
//m_maincpu->spin_until_time(attotime::from_usec(10));
|
||||
Sh3BurnCycles(m_burn_cycles); // 0x400 @ (12800000*8)
|
||||
//bprintf(0, _T("%d frame - blitter busy read....."), nCurrentFrame);
|
||||
|
||||
return 0x00000000;
|
||||
}
|
||||
else
|
||||
return 0x00000010;
|
||||
}
|
||||
|
||||
|
||||
static void gfx_exec_write(UINT32 offset, UINT32 data)
|
||||
{
|
||||
// if ( ACCESSING_BITS_0_7 )
|
||||
{
|
||||
if (data & 1)
|
||||
{
|
||||
if (epic12_device_blit_delay && m_delay_scale)
|
||||
{
|
||||
m_blitter_busy = 1;
|
||||
int delay = epic12_device_blit_delay*(15 * m_delay_scale / 50);
|
||||
INT32 cycles = (INT32)((double)((double)delay / 1000000000) * sh4_get_cpu_speed());
|
||||
|
||||
sh4_set_cave_blitter_delay_timer(cycles);
|
||||
}
|
||||
else
|
||||
{
|
||||
m_blitter_busy = 0;
|
||||
}
|
||||
|
||||
epic12_device_blit_delay = 0;
|
||||
|
||||
if (!bBurnRunAheadFrame) thready.notify(); // run gfx_exec(), w/ threading if set (via dip option)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void epic12_draw_screen()
|
||||
{
|
||||
INT32 scrollx = -m_gfx_scroll_0_x;
|
||||
INT32 scrolly = -m_gfx_scroll_0_y;
|
||||
|
||||
if (nBurnBpp != 4) {
|
||||
//bprintf(0, _T("epic12_draw_screen(): need 32bit for now!\n"));
|
||||
return;
|
||||
}
|
||||
|
||||
UINT32 *dst = (UINT32 *)pBurnDraw;
|
||||
UINT32 *src = (UINT32 *)m_bitmaps;
|
||||
const INT32 heightmask = 0x1000 - 1;
|
||||
const INT32 widthmask = 0x2000 - 1;
|
||||
|
||||
for (INT32 y = 0; y < nScreenHeight; y++)
|
||||
{
|
||||
UINT32 *s0 = &src[((y - scrolly) & heightmask) * 0x2000];
|
||||
UINT32 *d0 = dst + (y * nScreenWidth);
|
||||
INT32 sx;
|
||||
for (INT32 x = 0; x < nScreenWidth; x+=16)
|
||||
{
|
||||
sx = x - scrollx;
|
||||
d0[x + 0] = s0[((sx + 0)) & widthmask];
|
||||
d0[x + 1] = s0[((sx + 1)) & widthmask];
|
||||
d0[x + 2] = s0[((sx + 2)) & widthmask];
|
||||
d0[x + 3] = s0[((sx + 3)) & widthmask];
|
||||
d0[x + 4] = s0[((sx + 4)) & widthmask];
|
||||
d0[x + 5] = s0[((sx + 5)) & widthmask];
|
||||
d0[x + 6] = s0[((sx + 6)) & widthmask];
|
||||
d0[x + 7] = s0[((sx + 7)) & widthmask];
|
||||
d0[x + 8] = s0[((sx + 8)) & widthmask];
|
||||
d0[x + 9] = s0[((sx + 9)) & widthmask];
|
||||
d0[x +10] = s0[((sx +10)) & widthmask];
|
||||
d0[x +11] = s0[((sx +11)) & widthmask];
|
||||
d0[x +12] = s0[((sx +12)) & widthmask];
|
||||
d0[x +13] = s0[((sx +13)) & widthmask];
|
||||
d0[x +14] = s0[((sx +14)) & widthmask];
|
||||
d0[x +15] = s0[((sx +15)) & widthmask];
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
// 0x18000000 - 0x18000057
|
||||
|
||||
UINT32 epic12_blitter_read(UINT32 offset)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
case 0x10:
|
||||
return gfx_ready_read();
|
||||
|
||||
case 0x24:
|
||||
return 0xffffffff;
|
||||
|
||||
case 0x28:
|
||||
return 0xffffffff;
|
||||
|
||||
case 0x50:
|
||||
return *dips;
|
||||
|
||||
default:
|
||||
//logerror("unknownblitter_r %08x %08x\n", offset*4, mem_mask);
|
||||
break;
|
||||
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
void epic12_blitter_write(UINT32 offset, UINT32 data)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
case 0x04:
|
||||
gfx_exec_write(offset,data);
|
||||
break;
|
||||
|
||||
case 0x08:
|
||||
m_gfx_addr = data & 0xffffff;
|
||||
break;
|
||||
|
||||
case 0x14:
|
||||
m_gfx_scroll_0_x = data;
|
||||
break;
|
||||
|
||||
case 0x18:
|
||||
m_gfx_scroll_0_y = data;
|
||||
break;
|
||||
|
||||
case 0x40:
|
||||
m_gfx_scroll_1_x = data;
|
||||
break;
|
||||
|
||||
case 0x44:
|
||||
m_gfx_scroll_1_y = data;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void epic12_scan(INT32 nAction, INT32 *pnMin)
|
||||
{
|
||||
SCAN_VAR(m_gfx_addr);
|
||||
SCAN_VAR(m_gfx_scroll_0_x);
|
||||
SCAN_VAR(m_gfx_scroll_0_y);
|
||||
SCAN_VAR(m_gfx_scroll_1_x);
|
||||
SCAN_VAR(m_gfx_scroll_1_y);
|
||||
SCAN_VAR(epic12_device_blit_delay);
|
||||
SCAN_VAR(m_delay_scale);
|
||||
SCAN_VAR(m_blitter_busy);
|
||||
ScanVar(m_bitmaps, m_gfx_size * 4, "epic12 vram");
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
/* emulation of Altera Cyclone EPIC12 FPGA programmed as a blitter */
|
||||
|
||||
void epic12_init(INT32 ram_size, UINT16 *ram, UINT8 *dippy);
|
||||
void epic12_exit();
|
||||
void epic12_reset();
|
||||
void epic12_scan(INT32 nAction, INT32 *pnMin);
|
||||
void epic12_set_blitterdelay(INT32 delay, INT32 burn_cycles);
|
||||
void epic12_set_blitterthreading(INT32 value);
|
||||
void epic12_draw_screen();
|
||||
UINT32 epic12_blitter_read(UINT32 offset); // 0x18000000 - 0x18000057
|
||||
void epic12_blitter_write(UINT32 offset, UINT32 data);
|
||||
|
||||
|
|
@ -0,0 +1,556 @@
|
|||
#define REALLY_SIMPLE 0
|
||||
/* Non-Flipped, Non-Tinted, Transparent */
|
||||
#define FLIPX 0
|
||||
#define TINT 0
|
||||
#define TRANSPARENT 1
|
||||
|
||||
//#include "emu.h"
|
||||
//#include "epic12.h"
|
||||
|
||||
/* Special Case */
|
||||
#define BLENDED 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_plain
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef BLENDED
|
||||
|
||||
/* Regular Cases*/
|
||||
#define BLENDED 1
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s0_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s1_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s2_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s3_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s4_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s5_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s6_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s7_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///////
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s0_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s1_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s2_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s3_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s4_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s5_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s6_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s7_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
////
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s0_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s1_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s2_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s3_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s4_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s5_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s6_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s7_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s0_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s1_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s2_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s3_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s4_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s5_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s6_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s7_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s0_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s1_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s2_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s3_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s4_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s5_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s6_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s7_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s0_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s1_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s2_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s3_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s4_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s5_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s6_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s7_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s0_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s1_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s2_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s3_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s4_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s5_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s6_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s7_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s0_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s1_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s2_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s3_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s4_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s5_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s6_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_s7_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#undef BLENDED
|
||||
|
||||
#undef FLIPX
|
||||
#undef TINT
|
||||
#undef TRANSPARENT
|
||||
#undef REALLY_SIMPLE
|
||||
|
|
@ -0,0 +1,556 @@
|
|||
#define REALLY_SIMPLE 0
|
||||
/* Non-Flipped, Non-Tinted, Non-Transparent */
|
||||
#define FLIPX 0
|
||||
#define TINT 0
|
||||
#define TRANSPARENT 0
|
||||
|
||||
//#include "emu.h"
|
||||
//#include "epic12.h"
|
||||
|
||||
/* Special Case */
|
||||
#define BLENDED 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_plain
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef BLENDED
|
||||
|
||||
/* Regular Cases*/
|
||||
#define BLENDED 1
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s0_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s1_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s2_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s3_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s4_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s5_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s6_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s7_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///////
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s0_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s1_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s2_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s3_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s4_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s5_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s6_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s7_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
////
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s0_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s1_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s2_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s3_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s4_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s5_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s6_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s7_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s0_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s1_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s2_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s3_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s4_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s5_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s6_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s7_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s0_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s1_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s2_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s3_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s4_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s5_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s6_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s7_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s0_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s1_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s2_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s3_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s4_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s5_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s6_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s7_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s0_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s1_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s2_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s3_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s4_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s5_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s6_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s7_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s0_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s1_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s2_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s3_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s4_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s5_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s6_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_s7_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#undef BLENDED
|
||||
|
||||
#undef FLIPX
|
||||
#undef TINT
|
||||
#undef TRANSPARENT
|
||||
#undef REALLY_SIMPLE
|
||||
|
|
@ -0,0 +1,556 @@
|
|||
#define REALLY_SIMPLE 0
|
||||
/* X-Flipped, Non-Tinted, Transparent */
|
||||
#define FLIPX 1
|
||||
#define TINT 0
|
||||
#define TRANSPARENT 1
|
||||
|
||||
//#include "emu.h"
|
||||
//#include "epic12.h"
|
||||
|
||||
/* Special Case */
|
||||
#define BLENDED 0
|
||||
#define FUNCNAME draw_sprite_f1_ti0_plain
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef BLENDED
|
||||
|
||||
/* Regular Cases*/
|
||||
#define BLENDED 1
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s0_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s1_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s2_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s3_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s4_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s5_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s6_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s7_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///////
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s0_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s1_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s2_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s3_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s4_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s5_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s6_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s7_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
////
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s0_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s1_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s2_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s3_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s4_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s5_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s6_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s7_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s0_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s1_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s2_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s3_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s4_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s5_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s6_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s7_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s0_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s1_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s2_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s3_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s4_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s5_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s6_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s7_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s0_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s1_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s2_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s3_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s4_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s5_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s6_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s7_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s0_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s1_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s2_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s3_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s4_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s5_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s6_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s7_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s0_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s1_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s2_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s3_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s4_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s5_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s6_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_s7_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#undef BLENDED
|
||||
|
||||
#undef FLIPX
|
||||
#undef TINT
|
||||
#undef TRANSPARENT
|
||||
#undef REALLY_SIMPLE
|
||||
|
|
@ -0,0 +1,556 @@
|
|||
#define REALLY_SIMPLE 0
|
||||
/* X-Flipped, Non-Tinted, Non-Transparent */
|
||||
#define FLIPX 1
|
||||
#define TINT 0
|
||||
#define TRANSPARENT 0
|
||||
|
||||
//#include "emu.h"
|
||||
//#include "epic12.h"
|
||||
|
||||
/* Special Case */
|
||||
#define BLENDED 0
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_plain
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef BLENDED
|
||||
|
||||
/* Regular Cases*/
|
||||
#define BLENDED 1
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s0_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s1_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s2_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s3_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s4_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s5_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s6_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s7_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///////
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s0_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s1_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s2_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s3_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s4_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s5_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s6_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s7_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
////
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s0_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s1_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s2_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s3_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s4_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s5_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s6_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s7_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s0_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s1_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s2_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s3_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s4_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s5_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s6_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s7_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s0_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s1_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s2_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s3_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s4_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s5_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s6_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s7_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s0_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s1_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s2_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s3_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s4_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s5_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s6_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s7_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s0_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s1_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s2_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s3_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s4_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s5_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s6_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s7_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s0_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s1_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s2_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s3_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s4_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s5_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s6_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_s7_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#undef BLENDED
|
||||
|
||||
#undef FLIPX
|
||||
#undef TINT
|
||||
#undef TRANSPARENT
|
||||
#undef REALLY_SIMPLE
|
||||
|
|
@ -0,0 +1,556 @@
|
|||
#define REALLY_SIMPLE 0
|
||||
/* Non-Flipped, Tinted, Transparent */
|
||||
#define FLIPX 0
|
||||
#define TINT 1
|
||||
#define TRANSPARENT 1
|
||||
|
||||
//#include "emu.h"
|
||||
//#include "epic12.h"
|
||||
|
||||
/* Special Case */
|
||||
#define BLENDED 0
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_plain
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef BLENDED
|
||||
|
||||
/* Regular Cases*/
|
||||
#define BLENDED 1
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s0_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s1_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s2_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s3_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s4_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s5_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s6_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s7_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///////
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s0_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s1_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s2_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s3_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s4_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s5_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s6_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s7_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
////
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s0_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s1_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s2_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s3_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s4_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s5_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s6_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s7_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s0_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s1_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s2_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s3_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s4_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s5_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s6_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s7_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s0_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s1_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s2_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s3_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s4_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s5_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s6_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s7_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s0_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s1_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s2_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s3_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s4_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s5_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s6_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s7_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s0_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s1_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s2_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s3_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s4_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s5_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s6_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s7_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s0_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s1_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s2_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s3_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s4_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s5_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s6_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr1_s7_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#undef BLENDED
|
||||
|
||||
#undef FLIPX
|
||||
#undef TINT
|
||||
#undef TRANSPARENT
|
||||
#undef REALLY_SIMPLE
|
||||
|
|
@ -0,0 +1,556 @@
|
|||
#define REALLY_SIMPLE 0
|
||||
/* Non-Flipped, Tinted, Non-Transparent */
|
||||
#define FLIPX 0
|
||||
#define TINT 1
|
||||
#define TRANSPARENT 0
|
||||
|
||||
//#include "emu.h"
|
||||
//#include "epic12.h"
|
||||
|
||||
/* Special Case */
|
||||
#define BLENDED 0
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_plain
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef BLENDED
|
||||
|
||||
/* Regular Cases*/
|
||||
#define BLENDED 1
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s0_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s1_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s2_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s3_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s4_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s5_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s6_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s7_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///////
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s0_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s1_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s2_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s3_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s4_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s5_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s6_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s7_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
////
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s0_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s1_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s2_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s3_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s4_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s5_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s6_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s7_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s0_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s1_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s2_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s3_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s4_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s5_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s6_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s7_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s0_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s1_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s2_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s3_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s4_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s5_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s6_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s7_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s0_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s1_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s2_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s3_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s4_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s5_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s6_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s7_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s0_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s1_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s2_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s3_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s4_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s5_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s6_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s7_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s0_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s1_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s2_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s3_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s4_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s5_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s6_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f0_ti1_tr0_s7_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#undef BLENDED
|
||||
|
||||
#undef FLIPX
|
||||
#undef TINT
|
||||
#undef TRANSPARENT
|
||||
#undef REALLY_SIMPLE
|
||||
|
|
@ -0,0 +1,556 @@
|
|||
#define REALLY_SIMPLE 0
|
||||
/* X-Flipped, Tinted, Transparent */
|
||||
#define FLIPX 1
|
||||
#define TINT 1
|
||||
#define TRANSPARENT 1
|
||||
|
||||
//#include "emu.h"
|
||||
//#include "epic12.h"
|
||||
|
||||
/* Special Case */
|
||||
#define BLENDED 0
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_plain
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef BLENDED
|
||||
|
||||
/* Regular Cases*/
|
||||
#define BLENDED 1
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s0_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s1_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s2_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s3_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s4_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s5_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s6_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s7_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///////
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s0_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s1_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s2_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s3_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s4_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s5_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s6_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s7_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
////
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s0_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s1_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s2_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s3_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s4_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s5_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s6_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s7_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s0_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s1_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s2_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s3_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s4_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s5_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s6_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s7_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s0_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s1_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s2_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s3_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s4_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s5_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s6_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s7_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s0_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s1_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s2_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s3_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s4_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s5_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s6_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s7_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s0_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s1_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s2_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s3_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s4_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s5_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s6_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s7_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s0_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s1_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s2_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s3_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s4_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s5_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s6_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr1_s7_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#undef BLENDED
|
||||
|
||||
#undef FLIPX
|
||||
#undef TINT
|
||||
#undef TRANSPARENT
|
||||
#undef REALLY_SIMPLE
|
||||
|
|
@ -0,0 +1,556 @@
|
|||
#define REALLY_SIMPLE 0
|
||||
/* X-Flipped, Tinted, Non-Transparent */
|
||||
#define FLIPX 1
|
||||
#define TINT 1
|
||||
#define TRANSPARENT 0
|
||||
|
||||
//#include "emu.h"
|
||||
//#include "epic12.h"
|
||||
|
||||
/* Special Case */
|
||||
#define BLENDED 0
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_plain
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef BLENDED
|
||||
|
||||
/* Regular Cases*/
|
||||
#define BLENDED 1
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s0_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s1_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s2_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s3_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s4_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s5_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s6_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 0
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s7_d0
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///////
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s0_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s1_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s2_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s3_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s4_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s5_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s6_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 1
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s7_d1
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
////
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s0_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s1_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s2_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s3_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s4_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s5_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s6_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 2
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s7_d2
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s0_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s1_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s2_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s3_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s4_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s5_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s6_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 3
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s7_d3
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s0_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s1_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s2_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s3_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s4_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s5_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s6_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 4
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s7_d4
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s0_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s1_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s2_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s3_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s4_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s5_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s6_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 5
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s7_d5
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s0_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s1_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s2_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s3_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s4_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s5_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s6_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 6
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s7_d6
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
///
|
||||
|
||||
|
||||
#define _SMODE 0
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s0_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 1
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s1_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 2
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s2_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 3
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s3_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 4
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s4_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 5
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s5_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 6
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s6_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#define _SMODE 7
|
||||
#define _DMODE 7
|
||||
#define FUNCNAME draw_sprite_f1_ti1_tr0_s7_d7
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef _SMODE
|
||||
#undef _DMODE
|
||||
|
||||
#undef BLENDED
|
||||
|
||||
#undef FLIPX
|
||||
#undef TINT
|
||||
#undef TRANSPARENT
|
||||
#undef REALLY_SIMPLE
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
/* Special case 'Really Simple' blitters, no blending, no tinting etc.*/
|
||||
|
||||
//#include "emu.h"
|
||||
//#include "epic12.h"
|
||||
|
||||
|
||||
#define REALLY_SIMPLE 1
|
||||
#define BLENDED 0
|
||||
|
||||
#define TRANSPARENT 1
|
||||
#define FLIPX 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr1_simple
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef FLIPX
|
||||
|
||||
#define FLIPX 1
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr1_simple
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef FLIPX
|
||||
#undef TRANSPARENT
|
||||
|
||||
|
||||
#define TRANSPARENT 0
|
||||
#define FLIPX 0
|
||||
#define FUNCNAME draw_sprite_f0_ti0_tr0_simple
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef FLIPX
|
||||
|
||||
#define FLIPX 1
|
||||
#define FUNCNAME draw_sprite_f1_ti0_tr0_simple
|
||||
#include "epic12in.inc"
|
||||
#undef FUNCNAME
|
||||
#undef FLIPX
|
||||
#undef TRANSPARENT
|
||||
|
||||
#undef BLENDED
|
||||
#undef REALLY_SIMPLE
|
||||
|
|
@ -0,0 +1,168 @@
|
|||
/* blitter function */
|
||||
|
||||
static const void FUNCNAME(BLIT_PARAMS)
|
||||
{
|
||||
UINT32* gfx2;
|
||||
int y, yf;
|
||||
|
||||
#if REALLY_SIMPLE == 0
|
||||
colour_t s_clr;
|
||||
#endif
|
||||
|
||||
#if BLENDED == 1
|
||||
colour_t d_clr;
|
||||
|
||||
#if _SMODE == 2
|
||||
#if _DMODE != 0
|
||||
colour_t clr0;
|
||||
#endif
|
||||
#elif _SMODE == 0
|
||||
#if _DMODE != 0
|
||||
#if _DMODE != 5
|
||||
#if _DMODE != 1
|
||||
colour_t clr0;
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
#else
|
||||
colour_t clr0;
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#if REALLY_SIMPLE == 1
|
||||
#if TRANSPARENT == 1
|
||||
UINT32 pen;
|
||||
#endif
|
||||
#else
|
||||
UINT32 pen;
|
||||
#endif
|
||||
UINT32 *bmp;
|
||||
|
||||
#if FLIPX == 1
|
||||
src_x += (dimx-1);
|
||||
#endif
|
||||
|
||||
if (flipy) { yf = -1; src_y += (dimy-1); }
|
||||
else { yf = +1; }
|
||||
|
||||
int starty = 0;
|
||||
const int dst_y_end = dst_y_start+dimy;
|
||||
|
||||
if (dst_y_start < clip->min_y)
|
||||
starty = clip->min_y - dst_y_start;
|
||||
|
||||
if (dst_y_end > clip->max_y)
|
||||
dimy -= (dst_y_end-1) - clip->max_y;
|
||||
|
||||
// check things are safe to draw (note, if the source would wrap round an edge of the 0x2000*0x1000 vram we don't draw.. not sure what the hw does anyway)
|
||||
// ddpdfk triggers this on boss explosions so it needs fixing
|
||||
#if FLIPX == 1
|
||||
if ((src_x &0x1fff) < ((src_x-(dimx-1))&0x1fff))
|
||||
{
|
||||
// popmessage("sprite gets clipped off src_x %04x dimx %04x\n", src_x, dimx);
|
||||
return;
|
||||
}
|
||||
#else
|
||||
if ((src_x &0x1fff) > ((src_x+(dimx-1))&0x1fff))
|
||||
{
|
||||
// popmessage("sprite gets clipped off src_x %04x dimx %04x\n", src_x, dimx);
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
int startx = 0;
|
||||
const int dst_x_end = dst_x_start+dimx;
|
||||
|
||||
if (dst_x_start < clip->min_x)
|
||||
startx = clip->min_x - dst_x_start;
|
||||
|
||||
if (dst_x_end > clip->max_x)
|
||||
dimx -= (dst_x_end-1) - clip->max_x;
|
||||
|
||||
// wrong/unsafe slowdown sim
|
||||
if (dimy > starty && dimx > startx)
|
||||
{
|
||||
epic12_device_blit_delay += (dimy - starty)*(dimx - startx);
|
||||
|
||||
//printf("delay is now %d\n", epic12_device_blit_delay);
|
||||
}
|
||||
|
||||
#if BLENDED == 1
|
||||
#if _SMODE == 0
|
||||
#if _DMODE == 0
|
||||
const UINT8* salpha_table = epic12_device_colrtable[s_alpha];
|
||||
const UINT8* dalpha_table = epic12_device_colrtable[d_alpha];
|
||||
#endif
|
||||
|
||||
#if _DMODE == 5
|
||||
const UINT8* salpha_table = epic12_device_colrtable[s_alpha];
|
||||
#endif
|
||||
#if _DMODE == 1
|
||||
const UINT8* salpha_table = epic12_device_colrtable[s_alpha];
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#if _SMODE == 2
|
||||
#if _DMODE == 0
|
||||
|
||||
const UINT8* dalpha_table = epic12_device_colrtable[d_alpha];
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
for (y = starty; y < dimy; y++)
|
||||
{
|
||||
//bmp = &bitmap->pix(dst_y_start + y, dst_x_start+startx);
|
||||
bmp = m_bitmaps + (dst_y_start + y) * 0x2000 + (dst_x_start+startx);
|
||||
|
||||
const int ysrc_index = ((src_y + yf * y) & 0x0fff) * 0x2000;
|
||||
gfx2 = gfx + ysrc_index;
|
||||
|
||||
#if FLIPX == 1
|
||||
gfx2 += (src_x-startx);
|
||||
#else
|
||||
gfx2 += (src_x+startx);
|
||||
#endif
|
||||
|
||||
#if 1
|
||||
const UINT32* end = bmp+(dimx-startx);
|
||||
#else
|
||||
// maybe we can do some SSE type optimizations on larger blocks? right now this just results in more code and slower compiling tho.
|
||||
|
||||
const int width = dimx-startx;
|
||||
const UINT32* end = bmp+(width);
|
||||
|
||||
if (width<0) return;
|
||||
|
||||
int bigblocks = width>>3;
|
||||
|
||||
while (bigblocks)
|
||||
{
|
||||
#include "epic12pixel.inc"
|
||||
#include "epic12pixel.inc"
|
||||
#include "epic12pixel.inc"
|
||||
#include "epic12pixel.inc"
|
||||
#include "epic12pixel.inc"
|
||||
#include "epic12pixel.inc"
|
||||
#include "epic12pixel.inc"
|
||||
#include "epic12pixel.inc"
|
||||
|
||||
bigblocks--;
|
||||
}
|
||||
#endif
|
||||
while (bmp<end)
|
||||
{
|
||||
#include "epic12pixel.inc"
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
// g_profiler.stop();
|
||||
}
|
||||
|
||||
#undef LOOP_INCREMENTS
|
||||
|
|
@ -0,0 +1,193 @@
|
|||
/* This is the inner-most loop code (per-pixel) and thus the most performance sensitive part */
|
||||
|
||||
#if FLIPX == 1
|
||||
#define LOOP_INCREMENTS \
|
||||
bmp++; \
|
||||
gfx2--;
|
||||
#else
|
||||
|
||||
#define LOOP_INCREMENTS \
|
||||
bmp++; \
|
||||
gfx2++;
|
||||
#endif
|
||||
|
||||
|
||||
/*************** REALLY SIMPLE INNER LOOP, NON-BLENDED, NON-TINTED, SIMPLEST CASE ****************/
|
||||
#if REALLY_SIMPLE == 1
|
||||
|
||||
#if TRANSPARENT == 1
|
||||
pen = *gfx2;
|
||||
if (pen & 0x20000000)
|
||||
{
|
||||
*bmp = pen;
|
||||
#else
|
||||
*bmp = *gfx2;
|
||||
#endif
|
||||
|
||||
/*************** REGULAR INNER LOOPS ****************/
|
||||
#else // NOT REALLY_SIMPLE
|
||||
|
||||
pen = *gfx2;
|
||||
|
||||
#if TRANSPARENT == 1
|
||||
if (pen & 0x20000000)
|
||||
{
|
||||
#endif
|
||||
|
||||
// convert source to clr
|
||||
pen_to_clr(pen, &s_clr.trgb);
|
||||
//s_clr.u32 = (pen >> 3); // using the union is actually significantly slower than our pen_to_clr to function!
|
||||
// source * intesity and clamp
|
||||
|
||||
#if TINT == 1
|
||||
clr_mul(&s_clr.trgb, tint_clr);
|
||||
#endif
|
||||
|
||||
#if BLENDED == 1
|
||||
|
||||
// convert destination to clr
|
||||
pen_to_clr(*bmp, &d_clr.trgb);
|
||||
//d_clr.u32 = *bmp >> 3; // using the union is actually significantly slower than our pen_to_clr to function!
|
||||
#if _SMODE == 0
|
||||
//g_profiler.start(PROFILER_USER7);
|
||||
|
||||
|
||||
#if _DMODE == 0
|
||||
//g_profiler.start(PROFILER_USER1);
|
||||
// this is used extensively in the games (ingame, futari title screens etc.)
|
||||
|
||||
s_clr.trgb.r = epic12_device_colrtable_add[salpha_table[(s_clr.trgb.r)]][dalpha_table[(d_clr.trgb.r)]];
|
||||
s_clr.trgb.g = epic12_device_colrtable_add[salpha_table[(s_clr.trgb.g)]][dalpha_table[(d_clr.trgb.g)]];
|
||||
s_clr.trgb.b = epic12_device_colrtable_add[salpha_table[(s_clr.trgb.b)]][dalpha_table[(d_clr.trgb.b)]];
|
||||
#elif _DMODE == 1
|
||||
//g_profiler.start(PROFILER_USER2);
|
||||
// futari ~7%
|
||||
s_clr.trgb.r = epic12_device_colrtable_add[salpha_table[(s_clr.trgb.r)]][epic12_device_colrtable[(s_clr.trgb.r)][(d_clr.trgb.r)]];
|
||||
s_clr.trgb.g = epic12_device_colrtable_add[salpha_table[(s_clr.trgb.g)]][epic12_device_colrtable[(s_clr.trgb.g)][(d_clr.trgb.g)]];
|
||||
s_clr.trgb.b = epic12_device_colrtable_add[salpha_table[(s_clr.trgb.b)]][epic12_device_colrtable[(s_clr.trgb.b)][(d_clr.trgb.b)]];
|
||||
#elif _DMODE == 2
|
||||
//g_profiler.start(PROFILER_USER3);
|
||||
clr_mul_fixed(&clr0.trgb, s_alpha, &s_clr.trgb);
|
||||
clr_add_with_clr_square(&s_clr.trgb, &clr0.trgb, &d_clr.trgb);
|
||||
#elif _DMODE == 3
|
||||
//g_profiler.start(PROFILER_USER4);
|
||||
clr_mul_fixed(&clr0.trgb, s_alpha, &s_clr.trgb);
|
||||
clr_add(&s_clr.trgb, &clr0.trgb, &d_clr.trgb);
|
||||
|
||||
#elif _DMODE == 4
|
||||
//g_profiler.start(PROFILER_USER5);
|
||||
clr_mul_fixed(&clr0.trgb, s_alpha, &s_clr.trgb);
|
||||
clr_add_with_clr_mul_fixed_rev(&s_clr.trgb, &clr0.trgb, d_alpha, &d_clr.trgb);
|
||||
#elif _DMODE == 5
|
||||
// futari black character select ~13%
|
||||
//g_profiler.start(PROFILER_USER6);
|
||||
s_clr.trgb.r = epic12_device_colrtable_add[salpha_table[(s_clr.trgb.r)]][epic12_device_colrtable_rev[(s_clr.trgb.r)][(d_clr.trgb.r)]];
|
||||
s_clr.trgb.g = epic12_device_colrtable_add[salpha_table[(s_clr.trgb.g)]][epic12_device_colrtable_rev[(s_clr.trgb.g)][(d_clr.trgb.g)]];
|
||||
s_clr.trgb.b = epic12_device_colrtable_add[salpha_table[(s_clr.trgb.b)]][epic12_device_colrtable_rev[(s_clr.trgb.b)][(d_clr.trgb.b)]];
|
||||
|
||||
#elif _DMODE == 6
|
||||
//g_profiler.start(PROFILER_USER7);
|
||||
clr_mul_fixed(&clr0.trgb, s_alpha, &s_clr.trgb);
|
||||
clr_add_with_clr_mul_rev_square(&s_clr.trgb, &clr0.trgb, &d_clr.trgb);
|
||||
#elif _DMODE == 7
|
||||
//g_profiler.start(PROFILER_USER8);
|
||||
clr_mul_fixed(&clr0.trgb, s_alpha, &s_clr.trgb);
|
||||
clr_add(&s_clr.trgb, &clr0.trgb, &d_clr.trgb);
|
||||
#endif
|
||||
|
||||
//g_profiler.stop();
|
||||
#elif _SMODE == 1
|
||||
//g_profiler.start(PROFILER_USER6);
|
||||
clr_square(&clr0.trgb, &s_clr.trgb);
|
||||
|
||||
#elif _SMODE == 2
|
||||
// g_profiler.start(PROFILER_USER4);
|
||||
#if _DMODE == 0
|
||||
// this is used heavily on espgal2 highscore screen (~28%) optimized to avoid use of temp clr0 variable
|
||||
s_clr.trgb.r = epic12_device_colrtable_add[epic12_device_colrtable[(d_clr.trgb.r)][(s_clr.trgb.r)]][dalpha_table[(d_clr.trgb.r)]];
|
||||
s_clr.trgb.g = epic12_device_colrtable_add[epic12_device_colrtable[(d_clr.trgb.g)][(s_clr.trgb.g)]][dalpha_table[(d_clr.trgb.g)]];
|
||||
s_clr.trgb.b = epic12_device_colrtable_add[epic12_device_colrtable[(d_clr.trgb.b)][(s_clr.trgb.b)]][dalpha_table[(d_clr.trgb.b)]];
|
||||
#elif _DMODE == 1
|
||||
clr_mul_3param(&clr0.trgb, &s_clr.trgb, &d_clr.trgb);
|
||||
clr_add_with_clr_mul_3param(&s_clr.trgb, &clr0.trgb, &d_clr.trgb, &s_clr.trgb);
|
||||
#elif _DMODE == 2
|
||||
clr_mul_3param(&clr0.trgb, &s_clr.trgb, &d_clr.trgb);
|
||||
clr_add_with_clr_square(&s_clr.trgb, &clr0.trgb, &d_clr.trgb);
|
||||
#elif _DMODE == 3
|
||||
clr_mul_3param(&clr0.trgb, &s_clr.trgb, &d_clr.trgb);
|
||||
clr_add(&s_clr.trgb, &clr0.trgb, &d_clr.trgb);
|
||||
|
||||
#elif _DMODE == 4
|
||||
clr_mul_3param(&clr0.trgb, &s_clr.trgb, &d_clr.trgb);
|
||||
clr_add_with_clr_mul_fixed_rev(&s_clr.trgb, &clr0.trgb, d_alpha, &d_clr.trgb);
|
||||
#elif _DMODE == 5
|
||||
clr_mul_3param(&clr0.trgb, &s_clr.trgb, &d_clr.trgb);
|
||||
clr_add_with_clr_mul_rev_3param(&s_clr.trgb, &clr0.trgb, &d_clr.trgb, &s_clr.trgb);
|
||||
#elif _DMODE == 6
|
||||
clr_mul_3param(&clr0.trgb, &s_clr.trgb, &d_clr.trgb);
|
||||
clr_add_with_clr_mul_rev_square(&s_clr.trgb, &clr0.trgb, &d_clr.trgb);
|
||||
#elif _DMODE == 7
|
||||
clr_mul_3param(&clr0.trgb, &s_clr.trgb, &d_clr.trgb);
|
||||
clr_add(&s_clr.trgb, &clr0.trgb, &d_clr.trgb);
|
||||
#endif
|
||||
//g_profiler.stop();
|
||||
|
||||
#elif _SMODE == 3
|
||||
//g_profiler.start(PROFILER_USER1);
|
||||
clr_copy(&clr0.trgb, &s_clr.trgb);
|
||||
|
||||
#elif _SMODE == 4
|
||||
//g_profiler.start(PROFILER_USER2);
|
||||
clr_mul_fixed_rev(&clr0.trgb, s_alpha, &s_clr.trgb);
|
||||
#elif _SMODE == 5
|
||||
//g_profiler.start(PROFILER_USER3);
|
||||
clr_mul_rev_square(&clr0.trgb, &s_clr.trgb);
|
||||
#elif _SMODE == 6
|
||||
//g_profiler.start(PROFILER_USER4);
|
||||
clr_mul_rev_3param(&clr0.trgb, &s_clr.trgb, &d_clr.trgb);
|
||||
#elif _SMODE == 7
|
||||
//g_profiler.start(PROFILER_USER5);
|
||||
clr_copy(&clr0.trgb, &s_clr.trgb);
|
||||
#endif
|
||||
|
||||
|
||||
// smode 0/2 cases are already split up and handled above.
|
||||
#if _SMODE != 2
|
||||
#if _SMODE != 0
|
||||
|
||||
#if _DMODE == 0
|
||||
clr_add_with_clr_mul_fixed(&s_clr.trgb, &clr0.trgb, d_alpha, &d_clr.trgb);
|
||||
#elif _DMODE == 1
|
||||
clr_add_with_clr_mul_3param(&s_clr.trgb, &clr0.trgb, &d_clr.trgb, &s_clr.trgb);
|
||||
#elif _DMODE == 2
|
||||
clr_add_with_clr_square(&s_clr.trgb, &clr0.trgb, &d_clr.trgb);
|
||||
#elif _DMODE == 3
|
||||
clr_add(&s_clr.trgb, &clr0.trgb, &d_clr.trgb);
|
||||
|
||||
#elif _DMODE == 4
|
||||
clr_add_with_clr_mul_fixed_rev(&s_clr.trgb, &clr0.trgb, d_alpha, &d_clr.trgb);
|
||||
#elif _DMODE == 5
|
||||
clr_add_with_clr_mul_rev_3param(&s_clr.trgb, &clr0.trgb, &d_clr.trgb, &s_clr.trgb);
|
||||
#elif _DMODE == 6
|
||||
clr_add_with_clr_mul_rev_square(&s_clr.trgb, &clr0.trgb, &d_clr.trgb);
|
||||
#elif _DMODE == 7
|
||||
clr_add(&s_clr.trgb, &clr0.trgb, &d_clr.trgb);
|
||||
#endif
|
||||
|
||||
//g_profiler.stop();
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
// write result
|
||||
*bmp = clr_to_pen(&s_clr.trgb)|(pen&0x20000000);
|
||||
//*bmp = (s_clr.u32<<3)|(pen&0x20000000); // using the union is actually significantly slower than our clr_to_pen function!
|
||||
|
||||
#endif // END NOT REALLY SIMPLE
|
||||
|
||||
#if TRANSPARENT == 1
|
||||
}
|
||||
#endif
|
||||
LOOP_INCREMENTS
|
||||
|
|
@ -0,0 +1,223 @@
|
|||
// thready spent most of the 1900's in a little old lady's sewing basket..
|
||||
// thready had big dreams, this is one of them! - dink 2022
|
||||
|
||||
#define THREADY_WINDOWS 1 // we're on Windows
|
||||
#define THREADY_PTHREAD 2 // anything that supports pthreads (linux, android, mac)
|
||||
#define THREADY_0THREAD 3 // neither of the above.. (no threading!)
|
||||
|
||||
#if defined(WIN32)
|
||||
#define THREADY THREADY_WINDOWS
|
||||
#include "windows.h"
|
||||
#endif
|
||||
|
||||
#if !defined(WIN32) && ( defined(__linux__) || defined(__ANDROID__) || defined(__APPLE__) )
|
||||
#define THREADY THREADY_PTHREAD
|
||||
#include <semaphore.h>
|
||||
#include <pthread.h>
|
||||
#include <unistd.h>
|
||||
#endif
|
||||
|
||||
#ifndef THREADY
|
||||
// system not windows and without pthreads
|
||||
#define THREADY THREADY_0THREAD
|
||||
#endif
|
||||
|
||||
#if (THREADY == THREADY_WINDOWS)
|
||||
long unsigned int __stdcall ThreadyProc(void*);
|
||||
|
||||
struct threadystruct
|
||||
{
|
||||
INT32 thready_ok;
|
||||
INT32 ok_to_thread;
|
||||
INT32 end_thread;
|
||||
HANDLE our_thread;
|
||||
HANDLE our_event;
|
||||
DWORD our_threadid;
|
||||
void (*our_callback)();
|
||||
|
||||
void init(void (*thread_callback)()) {
|
||||
thready_ok = 0;
|
||||
ok_to_thread = 0;
|
||||
|
||||
our_callback = thread_callback;
|
||||
|
||||
SYSTEM_INFO info;
|
||||
GetSystemInfo(&info);
|
||||
INT32 maxproc = (info.dwNumberOfProcessors > 4) ? 4 : info.dwNumberOfProcessors;
|
||||
INT32 thready_proc = rand() % maxproc;
|
||||
|
||||
//bprintf(0, _T("Thready: processors available: %d, blitter processor: %d\n"), info.dwNumberOfProcessors, thready_proc);
|
||||
|
||||
end_thread = 0; // good to go!
|
||||
|
||||
our_event = CreateEvent(NULL, TRUE, FALSE, TEXT("blitEvent"));
|
||||
our_thread = CreateThread(NULL, 0, ThreadyProc, NULL, 0, &our_threadid);
|
||||
|
||||
SetThreadIdealProcessor(our_thread, thready_proc);
|
||||
|
||||
if (our_event && our_thread) {
|
||||
//bprintf(0, _T("Thready: we're gonna git 'r dun!\n"));
|
||||
thready_ok = 1;
|
||||
ok_to_thread = 1;
|
||||
} else {
|
||||
//bprintf(0, _T("Thready: failure to create thread!\n"));
|
||||
}
|
||||
}
|
||||
|
||||
void exit() {
|
||||
if (thready_ok) {
|
||||
//bprintf(0, _T("Thready: notify thread to exit..\n"));
|
||||
end_thread = 1;
|
||||
SetEvent(our_event);
|
||||
do {
|
||||
Sleep(42); // let thread realize it's time to die
|
||||
} while (~end_thread & 0x100);
|
||||
CloseHandle(our_event);
|
||||
CloseHandle(our_thread);
|
||||
thready_ok = 0;
|
||||
}
|
||||
}
|
||||
|
||||
void set_threading(INT32 value)
|
||||
{
|
||||
ok_to_thread = value;
|
||||
}
|
||||
|
||||
void notify() {
|
||||
if (thready_ok && ok_to_thread) {
|
||||
SetEvent(our_event);
|
||||
} else {
|
||||
// fallback to single-threaded mode
|
||||
our_callback();
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
static threadystruct thready;
|
||||
|
||||
long unsigned int __stdcall ThreadyProc(void*) {
|
||||
do {
|
||||
DWORD dwWaitResult = WaitForSingleObject(thready.our_event, INFINITE);
|
||||
|
||||
if (dwWaitResult == WAIT_OBJECT_0 && thready.end_thread == 0) {
|
||||
thready.our_callback();
|
||||
ResetEvent(thready.our_event);
|
||||
} else {
|
||||
thready.end_thread |= 0x100;
|
||||
//bprintf(0, _T("Thready: thread-event thread ending..\n"));
|
||||
return 0;
|
||||
}
|
||||
} while (1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif // THREADY_WINDOWS
|
||||
|
||||
#if (THREADY == THREADY_PTHREAD)
|
||||
static void *ThreadyProc(void*);
|
||||
|
||||
struct threadystruct
|
||||
{
|
||||
INT32 thready_ok;
|
||||
INT32 ok_to_thread;
|
||||
INT32 end_thread;
|
||||
sem_t our_event;
|
||||
pthread_t our_thread;
|
||||
void (*our_callback)();
|
||||
|
||||
void init(void (*thread_callback)()) {
|
||||
thready_ok = 0;
|
||||
ok_to_thread = 0;
|
||||
end_thread = 0;
|
||||
|
||||
our_callback = thread_callback;
|
||||
|
||||
INT32 our_event_rv = sem_init(&our_event, 0, 0);
|
||||
INT32 our_thread_rv = pthread_create(&our_thread, NULL, ThreadyProc, NULL);
|
||||
|
||||
if (our_thread_rv == 0 && our_event_rv == 0) {
|
||||
//bprintf(0, _T("Thready: we're gonna git 'r dun!\n"));
|
||||
thready_ok = 1;
|
||||
ok_to_thread = 1;
|
||||
} else {
|
||||
//bprintf(0, _T("Thready: failure to create thread - falling back to single-thread mode!\n"));
|
||||
}
|
||||
}
|
||||
|
||||
void exit() {
|
||||
if (thready_ok) {
|
||||
//bprintf(0, _T("Thready: notify thread to exit..\n"));
|
||||
end_thread = 1;
|
||||
sem_post(&our_event);
|
||||
do {
|
||||
sleep(1); // let thread realize it's time to die
|
||||
} while (~end_thread & 0x100);
|
||||
pthread_join(our_thread, NULL);
|
||||
sem_destroy(&our_event);
|
||||
thready_ok = 0;
|
||||
}
|
||||
}
|
||||
|
||||
void set_threading(INT32 value)
|
||||
{
|
||||
ok_to_thread = value;
|
||||
}
|
||||
|
||||
void notify() {
|
||||
if (thready_ok && ok_to_thread) {
|
||||
sem_post(&our_event);
|
||||
} else {
|
||||
// fallback to single-threaded mode
|
||||
our_callback();
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
static threadystruct thready;
|
||||
|
||||
static void *ThreadyProc(void*) {
|
||||
do {
|
||||
sem_wait(&thready.our_event);
|
||||
|
||||
if (thready.end_thread == 0) {
|
||||
thready.our_callback();
|
||||
} else {
|
||||
thready.end_thread |= 0x100;
|
||||
//bprintf(0, _T("Thready: thread-event thread ending..\n"));
|
||||
return 0;
|
||||
}
|
||||
} while (1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif // THREADY_PTHREAD
|
||||
|
||||
#if (THREADY == THREADY_0THREAD)
|
||||
// this isn't great
|
||||
struct threadystruct
|
||||
{
|
||||
void (*our_callback)();
|
||||
|
||||
void init(void (*thread_callback)()) {
|
||||
our_callback = thread_callback;
|
||||
|
||||
bprintf(0, _T("Thready: single-threaded on this platform, performance will suck.\n"));
|
||||
}
|
||||
|
||||
void exit() {
|
||||
}
|
||||
|
||||
void set_threading(INT32 value)
|
||||
{
|
||||
if (value)
|
||||
bprintf(0, _T("Thready: we can't thread on this platform yet.\n"));
|
||||
}
|
||||
|
||||
void notify() {
|
||||
// fallback to single-threaded mode
|
||||
our_callback();
|
||||
}
|
||||
};
|
||||
|
||||
static threadystruct thready;
|
||||
#endif // THREADY_0THREAD
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -123,7 +123,7 @@ static INT32 __cdecl UncompLoadAcb(struct BurnArea* pba)
|
|||
// Compress a state using deflate
|
||||
INT32 BurnStateCompress(UINT8** pDef, INT32* pnDefLen, INT32 bAll)
|
||||
{
|
||||
if ((BurnDrvGetHardwareCode() & 0xffff0000) == 0x06010000) {
|
||||
if ((BurnDrvGetHardwareCode() & 0xffff0000) == HARDWARE_CAVE_CV1000) {
|
||||
// Systems with a huge amount of data can be defined here to
|
||||
// use this raw state handler.
|
||||
|
||||
|
|
@ -210,7 +210,7 @@ static INT32 __cdecl StateDecompressAcb(struct BurnArea* pba)
|
|||
|
||||
INT32 BurnStateDecompress(UINT8* Def, INT32 nDefLen, INT32 bAll)
|
||||
{
|
||||
if ((BurnDrvGetHardwareCode() & 0xffff0000) == 0x06010000) {
|
||||
if ((BurnDrvGetHardwareCode() & 0xffff0000) == HARDWARE_CAVE_CV1000) {
|
||||
// Systems with a huge amount of data can be defined here to
|
||||
// use this raw state handler.
|
||||
pBufferUncomp = Def;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,100 @@
|
|||
#pragma once
|
||||
|
||||
#ifndef __SH3COMN_H__
|
||||
#define __SH3COMN_H__
|
||||
|
||||
|
||||
// actual port handling is more complex than this
|
||||
// which should be considered a temporary solution
|
||||
// just used some arbitrary port nubmers
|
||||
#define SH3_PORT_A (0x10*8)
|
||||
#define SH3_PORT_B (0x11*8)
|
||||
#define SH3_PORT_C (0x12*8)
|
||||
#define SH3_PORT_D (0x13*8)
|
||||
#define SH3_PORT_E (0x14*8)
|
||||
#define SH3_PORT_F (0x15*8)
|
||||
#define SH3_PORT_G (0x16*8)
|
||||
#define SH3_PORT_H (0x17*8)
|
||||
/* no I */
|
||||
#define SH3_PORT_J (0x18*8)
|
||||
#define SH3_PORT_K (0x19*8)
|
||||
#define SH3_PORT_L (0x1a*8)
|
||||
|
||||
/* SH3 lower area regs */
|
||||
|
||||
#define SH3_LOWER_REGBASE (0x04000000)
|
||||
#define SH3_LOWER_REGEND (0x07ffffff)
|
||||
|
||||
#define INTEVT2 ((0x4000000 - SH3_LOWER_REGBASE)/4)
|
||||
#define IRR0_IRR1 ((0x4000004 - SH3_LOWER_REGBASE)/4)
|
||||
#define PINTER_IPRC ((0x4000014 - SH3_LOWER_REGBASE)/4)
|
||||
|
||||
#define SH3_SAR0_ADDR ((0x4000020 - SH3_LOWER_REGBASE)/4)
|
||||
#define SH3_DAR0_ADDR ((0x4000024 - SH3_LOWER_REGBASE)/4)
|
||||
#define SH3_DMATCR0_ADDR ((0x4000028 - SH3_LOWER_REGBASE)/4)
|
||||
#define SH3_CHCR0_ADDR ((0x400002c - SH3_LOWER_REGBASE)/4)
|
||||
#define SH3_SAR1_ADDR ((0x4000030 - SH3_LOWER_REGBASE)/4)
|
||||
#define SH3_DAR1_ADDR ((0x4000034 - SH3_LOWER_REGBASE)/4)
|
||||
#define SH3_DMATCR1_ADDR ((0x4000038 - SH3_LOWER_REGBASE)/4)
|
||||
#define SH3_CHCR1_ADDR ((0x400003c - SH3_LOWER_REGBASE)/4)
|
||||
#define SH3_SAR2_ADDR ((0x4000040 - SH3_LOWER_REGBASE)/4)
|
||||
#define SH3_DAR2_ADDR ((0x4000044 - SH3_LOWER_REGBASE)/4)
|
||||
#define SH3_DMATCR2_ADDR ((0x4000048 - SH3_LOWER_REGBASE)/4)
|
||||
#define SH3_CHCR2_ADDR ((0x400004c - SH3_LOWER_REGBASE)/4)
|
||||
#define SH3_SAR3_ADDR ((0x4000050 - SH3_LOWER_REGBASE)/4)
|
||||
#define SH3_DAR3_ADDR ((0x4000054 - SH3_LOWER_REGBASE)/4)
|
||||
#define SH3_DMATCR3_ADDR ((0x4000058 - SH3_LOWER_REGBASE)/4)
|
||||
#define SH3_CHCR3_ADDR ((0x400005c - SH3_LOWER_REGBASE)/4)
|
||||
#define SH3_DMAOR_ADDR ((0x4000060 - SH3_LOWER_REGBASE)/4)
|
||||
|
||||
|
||||
#define PCCR_PDCR ((0x4000104 - SH3_LOWER_REGBASE)/4)
|
||||
#define PECR_PFCR ((0x4000108 - SH3_LOWER_REGBASE)/4)
|
||||
#define PGCR_PHCR ((0x400010c - SH3_LOWER_REGBASE)/4)
|
||||
#define PJCR_PKCR ((0x4000110 - SH3_LOWER_REGBASE)/4)
|
||||
#define PLCR_SCPCR ((0x4000114 - SH3_LOWER_REGBASE)/4)
|
||||
|
||||
#define PADR_PBDR ((0x4000120 - SH3_LOWER_REGBASE)/4)
|
||||
#define PCDR_PDDR ((0x4000124 - SH3_LOWER_REGBASE)/4)
|
||||
#define PEDR_PFDR ((0x4000128 - SH3_LOWER_REGBASE)/4)
|
||||
#define PGDR_PHDR ((0x400012c - SH3_LOWER_REGBASE)/4)
|
||||
#define PJDR_PKDR ((0x4000130 - SH3_LOWER_REGBASE)/4)
|
||||
#define PLDR_SCPDR ((0x4000134 - SH3_LOWER_REGBASE)/4)
|
||||
|
||||
#define SCSMR2_SCBRR2 ((0x4000150 - SH3_LOWER_REGBASE)/4)
|
||||
#define SCSCR2_SCFTDR2 ((0x4000154 - SH3_LOWER_REGBASE)/4)
|
||||
#define SCSSR2_SCFRDR2 ((0x4000158 - SH3_LOWER_REGBASE)/4)
|
||||
#define SCFCR2_SCFDR2 ((0x400015c - SH3_LOWER_REGBASE)/4)
|
||||
|
||||
|
||||
/* SH3 upper area */
|
||||
|
||||
|
||||
#define SH3_UPPER_REGBASE (0xffffd000)
|
||||
#define SH3_UPPER_REGEND (0xffffffff)
|
||||
|
||||
#define SH3_ICR0_IPRA_ADDR ((0xfffffee0 - SH3_UPPER_REGBASE)/4)
|
||||
#define SH3_IPRB_ADDR ((0xfffffee4 - SH3_UPPER_REGBASE)/4)
|
||||
|
||||
#define SH3_TOCR_TSTR_ADDR ((0xfffffe90 - SH3_UPPER_REGBASE)/4)
|
||||
#define SH3_TCOR0_ADDR ((0xfffffe94 - SH3_UPPER_REGBASE)/4)
|
||||
#define SH3_TCNT0_ADDR ((0xfffffe98 - SH3_UPPER_REGBASE)/4)
|
||||
#define SH3_TCR0_ADDR ((0xfffffe9c - SH3_UPPER_REGBASE)/4)
|
||||
#define SH3_TCOR1_ADDR ((0xfffffea0 - SH3_UPPER_REGBASE)/4)
|
||||
#define SH3_TCNT1_ADDR ((0xfffffea4 - SH3_UPPER_REGBASE)/4)
|
||||
#define SH3_TCR1_ADDR ((0xfffffea8 - SH3_UPPER_REGBASE)/4)
|
||||
#define SH3_TCOR2_ADDR ((0xfffffeac - SH3_UPPER_REGBASE)/4)
|
||||
#define SH3_TCNT2_ADDR ((0xfffffeb0 - SH3_UPPER_REGBASE)/4)
|
||||
#define SH3_TCR2_ADDR ((0xfffffeb4 - SH3_UPPER_REGBASE)/4)
|
||||
#define SH3_TCPR2_ADDR ((0xfffffeb8 - SH3_UPPER_REGBASE)/4)
|
||||
#define SH3_TRA_ADDR ((0xffffffd0 - SH3_UPPER_REGBASE)/4)
|
||||
#define SH3_EXPEVT_ADDR ((0xffffffd4 - SH3_UPPER_REGBASE)/4)
|
||||
#define SH3_INTEVT_ADDR ((0xffffffd8 - SH3_UPPER_REGBASE)/4)
|
||||
|
||||
// dink
|
||||
#define SH3_BSC_BCR12 ((0xffffff60 - SH3_UPPER_REGBASE)/4)
|
||||
#define SH3_BSC_BCR3 ((0xffffff7e - SH3_UPPER_REGBASE)/4)
|
||||
#define SH3_BSC_WCR12 ((0xffffff64 - SH3_UPPER_REGBASE)/4)
|
||||
// dink
|
||||
|
||||
#endif /* __SH3COMN_H__ */
|
||||
|
|
@ -0,0 +1,732 @@
|
|||
/* Handlers for SH3 internals */
|
||||
|
||||
/*#include "emu.h"
|
||||
#include "debugger.h"
|
||||
#include "sh4.h"
|
||||
#include "sh4comn.h"
|
||||
#include "sh3comn.h"
|
||||
#include "sh4tmu.h"
|
||||
#include "sh4dmac.h"
|
||||
*/
|
||||
|
||||
/* High internal area (ffffxxxx) */
|
||||
|
||||
static void sh3_internal_high_w(UINT32 offset, UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_sh3internal_upper[offset]);
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case SH3_BSC_BCR12:
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
logerror("'%s' (%08x): BCR1 internal write to %08x = %08x & %08x (SH3_ICR0_IPRA_ADDR - ICR0)\n",tag(), m_pc & AM,(offset *4)+SH3_UPPER_REGBASE,data,mem_mask);
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
logerror("'%s' (%08x): BCR2 internal write to %08x = %08x & %08x (SH3_ICR0_IPRA_ADDR - IPRA)\n",tag(), m_pc & AM,(offset *4)+SH3_UPPER_REGBASE,data,mem_mask);
|
||||
}
|
||||
|
||||
break;
|
||||
case SH3_BSC_BCR3:
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
logerror("'%s' (%08x): BCR3h internal write to %08x = %08x & %08x (SH3_ICR0_IPRA_ADDR - ICR0)\n",tag(), m_pc & AM,(offset *4)+SH3_UPPER_REGBASE,data,mem_mask);
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
logerror("'%s' (%08x): BCR3l internal write to %08x = %08x & %08x (SH3_ICR0_IPRA_ADDR - IPRA)\n",tag(), m_pc & AM,(offset *4)+SH3_UPPER_REGBASE,data,mem_mask);
|
||||
}
|
||||
|
||||
break;
|
||||
case SH3_BSC_WCR12:
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
logerror("'%s' (%08x): WCR1 internal write to %08x = %08x & %08x (SH3_ICR0_IPRA_ADDR - ICR0)\n",tag(), m_pc & AM,(offset *4)+SH3_UPPER_REGBASE,data,mem_mask);
|
||||
// cave-1000, area 0 (rom) and area 3 (ram)
|
||||
const int WCR1_CYCLES[4] = { 1, 1, 2, 3 };
|
||||
for (INT32 i = 0; i < 7; i++) {
|
||||
AreaWS1[i] = WCR1_CYCLES[(data >> (16+(i << 1))) & 3];
|
||||
//bprintf(0, _T("areaWS1[%d] = %d\n"), i, AreaWS1[i]);
|
||||
}
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
logerror("'%s' (%08x): WCR2 internal write to %08x = %08x & %08x (SH3_ICR0_IPRA_ADDR - IPRA)\n",tag(), m_pc & AM,(offset *4)+SH3_UPPER_REGBASE,data,mem_mask);
|
||||
// cave-1000, we only care about area 0 (rom) and area 3 (ram)
|
||||
const int a3dram[4] = { 1, 1, 2, 3 };
|
||||
const int a0waitstates[8] = { 0, 1, 2, 3, 4, 6, 8, 10 };
|
||||
|
||||
AreaWS2[3] = a3dram[(data >> 5) & 3];
|
||||
AreaWS2[0] = a0waitstates[data & 7];
|
||||
|
||||
//logerror("Area 0 Wait States %d\n", AreaWS2[0]);
|
||||
//logerror("Area 3 Wait States %d\n", AreaWS2[3]);
|
||||
}
|
||||
|
||||
break;
|
||||
case SH3_ICR0_IPRA_ADDR:
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
logerror("'%s' (%08x): INTC internal write to %08x = %08x & %08x (SH3_ICR0_IPRA_ADDR - ICR0)\n",tag(), m_pc & AM,(offset *4)+SH3_UPPER_REGBASE,data,mem_mask);
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
logerror("'%s' (%08x): INTC internal write to %08x = %08x & %08x (SH3_ICR0_IPRA_ADDR - IPRA)\n",tag(), m_pc & AM,(offset *4)+SH3_UPPER_REGBASE,data,mem_mask);
|
||||
sh4_handler_ipra_w(data&0xffff,mem_mask&0xffff);
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
case SH3_IPRB_ADDR:
|
||||
logerror("'%s' (%08x): INTC internal write to %08x = %08x & %08x (SH3_IPRB_ADDR)\n",tag(), m_pc & AM,(offset *4)+SH3_UPPER_REGBASE,data,mem_mask);
|
||||
break;
|
||||
|
||||
case SH3_TOCR_TSTR_ADDR:
|
||||
logerror("'%s' (%08x): TMU internal write to %08x = %08x & %08x (SH3_TOCR_TSTR_ADDR)\n",tag(), m_pc & AM,(offset *4)+SH3_UPPER_REGBASE,data,mem_mask);
|
||||
if (mem_mask&0xff000000)
|
||||
{
|
||||
sh4_handle_tocr_addr_w((data>>24)&0xffff, (mem_mask>>24)&0xff);
|
||||
}
|
||||
if (mem_mask&0x0000ff00)
|
||||
{
|
||||
sh4_handle_tstr_addr_w((data>>8)&0xff, (mem_mask>>8)&0xff);
|
||||
}
|
||||
if (mem_mask&0x00ff00ff)
|
||||
{
|
||||
fatalerror("SH3_TOCR_TSTR_ADDR unused bits accessed (write)\n", 0);
|
||||
}
|
||||
break;
|
||||
case SH3_TCOR0_ADDR: sh4_handle_tcor0_addr_w(data, mem_mask);break;
|
||||
case SH3_TCOR1_ADDR: sh4_handle_tcor1_addr_w(data, mem_mask);break;
|
||||
case SH3_TCOR2_ADDR: sh4_handle_tcor2_addr_w(data, mem_mask);break;
|
||||
case SH3_TCNT0_ADDR: sh4_handle_tcnt0_addr_w(data, mem_mask);break;
|
||||
case SH3_TCNT1_ADDR: sh4_handle_tcnt1_addr_w(data, mem_mask);break;
|
||||
case SH3_TCNT2_ADDR: sh4_handle_tcnt2_addr_w(data, mem_mask);break;
|
||||
case SH3_TCR0_ADDR: sh4_handle_tcr0_addr_w(data>>16, mem_mask>>16);break;
|
||||
case SH3_TCR1_ADDR: sh4_handle_tcr1_addr_w(data>>16, mem_mask>>16);break;
|
||||
case SH3_TCR2_ADDR: sh4_handle_tcr2_addr_w(data>>16, mem_mask>>16);break;
|
||||
case SH3_TCPR2_ADDR: sh4_handle_tcpr2_addr_w(data, mem_mask);break;
|
||||
|
||||
default:
|
||||
logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (unk)\n",tag(), m_pc & AM,(offset *4)+SH3_UPPER_REGBASE,data,mem_mask);
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
}
|
||||
|
||||
static UINT32 sh3_internal_high_r(UINT32 offset, UINT32 mem_mask)
|
||||
{
|
||||
UINT32 ret = 0;
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case SH3_ICR0_IPRA_ADDR:
|
||||
logerror("'%s' (%08x): INTC internal read from %08x mask %08x (SH3_ICR0_IPRA_ADDR - %08x)\n",tag(), m_pc & AM,(offset *4)+SH3_UPPER_REGBASE,mem_mask, m_sh3internal_upper[offset]);
|
||||
return (m_sh3internal_upper[offset] & 0xffff0000) | (m_SH4_IPRA & 0xffff);
|
||||
|
||||
case SH3_IPRB_ADDR:
|
||||
logerror("'%s' (%08x): INTC internal read from %08x mask %08x (SH3_IPRB_ADDR - %08x)\n",tag(), m_pc & AM,(offset *4)+SH3_UPPER_REGBASE,mem_mask, m_sh3internal_upper[offset]);
|
||||
return m_sh3internal_upper[offset];
|
||||
|
||||
case SH3_TOCR_TSTR_ADDR:
|
||||
|
||||
if (mem_mask&0xff00000)
|
||||
{
|
||||
ret |= (sh4_handle_tocr_addr_r(mem_mask)&0xff)<<24;
|
||||
}
|
||||
if (mem_mask&0x0000ff00)
|
||||
{
|
||||
ret |= (sh4_handle_tstr_addr_r(mem_mask)&0xff)<<8;
|
||||
}
|
||||
if (mem_mask&0x00ff00ff)
|
||||
{
|
||||
fatalerror("SH3_TOCR_TSTR_ADDR unused bits accessed (read)\n", 0);
|
||||
}
|
||||
return ret;
|
||||
case SH3_TCOR0_ADDR: return sh4_handle_tcor0_addr_r(mem_mask);
|
||||
case SH3_TCOR1_ADDR: return sh4_handle_tcor1_addr_r(mem_mask);
|
||||
case SH3_TCOR2_ADDR: return sh4_handle_tcor2_addr_r(mem_mask);
|
||||
case SH3_TCNT0_ADDR: return sh4_handle_tcnt0_addr_r(mem_mask);
|
||||
case SH3_TCNT1_ADDR: return sh4_handle_tcnt1_addr_r(mem_mask);
|
||||
case SH3_TCNT2_ADDR: return sh4_handle_tcnt2_addr_r(mem_mask);
|
||||
case SH3_TCR0_ADDR: return sh4_handle_tcr0_addr_r(mem_mask)<<16;
|
||||
case SH3_TCR1_ADDR: return sh4_handle_tcr1_addr_r(mem_mask)<<16;
|
||||
case SH3_TCR2_ADDR: return sh4_handle_tcr2_addr_r(mem_mask)<<16;
|
||||
case SH3_TCPR2_ADDR: return sh4_handle_tcpr2_addr_r(mem_mask);
|
||||
|
||||
|
||||
case SH3_TRA_ADDR:
|
||||
logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (SH3 TRA - %08x)\n",tag(), m_pc & AM,(offset *4)+SH3_UPPER_REGBASE,mem_mask, m_sh3internal_upper[offset]);
|
||||
return m_sh3internal_upper[offset];
|
||||
|
||||
case SH3_EXPEVT_ADDR:
|
||||
logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (SH3 EXPEVT - %08x)\n",tag(), m_pc & AM,(offset *4)+SH3_UPPER_REGBASE,mem_mask, m_sh3internal_upper[offset]);
|
||||
return m_sh3internal_upper[offset];
|
||||
|
||||
case SH3_INTEVT_ADDR:
|
||||
logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (SH3 INTEVT - %08x)\n",tag(), m_pc & AM,(offset *4)+SH3_UPPER_REGBASE,mem_mask, m_sh3internal_upper[offset]);
|
||||
fatalerror("INTEVT unsupported on SH3\n", 0);
|
||||
// never executed
|
||||
//return m_sh3internal_upper[offset];
|
||||
|
||||
|
||||
default:
|
||||
logerror("'%s' (%08x): unmapped internal read from %08x mask %08x\n",tag(), m_pc & AM,(offset *4)+SH3_UPPER_REGBASE,mem_mask);
|
||||
return m_sh3internal_upper[offset];
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static UINT32 sh3_internal_r(UINT32 offset, UINT32 mem_mask)
|
||||
{
|
||||
if (offset<0x1000)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
case SH3_SAR0_ADDR: return sh4_handle_sar0_addr_r(mem_mask);
|
||||
case SH3_SAR1_ADDR: return sh4_handle_sar1_addr_r(mem_mask);
|
||||
case SH3_SAR2_ADDR: return sh4_handle_sar2_addr_r(mem_mask);
|
||||
case SH3_SAR3_ADDR: return sh4_handle_sar3_addr_r(mem_mask);
|
||||
case SH3_DAR0_ADDR: return sh4_handle_dar0_addr_r(mem_mask);
|
||||
case SH3_DAR1_ADDR: return sh4_handle_dar1_addr_r(mem_mask);
|
||||
case SH3_DAR2_ADDR: return sh4_handle_dar2_addr_r(mem_mask);
|
||||
case SH3_DAR3_ADDR: return sh4_handle_dar3_addr_r(mem_mask);
|
||||
case SH3_DMATCR0_ADDR: return sh4_handle_dmatcr0_addr_r(mem_mask);
|
||||
case SH3_DMATCR1_ADDR: return sh4_handle_dmatcr1_addr_r(mem_mask);
|
||||
case SH3_DMATCR2_ADDR: return sh4_handle_dmatcr2_addr_r(mem_mask);
|
||||
case SH3_DMATCR3_ADDR: return sh4_handle_dmatcr3_addr_r(mem_mask);
|
||||
case SH3_CHCR0_ADDR: return sh4_handle_chcr0_addr_r(mem_mask);
|
||||
case SH3_CHCR1_ADDR: return sh4_handle_chcr1_addr_r(mem_mask);
|
||||
case SH3_CHCR2_ADDR: return sh4_handle_chcr2_addr_r(mem_mask);
|
||||
case SH3_CHCR3_ADDR: return sh4_handle_chcr3_addr_r(mem_mask);
|
||||
case SH3_DMAOR_ADDR: return sh4_handle_dmaor_addr_r(mem_mask)<<16;
|
||||
|
||||
|
||||
case INTEVT2:
|
||||
{
|
||||
// logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (INTEVT2)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return m_sh3internal_lower[offset];
|
||||
}
|
||||
|
||||
|
||||
case IRR0_IRR1:
|
||||
{
|
||||
{
|
||||
if (mem_mask & 0xff000000)
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (IRR0)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return m_sh3internal_lower[offset];
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ff00)
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (IRR1)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return m_sh3internal_lower[offset];
|
||||
}
|
||||
|
||||
fatalerror("'%s' (%08x): unmapped internal read from %08x mask %08x (IRR0/1 unused bits)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
}
|
||||
}
|
||||
|
||||
case PADR_PBDR:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
//logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PADR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
//return ReadPort(SH3_PORT_A)<<24;
|
||||
return ReadPort(SH3_PORT_A)<<24;
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
//logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PBDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return ReadPort(SH3_PORT_B)<<8;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case PCDR_PDDR:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
//logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PCDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return ReadPort(SH3_PORT_C)<<24;
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
//logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PDDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return ReadPort(SH3_PORT_D)<<8;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case PEDR_PFDR:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
//logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PEDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return ReadPort(SH3_PORT_E)<<24;
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
//logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PFDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return ReadPort(SH3_PORT_F)<<8;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case PGDR_PHDR:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
//logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PGDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return ReadPort(SH3_PORT_G)<<24;
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
//logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PHDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return ReadPort(SH3_PORT_H)<<8;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case PJDR_PKDR:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
//logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PJDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return ReadPort(SH3_PORT_J)<<24;
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
//logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PKDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return ReadPort(SH3_PORT_K)<<8;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case PLDR_SCPDR:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
//logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PLDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return ReadPort(SH3_PORT_L)<<24;
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (SCPDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
//return ReadPort(SH3_PORT_K)<<8;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
case SCSMR2_SCBRR2:
|
||||
{
|
||||
if (mem_mask & 0xff000000)
|
||||
{
|
||||
logerror("'%s' (%08x): SCIF internal read from %08x mask %08x (SCSMR2 - Serial Mode Register 2)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return m_sh3internal_lower[offset];
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ff00)
|
||||
{
|
||||
logerror("'%s' (%08x): SCIF internal read from %08x mask %08x (SCBRR2 - Bit Rate Register 2)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return m_sh3internal_lower[offset];
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case SCSCR2_SCFTDR2:
|
||||
{
|
||||
if (mem_mask & 0xff000000)
|
||||
{
|
||||
logerror("'%s' (%08x): SCIF internal read from %08x mask %08x (SCSCR2 - Serial Control Register 2)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return m_sh3internal_lower[offset];
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ff00)
|
||||
{
|
||||
logerror("'%s' (%08x): SCIF internal read from %08x mask %08x (SCFTDR2 - Transmit FIFO Data Register 2)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return m_sh3internal_lower[offset];
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case SCSSR2_SCFRDR2:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
logerror("'%s' (%08x): SCIF internal read from %08x mask %08x (SCSSR2 - Serial Status Register 2)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return m_sh3internal_lower[offset];
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ff00)
|
||||
{
|
||||
logerror("'%s' (%08x): SCIF internal read from %08x mask %08x (SCFRDR2 - Receive FIFO Data Register 2)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return m_sh3internal_lower[offset];
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case SCFCR2_SCFDR2:
|
||||
{
|
||||
if (mem_mask & 0xff000000)
|
||||
{
|
||||
logerror("'%s' (%08x): SCIF internal read from %08x mask %08x (SCFCR2 - Fifo Control Register 2)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return m_sh3internal_lower[offset];
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
logerror("'%s' (%08x): SCIF internal read from %08x mask %08x (SCFDR2 - Fifo Data Count Register 2)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask);
|
||||
return m_sh3internal_lower[offset];
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
default:
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal read from %08x mask %08x\n",
|
||||
tag(), m_pc & AM,
|
||||
(offset *4)+0x4000000,
|
||||
mem_mask);
|
||||
}
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal read from %08x mask %08x\n",
|
||||
tag(), m_pc & AM,
|
||||
(offset *4)+0x4000000,
|
||||
mem_mask);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Lower internal area */
|
||||
|
||||
static void sh3_internal_w(UINT32 offset, UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
if (offset<0x1000)
|
||||
{
|
||||
//UINT32 old = m_sh3internal_lower[offset];
|
||||
COMBINE_DATA(&m_sh3internal_lower[offset]);
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case SH3_SAR0_ADDR: sh4_handle_sar0_addr_w(data,mem_mask); break;
|
||||
case SH3_SAR1_ADDR: sh4_handle_sar1_addr_w(data,mem_mask); break;
|
||||
case SH3_SAR2_ADDR: sh4_handle_sar2_addr_w(data,mem_mask); break;
|
||||
case SH3_SAR3_ADDR: sh4_handle_sar3_addr_w(data,mem_mask); break;
|
||||
case SH3_DAR0_ADDR: sh4_handle_dar0_addr_w(data,mem_mask); break;
|
||||
case SH3_DAR1_ADDR: sh4_handle_dar1_addr_w(data,mem_mask); break;
|
||||
case SH3_DAR2_ADDR: sh4_handle_dar2_addr_w(data,mem_mask); break;
|
||||
case SH3_DAR3_ADDR: sh4_handle_dar3_addr_w(data,mem_mask); break;
|
||||
case SH3_DMATCR0_ADDR: sh4_handle_dmatcr0_addr_w(data,mem_mask); break;
|
||||
case SH3_DMATCR1_ADDR: sh4_handle_dmatcr1_addr_w(data,mem_mask); break;
|
||||
case SH3_DMATCR2_ADDR: sh4_handle_dmatcr2_addr_w(data,mem_mask); break;
|
||||
case SH3_DMATCR3_ADDR: sh4_handle_dmatcr3_addr_w(data,mem_mask); break;
|
||||
case SH3_CHCR0_ADDR: sh4_handle_chcr0_addr_w(data,mem_mask); break;
|
||||
case SH3_CHCR1_ADDR: sh4_handle_chcr1_addr_w(data,mem_mask); break;
|
||||
case SH3_CHCR2_ADDR: sh4_handle_chcr2_addr_w(data,mem_mask); break;
|
||||
case SH3_CHCR3_ADDR: sh4_handle_chcr3_addr_w(data,mem_mask); break;
|
||||
case SH3_DMAOR_ADDR: sh4_handle_dmaor_addr_w(data>>16,mem_mask>>16); break;
|
||||
|
||||
|
||||
case IRR0_IRR1:
|
||||
{
|
||||
{
|
||||
if (mem_mask & 0xff000000)
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (IRR0)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
// not sure if this is how we should clear lines in this core...
|
||||
if (!(data & 0x01000000)) execute_set_input(0, CLEAR_LINE);
|
||||
if (!(data & 0x02000000)) execute_set_input(1, CLEAR_LINE);
|
||||
if (!(data & 0x04000000)) execute_set_input(2, CLEAR_LINE);
|
||||
if (!(data & 0x08000000)) execute_set_input(3, CLEAR_LINE);
|
||||
|
||||
}
|
||||
if (mem_mask & 0x0000ff00)
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (IRR1)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
if (mem_mask & 0x00ff00ff)
|
||||
{
|
||||
fatalerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (IRR0/1 unused bits)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case PINTER_IPRC:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PINTER)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
data &= 0xffff; mem_mask &= 0xffff;
|
||||
COMBINE_DATA(&m_SH4_IPRC);
|
||||
logerror("'%s' (%08x): INTC internal write to %08x = %08x & %08x (IPRC)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
m_exception_priority[SH4_INTC_IRL0] = INTPRI((m_SH4_IPRC & 0x000f)>>0, SH4_INTC_IRL0);
|
||||
m_exception_priority[SH4_INTC_IRL1] = INTPRI((m_SH4_IPRC & 0x00f0)>>4, SH4_INTC_IRL1);
|
||||
m_exception_priority[SH4_INTC_IRL2] = INTPRI((m_SH4_IPRC & 0x0f00)>>8, SH4_INTC_IRL2);
|
||||
m_exception_priority[SH4_INTC_IRL3] = INTPRI((m_SH4_IPRC & 0xf000)>>12,SH4_INTC_IRL3);
|
||||
sh4_exception_recompute();
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case PCCR_PDCR:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PCCR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PDCR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case PECR_PFCR:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PECR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PFCR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
case PGCR_PHCR:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PGCR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PHCR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
case PJCR_PKCR:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PJCR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PKCR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
case PLCR_SCPCR:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PLCR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (SCPCR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case PADR_PBDR:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
WritePort(SH3_PORT_A, (data>>24)&0xff);
|
||||
// logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PADR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
WritePort(SH3_PORT_B, (data>>8)&0xff);
|
||||
// logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PBDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case PCDR_PDDR:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
WritePort(SH3_PORT_C, (data>>24)&0xff);
|
||||
// logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PADR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
WritePort(SH3_PORT_D, (data>>8)&0xff);
|
||||
// logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PBDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
}
|
||||
break;
|
||||
case PEDR_PFDR:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
WritePort(SH3_PORT_E, (data>>24)&0xff);
|
||||
// logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PEDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
WritePort(SH3_PORT_F, (data>>8)&0xff);
|
||||
// logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PFDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case PGDR_PHDR:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
WritePort(SH3_PORT_G, (data>>24)&0xff);
|
||||
// logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PGDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
WritePort(SH3_PORT_H, (data>>8)&0xff);
|
||||
// logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PHDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
case PJDR_PKDR:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
WritePort(SH3_PORT_J, (data>>24)&0xff);
|
||||
// logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PJDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
WritePort(SH3_PORT_K, (data>>8)&0xff);
|
||||
//logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PKDR)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case SCSMR2_SCBRR2:
|
||||
{
|
||||
if (mem_mask & 0xff000000)
|
||||
{
|
||||
logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCSMR2 - Serial Mode Register 2)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ff00)
|
||||
{
|
||||
logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCBRR2 - Bit Rate Register 2)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case SCSCR2_SCFTDR2:
|
||||
{
|
||||
if (mem_mask & 0xff000000)
|
||||
{
|
||||
logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCSCR2 - Serial Control Register 2)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ff00)
|
||||
{
|
||||
logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCFTDR2 - Transmit FIFO Data Register 2)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case SCSSR2_SCFRDR2:
|
||||
{
|
||||
if (mem_mask & 0xffff0000)
|
||||
{
|
||||
logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCSSR2 - Serial Status Register 2)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ff00)
|
||||
{
|
||||
logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCFRDR2 - Receive FIFO Data Register 2)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case SCFCR2_SCFDR2:
|
||||
{
|
||||
if (mem_mask & 0xff000000)
|
||||
{
|
||||
logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCFCR2 - Fifo Control Register 2)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
|
||||
if (mem_mask & 0x0000ffff)
|
||||
{
|
||||
logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCFDR2 - Fifo Data Count Register 2)\n",tag(), m_pc & AM,(offset *4)+0x4000000,data,mem_mask);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x\n",
|
||||
tag(), m_pc & AM,
|
||||
(offset *4)+0x4000000,
|
||||
data,
|
||||
mem_mask);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x\n",
|
||||
tag(), m_pc & AM,
|
||||
(offset *4)+0x4000000,
|
||||
data,
|
||||
mem_mask);
|
||||
}
|
||||
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,817 @@
|
|||
/*****************************************************************************
|
||||
*
|
||||
* sh4->h
|
||||
* Portable Hitachi SH-4 (SH7750 family) emulator interface
|
||||
*
|
||||
* By R. Belmont, based on sh2.c by Juergen Buchmueller, Mariusz Wojcieszek,
|
||||
* Olivier Galibert, Sylvain Glaize, and James Forshaw.
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef __SH4_H__
|
||||
#define __SH4_H__
|
||||
|
||||
|
||||
#define SH4_INT_NONE -1
|
||||
enum
|
||||
{
|
||||
SH4_IRL0=0, SH4_IRL1, SH4_IRL2, SH4_IRL3, SH4_IRLn
|
||||
};
|
||||
|
||||
enum
|
||||
{
|
||||
SH4_PC=1, SH4_SR, SH4_PR, SH4_GBR, SH4_VBR, SH4_DBR, SH4_MACH, SH4_MACL,
|
||||
SH4_R0, SH4_R1, SH4_R2, SH4_R3, SH4_R4, SH4_R5, SH4_R6, SH4_R7,
|
||||
SH4_R8, SH4_R9, SH4_R10, SH4_R11, SH4_R12, SH4_R13, SH4_R14, SH4_R15, SH4_EA,
|
||||
SH4_R0_BK0, SH4_R1_BK0, SH4_R2_BK0, SH4_R3_BK0, SH4_R4_BK0, SH4_R5_BK0, SH4_R6_BK0, SH4_R7_BK0,
|
||||
SH4_R0_BK1, SH4_R1_BK1, SH4_R2_BK1, SH4_R3_BK1, SH4_R4_BK1, SH4_R5_BK1, SH4_R6_BK1, SH4_R7_BK1,
|
||||
SH4_SPC, SH4_SSR, SH4_SGR, SH4_FPSCR, SH4_FPUL, SH4_FR0, SH4_FR1, SH4_FR2, SH4_FR3, SH4_FR4, SH4_FR5,
|
||||
SH4_FR6, SH4_FR7, SH4_FR8, SH4_FR9, SH4_FR10, SH4_FR11, SH4_FR12, SH4_FR13, SH4_FR14, SH4_FR15,
|
||||
SH4_XF0, SH4_XF1, SH4_XF2, SH4_XF3, SH4_XF4, SH4_XF5, SH4_XF6, SH4_XF7,
|
||||
SH4_XF8, SH4_XF9, SH4_XF10, SH4_XF11, SH4_XF12, SH4_XF13, SH4_XF14, SH4_XF15
|
||||
};
|
||||
|
||||
enum
|
||||
{
|
||||
SH4_INTC_NMI=23,
|
||||
SH4_INTC_IRLn0,
|
||||
SH4_INTC_IRLn1,
|
||||
SH4_INTC_IRLn2,
|
||||
SH4_INTC_IRLn3,
|
||||
SH4_INTC_IRLn4,
|
||||
SH4_INTC_IRLn5,
|
||||
SH4_INTC_IRLn6,
|
||||
SH4_INTC_IRLn7,
|
||||
SH4_INTC_IRLn8,
|
||||
SH4_INTC_IRLn9,
|
||||
SH4_INTC_IRLnA,
|
||||
SH4_INTC_IRLnB,
|
||||
SH4_INTC_IRLnC,
|
||||
SH4_INTC_IRLnD,
|
||||
SH4_INTC_IRLnE,
|
||||
|
||||
SH4_INTC_IRL0,
|
||||
SH4_INTC_IRL1,
|
||||
SH4_INTC_IRL2,
|
||||
SH4_INTC_IRL3,
|
||||
|
||||
SH4_INTC_HUDI,
|
||||
SH4_INTC_GPOI,
|
||||
|
||||
SH4_INTC_DMTE0,
|
||||
SH4_INTC_DMTE1,
|
||||
SH4_INTC_DMTE2,
|
||||
SH4_INTC_DMTE3,
|
||||
SH4_INTC_DMTE4,
|
||||
SH4_INTC_DMTE5,
|
||||
SH4_INTC_DMTE6,
|
||||
SH4_INTC_DMTE7,
|
||||
|
||||
SH4_INTC_DMAE,
|
||||
|
||||
SH4_INTC_TUNI3,
|
||||
SH4_INTC_TUNI4,
|
||||
SH4_INTC_TUNI0,
|
||||
SH4_INTC_TUNI1,
|
||||
SH4_INTC_TUNI2,
|
||||
SH4_INTC_TICPI2,
|
||||
SH4_INTC_ATI,
|
||||
SH4_INTC_PRI,
|
||||
SH4_INTC_CUI,
|
||||
SH4_INTC_SCI1ERI,
|
||||
SH4_INTC_SCI1RXI,
|
||||
|
||||
SH4_INTC_SCI1TXI,
|
||||
SH4_INTC_SCI1TEI,
|
||||
SH4_INTC_SCIFERI,
|
||||
SH4_INTC_SCIFRXI,
|
||||
SH4_INTC_SCIFBRI,
|
||||
SH4_INTC_SCIFTXI,
|
||||
SH4_INTC_ITI,
|
||||
SH4_INTC_RCMI,
|
||||
SH4_INTC_ROVI
|
||||
};
|
||||
|
||||
#define SH4_FPU_PZERO 0
|
||||
#define SH4_FPU_NZERO 1
|
||||
#define SH4_FPU_DENORM 2
|
||||
#define SH4_FPU_NORM 3
|
||||
#define SH4_FPU_PINF 4
|
||||
#define SH4_FPU_NINF 5
|
||||
#define SH4_FPU_qNaN 6
|
||||
#define SH4_FPU_sNaN 7
|
||||
|
||||
enum
|
||||
{
|
||||
SH4_IOPORT_16=8*0,
|
||||
SH4_IOPORT_4=8*1,
|
||||
SH4_IOPORT_DMA=8*2,
|
||||
// future use
|
||||
SH4_IOPORT_SCI=8*3,
|
||||
SH4_IOPORT_SCIF=8*4
|
||||
};
|
||||
|
||||
struct sh4_device_dma
|
||||
{
|
||||
UINT32 length;
|
||||
UINT32 size;
|
||||
void *buffer;
|
||||
int channel;
|
||||
};
|
||||
|
||||
struct sh4_ddt_dma
|
||||
{
|
||||
UINT32 source;
|
||||
UINT32 length;
|
||||
UINT32 size;
|
||||
UINT32 destination;
|
||||
void *buffer;
|
||||
int direction;
|
||||
int channel;
|
||||
int mode;
|
||||
};
|
||||
|
||||
typedef void (*sh4_ftcsr_callback)(UINT32);
|
||||
|
||||
static UINT32 sh3_internal_r(UINT32 offset, UINT32 mem_mask);
|
||||
static void sh3_internal_w(UINT32 offset, UINT32 data, UINT32 mem_mask);
|
||||
static UINT32 sh3_internal_high_r(UINT32 offset, UINT32 mem_mask);
|
||||
static void sh3_internal_high_w(UINT32 offset, UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_timer_callback(int param);
|
||||
static void sh4_parse_configuration();
|
||||
static void sh4_default_exception_priorities();
|
||||
|
||||
|
||||
|
||||
static void sh4_handle_tocr_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_tcnt0_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_tcnt1_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_tcnt2_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_tcor0_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_tcor1_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_tcor2_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_tcr0_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_tcr1_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_tcr2_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_tstr_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_tocr_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_tcpr2_addr_r(UINT32 mem_mask);
|
||||
static void sh4_handle_tstr_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_tcr0_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_tcr1_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_tcr2_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_tcor0_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_tcor1_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_tcor2_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_tcnt0_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_tcnt1_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_tcnt2_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_tocr_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_tcpr2_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
#define MCFG_SH4_MD0(_md0) \
|
||||
sh34_base_device::set_md0(*device, _md0);
|
||||
|
||||
#define MCFG_SH4_MD1(_md1) \
|
||||
sh34_base_device::set_md1(*device, _md1);
|
||||
|
||||
#define MCFG_SH4_MD2(_md2) \
|
||||
sh34_base_device::set_md2(*device, _md2);
|
||||
|
||||
#define MCFG_SH4_MD3(_md3) \
|
||||
sh34_base_device::set_md3(*device, _md3);
|
||||
|
||||
#define MCFG_SH4_MD4(_md4) \
|
||||
sh34_base_device::set_md4(*device, _md4);
|
||||
|
||||
#define MCFG_SH4_MD5(_md5) \
|
||||
sh34_base_device::set_md5(*device, _md5);
|
||||
|
||||
#define MCFG_SH4_MD6(_md6) \
|
||||
sh34_base_device::set_md6(*device, _md6);
|
||||
|
||||
#define MCFG_SH4_MD7(_md7) \
|
||||
sh34_base_device::set_md7(*device, _md7);
|
||||
|
||||
#define MCFG_SH4_MD8(_md8) \
|
||||
sh34_base_device::set_md8(*device, _md8);
|
||||
|
||||
#define MCFG_SH4_CLOCK(_clock) \
|
||||
sh34_base_device::set_sh4_clock(*device, _clock);
|
||||
|
||||
|
||||
class sh34_base_device : public cpu_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
sh34_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, endianness_t endianness, address_map_constructor internal);
|
||||
|
||||
static void set_md0(device_t &device, int md0) { downcast<sh34_base_device &>(device).c_md0 = md0; }
|
||||
static void set_md1(device_t &device, int md0) { downcast<sh34_base_device &>(device).c_md1 = md0; }
|
||||
static void set_md2(device_t &device, int md0) { downcast<sh34_base_device &>(device).c_md2 = md0; }
|
||||
static void set_md3(device_t &device, int md0) { downcast<sh34_base_device &>(device).c_md3 = md0; }
|
||||
static void set_md4(device_t &device, int md0) { downcast<sh34_base_device &>(device).c_md4 = md0; }
|
||||
static void set_md5(device_t &device, int md0) { downcast<sh34_base_device &>(device).c_md5 = md0; }
|
||||
static void set_md6(device_t &device, int md0) { downcast<sh34_base_device &>(device).c_md6 = md0; }
|
||||
static void set_md7(device_t &device, int md0) { downcast<sh34_base_device &>(device).c_md7 = md0; }
|
||||
static void set_md8(device_t &device, int md0) { downcast<sh34_base_device &>(device).c_md8 = md0; }
|
||||
static void set_sh4_clock(device_t &device, int clock) { downcast<sh34_base_device &>(device).c_clock = clock; }
|
||||
|
||||
TIMER_CALLBACK_MEMBER( sh4_refresh_timer_callback );
|
||||
TIMER_CALLBACK_MEMBER( sh4_rtc_timer_callback );
|
||||
TIMER_CALLBACK_MEMBER( sh4_timer_callback );
|
||||
TIMER_CALLBACK_MEMBER( sh4_dmac_callback );
|
||||
|
||||
void sh4_set_frt_input(int state);
|
||||
void sh4_set_irln_input(int value);
|
||||
void sh4_set_ftcsr_callback(sh4_ftcsr_callback callback);
|
||||
int sh4_dma_data(struct sh4_device_dma *s);
|
||||
void sh4_dma_ddt(struct sh4_ddt_dma *s);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
|
||||
// device_execute_interface overrides
|
||||
virtual UINT32 execute_min_cycles() const { return 1; }
|
||||
virtual UINT32 execute_max_cycles() const { return 4; }
|
||||
virtual UINT32 execute_input_lines() const { return 5; }
|
||||
virtual void execute_run();
|
||||
virtual void execute_set_input(int inputnum, int state);
|
||||
|
||||
// device_memory_interface overrides
|
||||
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ((spacenum == AS_IO) ? &m_io_config : NULL); }
|
||||
|
||||
// device_state_interface overrides
|
||||
virtual void state_import(const device_state_entry &entry);
|
||||
virtual void state_export(const device_state_entry &entry);
|
||||
virtual void state_string_export(const device_state_entry &entry, astring &string);
|
||||
|
||||
// device_disasm_interface overrides
|
||||
virtual UINT32 disasm_min_opcode_bytes() const { return 2; }
|
||||
virtual UINT32 disasm_max_opcode_bytes() const { return 2; }
|
||||
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
|
||||
|
||||
protected:
|
||||
address_space_config m_program_config;
|
||||
address_space_config m_io_config;
|
||||
|
||||
int c_md2;
|
||||
int c_md1;
|
||||
int c_md0;
|
||||
int c_md6;
|
||||
int c_md4;
|
||||
int c_md3;
|
||||
int c_md5;
|
||||
int c_md7;
|
||||
int c_md8;
|
||||
int c_clock;
|
||||
|
||||
UINT32 m_ppc;
|
||||
UINT32 m_pc;
|
||||
UINT32 m_spc;
|
||||
UINT32 m_pr;
|
||||
UINT32 m_sr;
|
||||
UINT32 m_ssr;
|
||||
UINT32 m_gbr;
|
||||
UINT32 m_vbr;
|
||||
UINT32 m_mach;
|
||||
UINT32 m_macl;
|
||||
UINT32 m_r[16];
|
||||
UINT32 m_rbnk[2][8];
|
||||
UINT32 m_sgr;
|
||||
UINT32 m_fr[16];
|
||||
UINT32 m_xf[16];
|
||||
UINT32 m_ea;
|
||||
UINT32 m_delay;
|
||||
UINT32 m_cpu_off;
|
||||
UINT32 m_pending_irq;
|
||||
UINT32 m_test_irq;
|
||||
UINT32 m_fpscr;
|
||||
UINT32 m_fpul;
|
||||
UINT32 m_dbr;
|
||||
|
||||
UINT32 m_exception_priority[128];
|
||||
int m_exception_requesting[128];
|
||||
|
||||
INT8 m_irq_line_state[17];
|
||||
address_space *m_internal;
|
||||
address_space *m_program;
|
||||
direct_read_data *m_direct;
|
||||
address_space *m_io;
|
||||
|
||||
// sh4 internal
|
||||
UINT32 m_m[16384];
|
||||
|
||||
// timer regs handled manually for reuse
|
||||
UINT32 m_SH4_TSTR;
|
||||
UINT32 m_SH4_TCNT0;
|
||||
UINT32 m_SH4_TCNT1;
|
||||
UINT32 m_SH4_TCNT2;
|
||||
UINT32 m_SH4_TCR0;
|
||||
UINT32 m_SH4_TCR1;
|
||||
UINT32 m_SH4_TCR2;
|
||||
UINT32 m_SH4_TCOR0;
|
||||
UINT32 m_SH4_TCOR1;
|
||||
UINT32 m_SH4_TCOR2;
|
||||
UINT32 m_SH4_TOCR;
|
||||
UINT32 m_SH4_TCPR2;
|
||||
|
||||
// INTC regs
|
||||
UINT32 m_SH4_IPRA;
|
||||
|
||||
UINT32 m_SH4_IPRC;
|
||||
|
||||
// DMAC regs
|
||||
UINT32 m_SH4_SAR0;
|
||||
UINT32 m_SH4_SAR1;
|
||||
UINT32 m_SH4_SAR2;
|
||||
UINT32 m_SH4_SAR3;
|
||||
|
||||
UINT32 m_SH4_DAR0;
|
||||
UINT32 m_SH4_DAR1;
|
||||
UINT32 m_SH4_DAR2;
|
||||
UINT32 m_SH4_DAR3;
|
||||
|
||||
UINT32 m_SH4_CHCR0;
|
||||
UINT32 m_SH4_CHCR1;
|
||||
UINT32 m_SH4_CHCR2;
|
||||
UINT32 m_SH4_CHCR3;
|
||||
|
||||
UINT32 m_SH4_DMATCR0;
|
||||
UINT32 m_SH4_DMATCR1;
|
||||
UINT32 m_SH4_DMATCR2;
|
||||
UINT32 m_SH4_DMATCR3;
|
||||
|
||||
UINT32 m_SH4_DMAOR;
|
||||
|
||||
INT8 m_nmi_line_state;
|
||||
|
||||
UINT8 m_sleep_mode;
|
||||
|
||||
int m_frt_input;
|
||||
int m_irln;
|
||||
int m_internal_irq_level;
|
||||
int m_internal_irq_vector;
|
||||
|
||||
emu_timer *m_dma_timer[4];
|
||||
emu_timer *m_refresh_timer;
|
||||
emu_timer *m_rtc_timer;
|
||||
emu_timer *m_timer[3];
|
||||
UINT32 m_refresh_timer_base;
|
||||
int m_dma_timer_active[4];
|
||||
UINT32 m_dma_source[4];
|
||||
UINT32 m_dma_destination[4];
|
||||
UINT32 m_dma_count[4];
|
||||
int m_dma_wordsize[4];
|
||||
int m_dma_source_increment[4];
|
||||
int m_dma_destination_increment[4];
|
||||
int m_dma_mode[4];
|
||||
|
||||
int m_sh4_icount;
|
||||
int m_is_slave;
|
||||
int m_cpu_clock;
|
||||
int m_bus_clock;
|
||||
int m_pm_clock;
|
||||
int m_fpu_sz;
|
||||
int m_fpu_pr;
|
||||
int m_ioport16_pullup;
|
||||
int m_ioport16_direction;
|
||||
int m_ioport4_pullup;
|
||||
int m_ioport4_direction;
|
||||
|
||||
void (*m_ftcsr_read_callback)(UINT32 data);
|
||||
|
||||
/* This MMU simulation is good for the simple remap used on Naomi GD-ROM SQ access *ONLY* */
|
||||
UINT32 m_sh4_tlb_address[64];
|
||||
UINT32 m_sh4_tlb_data[64];
|
||||
UINT8 m_sh4_mmu_enabled;
|
||||
|
||||
int m_cpu_type;
|
||||
|
||||
// sh3 internal
|
||||
UINT32 m_sh3internal_upper[0x3000/4];
|
||||
UINT32 m_sh3internal_lower[0x1000];
|
||||
|
||||
UINT64 m_debugger_temp;
|
||||
|
||||
|
||||
void execute_one_0000(const UINT16 opcode);
|
||||
void execute_one_4000(const UINT16 opcode);
|
||||
void execute_one(const UINT16 opcode);
|
||||
inline void sh4_check_pending_irq(const char *message) // look for highest priority active exception and handle it
|
||||
{
|
||||
int a,irq,z;
|
||||
|
||||
irq = 0;
|
||||
z = -1;
|
||||
for (a=0;a <= SH4_INTC_ROVI;a++)
|
||||
{
|
||||
if (m_exception_requesting[a])
|
||||
{
|
||||
if ((int)m_exception_priority[a] > z)
|
||||
{
|
||||
z = m_exception_priority[a];
|
||||
irq = a;
|
||||
}
|
||||
}
|
||||
}
|
||||
if (z >= 0)
|
||||
{
|
||||
sh4_exception(message, irq);
|
||||
}
|
||||
}
|
||||
|
||||
void TODO(const UINT16 opcode);
|
||||
void WB(offs_t A, UINT8 V);
|
||||
void WW(offs_t A, UINT16 V);
|
||||
void WL(offs_t A, UINT32 V);
|
||||
void ADD(const UINT16 opcode);
|
||||
void ADDI(const UINT16 opcode);
|
||||
void ADDC(const UINT16 opcode);
|
||||
void ADDV(const UINT16 opcode);
|
||||
void AND(const UINT16 opcode);
|
||||
void ANDI(const UINT16 opcode);
|
||||
void ANDM(const UINT16 opcode);
|
||||
void BF(const UINT16 opcode);
|
||||
void BFS(const UINT16 opcode);
|
||||
void BRA(const UINT16 opcode);
|
||||
void BRAF(const UINT16 opcode);
|
||||
void BSR(const UINT16 opcode);
|
||||
void BSRF(const UINT16 opcode);
|
||||
void BT(const UINT16 opcode);
|
||||
void BTS(const UINT16 opcode);
|
||||
void CLRMAC(const UINT16 opcode);
|
||||
void CLRT(const UINT16 opcode);
|
||||
void CMPEQ(const UINT16 opcode);
|
||||
void CMPGE(const UINT16 opcode);
|
||||
void CMPGT(const UINT16 opcode);
|
||||
void CMPHI(const UINT16 opcode);
|
||||
void CMPHS(const UINT16 opcode);
|
||||
void CMPPL(const UINT16 opcode);
|
||||
void CMPPZ(const UINT16 opcode);
|
||||
void CMPSTR(const UINT16 opcode);
|
||||
void CMPIM(const UINT16 opcode);
|
||||
void DIV0S(const UINT16 opcode);
|
||||
void DIV0U(const UINT16 opcode);
|
||||
void DIV1(const UINT16 opcode);
|
||||
void DMULS(const UINT16 opcode);
|
||||
void DMULU(const UINT16 opcode);
|
||||
void DT(const UINT16 opcode);
|
||||
void EXTSB(const UINT16 opcode);
|
||||
void EXTSW(const UINT16 opcode);
|
||||
void EXTUB(const UINT16 opcode);
|
||||
void EXTUW(const UINT16 opcode);
|
||||
void JMP(const UINT16 opcode);
|
||||
void JSR(const UINT16 opcode);
|
||||
void LDCSR(const UINT16 opcode);
|
||||
void LDCGBR(const UINT16 opcode);
|
||||
void LDCVBR(const UINT16 opcode);
|
||||
void LDCMSR(const UINT16 opcode);
|
||||
void LDCMGBR(const UINT16 opcode);
|
||||
void LDCMVBR(const UINT16 opcode);
|
||||
void LDSMACH(const UINT16 opcode);
|
||||
void LDSMACL(const UINT16 opcode);
|
||||
void LDSPR(const UINT16 opcode);
|
||||
void LDSMMACH(const UINT16 opcode);
|
||||
void LDSMMACL(const UINT16 opcode);
|
||||
void LDSMPR(const UINT16 opcode);
|
||||
void MAC_L(const UINT16 opcode);
|
||||
void MAC_W(const UINT16 opcode);
|
||||
void MOV(const UINT16 opcode);
|
||||
void MOVBS(const UINT16 opcode);
|
||||
void MOVWS(const UINT16 opcode);
|
||||
void MOVLS(const UINT16 opcode);
|
||||
void MOVBL(const UINT16 opcode);
|
||||
void MOVWL(const UINT16 opcode);
|
||||
void MOVLL(const UINT16 opcode);
|
||||
void MOVBM(const UINT16 opcode);
|
||||
void MOVWM(const UINT16 opcode);
|
||||
void MOVLM(const UINT16 opcode);
|
||||
void MOVBP(const UINT16 opcode);
|
||||
void MOVWP(const UINT16 opcode);
|
||||
void MOVLP(const UINT16 opcode);
|
||||
void MOVBS0(const UINT16 opcode);
|
||||
void MOVWS0(const UINT16 opcode);
|
||||
void MOVLS0(const UINT16 opcode);
|
||||
void MOVBL0(const UINT16 opcode);
|
||||
void MOVWL0(const UINT16 opcode);
|
||||
void MOVLL0(const UINT16 opcode);
|
||||
void MOVI(const UINT16 opcode);
|
||||
void MOVWI(const UINT16 opcode);
|
||||
void MOVLI(const UINT16 opcode);
|
||||
void MOVBLG(const UINT16 opcode);
|
||||
void MOVWLG(const UINT16 opcode);
|
||||
void MOVLLG(const UINT16 opcode);
|
||||
void MOVBSG(const UINT16 opcode);
|
||||
void MOVWSG(const UINT16 opcode);
|
||||
void MOVLSG(const UINT16 opcode);
|
||||
void MOVBS4(const UINT16 opcode);
|
||||
void MOVWS4(const UINT16 opcode);
|
||||
void MOVLS4(const UINT16 opcode);
|
||||
void MOVBL4(const UINT16 opcode);
|
||||
void MOVWL4(const UINT16 opcode);
|
||||
void MOVLL4(const UINT16 opcode);
|
||||
void MOVA(const UINT16 opcode);
|
||||
void MOVT(const UINT16 opcode);
|
||||
void MULL(const UINT16 opcode);
|
||||
void MULS(const UINT16 opcode);
|
||||
void MULU(const UINT16 opcode);
|
||||
void NEG(const UINT16 opcode);
|
||||
void NEGC(const UINT16 opcode);
|
||||
void NOP(const UINT16 opcode);
|
||||
void NOT(const UINT16 opcode);
|
||||
void OR(const UINT16 opcode);
|
||||
void ORI(const UINT16 opcode);
|
||||
void ORM(const UINT16 opcode);
|
||||
void ROTCL(const UINT16 opcode);
|
||||
void ROTCR(const UINT16 opcode);
|
||||
void ROTL(const UINT16 opcode);
|
||||
void ROTR(const UINT16 opcode);
|
||||
void RTE(const UINT16 opcode);
|
||||
void RTS(const UINT16 opcode);
|
||||
void SETT(const UINT16 opcode);
|
||||
void SHAL(const UINT16 opcode);
|
||||
void SHAR(const UINT16 opcode);
|
||||
void SHLL(const UINT16 opcode);
|
||||
void SHLL2(const UINT16 opcode);
|
||||
void SHLL8(const UINT16 opcode);
|
||||
void SHLL16(const UINT16 opcode);
|
||||
void SHLR(const UINT16 opcode);
|
||||
void SHLR2(const UINT16 opcode);
|
||||
void SHLR8(const UINT16 opcode);
|
||||
void SHLR16(const UINT16 opcode);
|
||||
void SLEEP(const UINT16 opcode);
|
||||
void STCSR(const UINT16 opcode);
|
||||
void STCGBR(const UINT16 opcode);
|
||||
void STCVBR(const UINT16 opcode);
|
||||
void STCMSR(const UINT16 opcode);
|
||||
void STCMGBR(const UINT16 opcode);
|
||||
void STCMVBR(const UINT16 opcode);
|
||||
void STSMACH(const UINT16 opcode);
|
||||
void STSMACL(const UINT16 opcode);
|
||||
void STSPR(const UINT16 opcode);
|
||||
void STSMMACH(const UINT16 opcode);
|
||||
void STSMMACL(const UINT16 opcode);
|
||||
void STSMPR(const UINT16 opcode);
|
||||
void SUB(const UINT16 opcode);
|
||||
void SUBC(const UINT16 opcode);
|
||||
void SUBV(const UINT16 opcode);
|
||||
void SWAPB(const UINT16 opcode);
|
||||
void SWAPW(const UINT16 opcode);
|
||||
void TAS(const UINT16 opcode);
|
||||
void TRAPA(const UINT16 opcode);
|
||||
void TST(const UINT16 opcode);
|
||||
void TSTI(const UINT16 opcode);
|
||||
void TSTM(const UINT16 opcode);
|
||||
void XOR(const UINT16 opcode);
|
||||
void XORI(const UINT16 opcode);
|
||||
void XORM(const UINT16 opcode);
|
||||
void XTRCT(const UINT16 opcode);
|
||||
void STCSSR(const UINT16 opcode);
|
||||
void STCSPC(const UINT16 opcode);
|
||||
void STCSGR(const UINT16 opcode);
|
||||
void STSFPUL(const UINT16 opcode);
|
||||
void STSFPSCR(const UINT16 opcode);
|
||||
void STCDBR(const UINT16 opcode);
|
||||
void STCRBANK(const UINT16 opcode);
|
||||
void STCMRBANK(const UINT16 opcode);
|
||||
void MOVCAL(const UINT16 opcode);
|
||||
void CLRS(const UINT16 opcode);
|
||||
void SETS(const UINT16 opcode);
|
||||
void STCMSGR(const UINT16 opcode);
|
||||
void STSMFPUL(const UINT16 opcode);
|
||||
void STSMFPSCR(const UINT16 opcode);
|
||||
void STCMDBR(const UINT16 opcode);
|
||||
void STCMSSR(const UINT16 opcode);
|
||||
void STCMSPC(const UINT16 opcode);
|
||||
void LDSMFPUL(const UINT16 opcode);
|
||||
void LDSMFPSCR(const UINT16 opcode);
|
||||
void LDCMDBR(const UINT16 opcode);
|
||||
void LDCMRBANK(const UINT16 opcode);
|
||||
void LDCMSSR(const UINT16 opcode);
|
||||
void LDCMSPC(const UINT16 opcode);
|
||||
void LDSFPUL(const UINT16 opcode);
|
||||
void LDSFPSCR(const UINT16 opcode);
|
||||
void LDCDBR(const UINT16 opcode);
|
||||
void SHAD(const UINT16 opcode);
|
||||
void SHLD(const UINT16 opcode);
|
||||
void LDCRBANK(const UINT16 opcode);
|
||||
void LDCSSR(const UINT16 opcode);
|
||||
void LDCSPC(const UINT16 opcode);
|
||||
void PREFM(const UINT16 opcode);
|
||||
void FMOVMRIFR(const UINT16 opcode);
|
||||
void FMOVFRMR(const UINT16 opcode);
|
||||
void FMOVFRMDR(const UINT16 opcode);
|
||||
void FMOVFRS0(const UINT16 opcode);
|
||||
void FMOVS0FR(const UINT16 opcode);
|
||||
void FMOVMRFR(const UINT16 opcode);
|
||||
void FMOVFR(const UINT16 opcode);
|
||||
void FLDI1(const UINT16 opcode);
|
||||
void FLDI0(const UINT16 opcode);
|
||||
void FLDS(const UINT16 opcode);
|
||||
void FSTS(const UINT16 opcode);
|
||||
void FRCHG();
|
||||
void FSCHG();
|
||||
void FTRC(const UINT16 opcode);
|
||||
void FLOAT(const UINT16 opcode);
|
||||
void FNEG(const UINT16 opcode);
|
||||
void FABS(const UINT16 opcode);
|
||||
void FCMP_EQ(const UINT16 opcode);
|
||||
void FCMP_GT(const UINT16 opcode);
|
||||
void FCNVDS(const UINT16 opcode);
|
||||
void FCNVSD(const UINT16 opcode);
|
||||
void FADD(const UINT16 opcode);
|
||||
void FSUB(const UINT16 opcode);
|
||||
void FMUL(const UINT16 opcode);
|
||||
void FDIV(const UINT16 opcode);
|
||||
void FMAC(const UINT16 opcode);
|
||||
void FSQRT(const UINT16 opcode);
|
||||
void FSRRA(const UINT16 opcode);
|
||||
void FSSCA(const UINT16 opcode);
|
||||
void FIPR(const UINT16 opcode);
|
||||
void FTRV(const UINT16 opcode);
|
||||
void op1111_0xf13(const UINT16 opcode);
|
||||
void dbreak(const UINT16 opcode);
|
||||
void op1111_0x13(UINT16 opcode);
|
||||
UINT8 RB(offs_t A);
|
||||
UINT16 RW(offs_t A);
|
||||
UINT32 RL(offs_t A);
|
||||
void sh4_change_register_bank(int to);
|
||||
void sh4_swap_fp_registers();
|
||||
void sh4_swap_fp_couples();
|
||||
void sh4_syncronize_register_bank(int to);
|
||||
void sh4_default_exception_priorities();
|
||||
void sh4_exception_recompute();
|
||||
void sh4_exception_request(int exception);
|
||||
void sh4_exception_unrequest(int exception);
|
||||
void sh4_exception_checkunrequest(int exception);
|
||||
void sh4_exception(const char *message, int exception);
|
||||
UINT32 compute_ticks_refresh_timer(emu_timer *timer, int hertz, int base, int divisor);
|
||||
void sh4_refresh_timer_recompute();
|
||||
void increment_rtc_time(int mode);
|
||||
void sh4_dmac_nmi();
|
||||
void sh4_handler_ipra_w(UINT32 data, UINT32 mem_mask);
|
||||
UINT32 sh4_getsqremap(UINT32 address);
|
||||
void sh4_parse_configuration();
|
||||
void sh4_timer_recompute(int which);
|
||||
UINT32 sh4_handle_tcnt0_addr_r(UINT32 mem_mask);
|
||||
UINT32 sh4_handle_tcnt1_addr_r(UINT32 mem_mask);
|
||||
UINT32 sh4_handle_tcnt2_addr_r(UINT32 mem_mask);
|
||||
UINT32 sh4_handle_tcor0_addr_r(UINT32 mem_mask);
|
||||
UINT32 sh4_handle_tcor1_addr_r(UINT32 mem_mask);
|
||||
UINT32 sh4_handle_tcor2_addr_r(UINT32 mem_mask);
|
||||
UINT32 sh4_handle_tcr0_addr_r(UINT32 mem_mask);
|
||||
UINT32 sh4_handle_tcr1_addr_r(UINT32 mem_mask);
|
||||
UINT32 sh4_handle_tcr2_addr_r(UINT32 mem_mask);
|
||||
UINT32 sh4_handle_tstr_addr_r(UINT32 mem_mask);
|
||||
UINT32 sh4_handle_tocr_addr_r(UINT32 mem_mask);
|
||||
UINT32 sh4_handle_tcpr2_addr_r(UINT32 mem_mask);
|
||||
void sh4_handle_tstr_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_tcr0_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_tcr1_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_tcr2_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_tcor0_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_tcor1_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_tcor2_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_tcnt0_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_tcnt1_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_tcnt2_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_tocr_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_tcpr2_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
int sh4_dma_transfer(int channel, int timermode, UINT32 chcr, UINT32 *sar, UINT32 *dar, UINT32 *dmatcr);
|
||||
int sh4_dma_transfer_device(int channel, UINT32 chcr, UINT32 *sar, UINT32 *dar, UINT32 *dmatcr);
|
||||
void sh4_dmac_check(int channel);
|
||||
void sh4_handle_sar0_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_sar1_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_sar2_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_sar3_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_dar0_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_dar1_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_dar2_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_dar3_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_dmatcr0_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_dmatcr1_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_dmatcr2_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_dmatcr3_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_chcr0_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_chcr1_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_chcr2_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_chcr3_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
void sh4_handle_dmaor_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
UINT32 sh4_handle_sar0_addr_r(UINT32 mem_mask) { return m_SH4_SAR0; }
|
||||
UINT32 sh4_handle_sar1_addr_r(UINT32 mem_mask) { return m_SH4_SAR1; }
|
||||
UINT32 sh4_handle_sar2_addr_r(UINT32 mem_mask) { return m_SH4_SAR2; }
|
||||
UINT32 sh4_handle_sar3_addr_r(UINT32 mem_mask) { return m_SH4_SAR3; }
|
||||
UINT32 sh4_handle_dar0_addr_r(UINT32 mem_mask) { return m_SH4_DAR0; }
|
||||
UINT32 sh4_handle_dar1_addr_r(UINT32 mem_mask) { return m_SH4_DAR1; }
|
||||
UINT32 sh4_handle_dar2_addr_r(UINT32 mem_mask) { return m_SH4_DAR2; }
|
||||
UINT32 sh4_handle_dar3_addr_r(UINT32 mem_mask) { return m_SH4_DAR3; }
|
||||
UINT32 sh4_handle_dmatcr0_addr_r(UINT32 mem_mask) { return m_SH4_DMATCR0; }
|
||||
UINT32 sh4_handle_dmatcr1_addr_r(UINT32 mem_mask) { return m_SH4_DMATCR1; }
|
||||
UINT32 sh4_handle_dmatcr2_addr_r(UINT32 mem_mask) { return m_SH4_DMATCR2; }
|
||||
UINT32 sh4_handle_dmatcr3_addr_r(UINT32 mem_mask) { return m_SH4_DMATCR3; }
|
||||
UINT32 sh4_handle_chcr0_addr_r(UINT32 mem_mask) { return m_SH4_CHCR0; }
|
||||
UINT32 sh4_handle_chcr1_addr_r(UINT32 mem_mask) { return m_SH4_CHCR1; }
|
||||
UINT32 sh4_handle_chcr2_addr_r(UINT32 mem_mask) { return m_SH4_CHCR2; }
|
||||
UINT32 sh4_handle_chcr3_addr_r(UINT32 mem_mask) { return m_SH4_CHCR3; }
|
||||
UINT32 sh4_handle_dmaor_addr_r(UINT32 mem_mask) { return m_SH4_DMAOR; }
|
||||
|
||||
};
|
||||
|
||||
|
||||
class sh3_base_device : public sh34_base_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
sh3_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, endianness_t endianness);
|
||||
|
||||
DECLARE_WRITE32_MEMBER( sh3_internal_w );
|
||||
DECLARE_READ32_MEMBER( sh3_internal_r );
|
||||
|
||||
DECLARE_WRITE32_MEMBER( sh3_internal_high_w );
|
||||
DECLARE_READ32_MEMBER( sh3_internal_high_r );
|
||||
|
||||
protected:
|
||||
virtual void device_reset();
|
||||
};
|
||||
|
||||
|
||||
class sh4_base_device : public sh34_base_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
sh4_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, endianness_t endianness);
|
||||
|
||||
DECLARE_WRITE32_MEMBER( sh4_internal_w );
|
||||
DECLARE_READ32_MEMBER( sh4_internal_r );
|
||||
|
||||
DECLARE_READ64_MEMBER( sh4_tlb_r );
|
||||
DECLARE_WRITE64_MEMBER( sh4_tlb_w );
|
||||
|
||||
protected:
|
||||
virtual void device_reset();
|
||||
};
|
||||
|
||||
|
||||
class sh3_device : public sh3_base_device
|
||||
{
|
||||
public:
|
||||
sh3_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
};
|
||||
|
||||
|
||||
class sh3be_device : public sh3_base_device
|
||||
{
|
||||
public:
|
||||
sh3be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
virtual void execute_run();
|
||||
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
|
||||
};
|
||||
|
||||
|
||||
class sh4_device : public sh4_base_device
|
||||
{
|
||||
public:
|
||||
sh4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
};
|
||||
|
||||
|
||||
class sh4be_device : public sh4_base_device
|
||||
{
|
||||
public:
|
||||
sh4be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
virtual void execute_run();
|
||||
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
|
||||
};
|
||||
|
||||
|
||||
extern const device_type SH3LE;
|
||||
extern const device_type SH3BE;
|
||||
extern const device_type SH4LE;
|
||||
extern const device_type SH4BE;
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
COMPILER-SPECIFIC OPTIONS
|
||||
***************************************************************************/
|
||||
|
||||
#define SH4DRC_STRICT_VERIFY 0x0001 /* verify all instructions */
|
||||
#define SH4DRC_FLUSH_PC 0x0002 /* flush the PC value before each memory access */
|
||||
#define SH4DRC_STRICT_PCREL 0x0004 /* do actual loads on MOVLI/MOVWI instead of collapsing to immediates */
|
||||
|
||||
#define SH4DRC_COMPATIBLE_OPTIONS (SH4DRC_STRICT_VERIFY | SH4DRC_FLUSH_PC | SH4DRC_STRICT_PCREL)
|
||||
#define SH4DRC_FASTEST_OPTIONS (0)
|
||||
|
||||
void sh4drc_set_options(device_t *device, UINT32 options);
|
||||
void sh4drc_add_pcflush(device_t *device, offs_t address);
|
||||
|
||||
#endif /* __SH4_H__ */
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
#include <stdint.h>
|
||||
|
||||
#ifndef FASTCALL
|
||||
#undef __fastcall
|
||||
#define __fastcall
|
||||
#endif
|
||||
|
||||
typedef UINT8 (__fastcall *pSh3ReadByteHandler)(UINT32 a);
|
||||
typedef void (__fastcall *pSh3WriteByteHandler)(UINT32 a, UINT8 d);
|
||||
typedef UINT16 (__fastcall *pSh3ReadWordHandler)(UINT32 a);
|
||||
typedef void (__fastcall *pSh3WriteWordHandler)(UINT32 a, UINT16 d);
|
||||
typedef UINT32 (__fastcall *pSh3ReadLongHandler)(UINT32 a);
|
||||
typedef void (__fastcall *pSh3WriteLongHandler)(UINT32 a, UINT32 d);
|
||||
|
||||
void __fastcall Sh3WriteByte(UINT32 a, UINT8 d);
|
||||
UINT8 __fastcall Sh3ReadByte(UINT32 a);
|
||||
|
||||
void Sh3Init(INT32 num, INT32 hz, char md0, char md1, char md2, char md3, char md4, char md5, char md6, char md7, char md8 );
|
||||
void Sh3Exit();
|
||||
|
||||
void sh4_set_cave_blitter_delay_func(void (*pfunc)(int));
|
||||
void sh4_set_cave_blitter_delay_timer(int cycles);
|
||||
INT32 sh4_get_cpu_speed();
|
||||
void Sh3SetClockCV1k(INT32 clock);
|
||||
|
||||
void Sh3SetTimerGranularity(INT32 timergransh); // speedhack
|
||||
|
||||
void Sh3Open(const INT32 i);
|
||||
void Sh3Close();
|
||||
INT32 Sh3GetActive();
|
||||
|
||||
void Sh3Reset();
|
||||
INT32 Sh3Run(INT32 cycles);
|
||||
|
||||
void Sh3SetIRQLine(INT32 line, INT32 state);
|
||||
|
||||
INT32 Sh3MapMemory(UINT8* pMemory, UINT32 nStart, UINT32 nEnd, INT32 nType);
|
||||
INT32 Sh3MapHandler(uintptr_t nHandler, UINT32 nStart, UINT32 nEnd, INT32 nType);
|
||||
|
||||
INT32 Sh3SetReadPortHandler(pSh3ReadLongHandler pHandler);
|
||||
INT32 Sh3SetWritePortHandler(pSh3WriteLongHandler pHandler);
|
||||
|
||||
INT32 Sh3SetReadByteHandler(INT32 i, pSh3ReadByteHandler pHandler);
|
||||
INT32 Sh3SetWriteByteHandler(INT32 i, pSh3WriteByteHandler pHandler);
|
||||
INT32 Sh3SetReadWordHandler(INT32 i, pSh3ReadWordHandler pHandler);
|
||||
INT32 Sh3SetWriteWordHandler(INT32 i, pSh3WriteWordHandler pHandler);
|
||||
INT32 Sh3SetReadLongHandler(INT32 i, pSh3ReadLongHandler pHandler);
|
||||
INT32 Sh3SetWriteLongHandler(INT32 i, pSh3WriteLongHandler pHandler);
|
||||
|
||||
UINT32 Sh3GetPC(INT32 n);
|
||||
void Sh3RunEnd();
|
||||
|
||||
void Sh3BurnUntilInt();
|
||||
|
||||
INT32 Sh3TotalCycles();
|
||||
void Sh3NewFrame();
|
||||
void Sh3BurnCycles(INT32 cycles);
|
||||
void Sh3Idle(INT32 cycles);
|
||||
void Sh3SetEatCycles(INT32 i);
|
||||
|
||||
INT32 Sh3Scan(INT32 nAction);
|
||||
|
||||
|
||||
void Sh3CheatWriteByte(UINT32 a, UINT8 d); // cheat core
|
||||
UINT8 Sh3CheatReadByte(UINT32 a);
|
||||
|
||||
extern struct cpu_core_config Sh3Config;
|
||||
|
||||
// depreciate this and use BurnTimerAttach directly!
|
||||
#define BurnTimerAttachSh3(clock) \
|
||||
BurnTimerAttach(&Sh3Config, clock)
|
||||
|
|
@ -0,0 +1,172 @@
|
|||
/*****************************************************************************
|
||||
*
|
||||
* sh4comn.h
|
||||
*
|
||||
* SH-4 non-specific components
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifndef __SH4COMN_H__
|
||||
#define __SH4COMN_H__
|
||||
|
||||
//#define USE_SH4DRC
|
||||
|
||||
/* speed up delay loops, bail out of tight loops */
|
||||
#define BUSY_LOOP_HACKS 1
|
||||
|
||||
#define VERBOSE 0
|
||||
|
||||
#ifdef USE_SH4DRC
|
||||
#include "cpu/drcfe.h"
|
||||
#include "cpu/drcuml.h"
|
||||
#include "cpu/drcumlsh.h"
|
||||
|
||||
class sh4_frontend;
|
||||
#endif
|
||||
|
||||
#define CPU_TYPE_SH3 (2)
|
||||
#define CPU_TYPE_SH4 (3)
|
||||
|
||||
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
|
||||
|
||||
#define EXPPRI(pl,po,p,n) (((4-(pl)) << 24) | ((15-(po)) << 16) | ((p) << 8) | (255-(n)))
|
||||
#define NMIPRI() EXPPRI(3,0,16,SH4_INTC_NMI)
|
||||
#define INTPRI(p,n) EXPPRI(4,2,p,n)
|
||||
|
||||
#define FP_RS(r) m_fr[(r)] // binary representation of single precision floating point register r
|
||||
#define FP_RFS(r) *( (float *)(m_fr+(r)) ) // single precision floating point register r
|
||||
#define FP_RFD(r) *( (double *)(m_fr+(r)) ) // double precision floating point register r
|
||||
#define FP_XS(r) m_xf[(r)] // binary representation of extended single precision floating point register r
|
||||
#define FP_XFS(r) *( (float *)(m_xf+(r)) ) // single precision extended floating point register r
|
||||
#define FP_XFD(r) *( (double *)(m_xf+(r)) ) // double precision extended floating point register r
|
||||
#ifdef LSB_FIRST
|
||||
#define FP_RS2(r) m_fr[(r) ^ m_fpu_pr]
|
||||
#define FP_RFS2(r) *( (float *)(m_fr+((r) ^ m_fpu_pr)) )
|
||||
#define FP_XS2(r) m_xf[(r) ^ m_fpu_pr]
|
||||
#define FP_XFS2(r) *( (float *)(m_xf+((r) ^ m_fpu_pr)) )
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef USE_SH4DRC
|
||||
struct sh4_state
|
||||
{
|
||||
int icount;
|
||||
|
||||
int pcfsel; // last pcflush entry set
|
||||
int maxpcfsel; // highest valid pcflush entry
|
||||
UINT32 pcflushes[16]; // pcflush entries
|
||||
|
||||
drc_cache * cache; /* pointer to the DRC code cache */
|
||||
drcuml_state * drcuml; /* DRC UML generator state */
|
||||
sh4_frontend * drcfe; /* pointer to the DRC front-end class */
|
||||
UINT32 drcoptions; /* configurable DRC options */
|
||||
|
||||
/* internal stuff */
|
||||
UINT8 cache_dirty; /* true if we need to flush the cache */
|
||||
|
||||
/* parameters for subroutines */
|
||||
UINT64 numcycles; /* return value from gettotalcycles */
|
||||
UINT32 arg0; /* print_debug argument 1 */
|
||||
UINT32 arg1; /* print_debug argument 2 */
|
||||
UINT32 irq; /* irq we're taking */
|
||||
|
||||
/* register mappings */
|
||||
uml::parameter regmap[16]; /* parameter to register mappings for all 16 integer registers */
|
||||
|
||||
uml::code_handle * entry; /* entry point */
|
||||
uml::code_handle * read8; /* read byte */
|
||||
uml::code_handle * write8; /* write byte */
|
||||
uml::code_handle * read16; /* read half */
|
||||
uml::code_handle * write16; /* write half */
|
||||
uml::code_handle * read32; /* read word */
|
||||
uml::code_handle * write32; /* write word */
|
||||
|
||||
uml::code_handle * interrupt; /* interrupt */
|
||||
uml::code_handle * nocode; /* nocode */
|
||||
uml::code_handle * out_of_cycles; /* out of cycles exception handler */
|
||||
|
||||
UINT32 prefadr;
|
||||
UINT32 target;
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef USE_SH4DRC
|
||||
class sh4_frontend : public drc_frontend
|
||||
{
|
||||
public:
|
||||
sh4_frontend(sh4_state &state, UINT32 window_start, UINT32 window_end, UINT32 max_sequence);
|
||||
|
||||
protected:
|
||||
virtual bool describe(opcode_desc &desc, const opcode_desc *prev);
|
||||
|
||||
private:
|
||||
bool describe_group_0(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
|
||||
bool describe_group_2(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
|
||||
bool describe_group_3(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
|
||||
bool describe_group_4(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
|
||||
bool describe_group_6(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
|
||||
bool describe_group_8(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
|
||||
bool describe_group_12(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
|
||||
bool describe_group_15(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
|
||||
|
||||
sh4_state &m_context;
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
enum
|
||||
{
|
||||
ICF = 0x00800000,
|
||||
OCFA = 0x00080000,
|
||||
OCFB = 0x00040000,
|
||||
OVF = 0x00020000
|
||||
};
|
||||
|
||||
/* Bits in SR */
|
||||
#define T 0x00000001
|
||||
#define S 0x00000002
|
||||
#define I 0x000000f0
|
||||
#define Q 0x00000100
|
||||
#define M 0x00000200
|
||||
#define FD 0x00008000
|
||||
#define BL 0x10000000
|
||||
#define sRB 0x20000000
|
||||
#define MD 0x40000000
|
||||
|
||||
/* 29 bits */
|
||||
#define AM 0x1fffffff
|
||||
|
||||
#define FLAGS (MD|sRB|BL|FD|M|Q|I|S|T)
|
||||
|
||||
/* Bits in FPSCR */
|
||||
#define RM 0x00000003
|
||||
#define DN 0x00040000
|
||||
#define PR 0x00080000
|
||||
#define SZ 0x00100000
|
||||
#define FR 0x00200000
|
||||
|
||||
#define Rn ((opcode>>8)&15)
|
||||
#define Rm ((opcode>>4)&15)
|
||||
|
||||
#define REGFLAG_R(n) (1 << (n))
|
||||
#define REGFLAG_FR(n) (1 << (n))
|
||||
#define REGFLAG_XR(n) (1 << (n))
|
||||
|
||||
/* register flags 1 */
|
||||
#define REGFLAG_PR (1 << 0)
|
||||
#define REGFLAG_MACL (1 << 1)
|
||||
#define REGFLAG_MACH (1 << 2)
|
||||
#define REGFLAG_GBR (1 << 3)
|
||||
#define REGFLAG_VBR (1 << 4)
|
||||
#define REGFLAG_SR (1 << 5)
|
||||
#define REGFLAG_SGR (1 << 6)
|
||||
#define REGFLAG_FPUL (1 << 7)
|
||||
#define REGFLAG_FPSCR (1 << 8)
|
||||
#define REGFLAG_DBR (1 << 9)
|
||||
#define REGFLAG_SSR (1 << 10)
|
||||
#define REGFLAG_SPC (1 << 11)
|
||||
|
||||
|
||||
#endif /* __SH4COMN_H__ */
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,63 @@
|
|||
/* SHA3/4 DMA Controller */
|
||||
|
||||
/* bit definitions */
|
||||
#define CHCR_SSA 0xe0000000
|
||||
#define CHCR_STC 0x10000000
|
||||
#define CHCR_DSA 0x0e000000
|
||||
#define CHCR_DTC 0x01000000
|
||||
#define CHCR_DS 0x00080000
|
||||
#define CHCR_RL 0x00040000
|
||||
#define CHCR_AM 0x00020000
|
||||
#define CHCR_AL 0x00010000
|
||||
#define CHCR_DM 0x0000c000
|
||||
#define CHCR_SM 0x00003000
|
||||
#define CHCR_RS 0x00000f00
|
||||
#define CHCR_TM 0x00000080
|
||||
#define CHCR_TS 0x00000070
|
||||
#define CHCR_IE 0x00000004
|
||||
#define CHCR_TE 0x00000002
|
||||
#define CHCR_DE 0x00000001
|
||||
|
||||
#define DMAOR_DDT 0x8000
|
||||
#define DMAOR_PR 0x0300
|
||||
#define DMAOR_COD 0x0010
|
||||
#define DMAOR_AE 0x0004
|
||||
#define DMAOR_NMIF 0x0002
|
||||
#define DMAOR_DME 0x0001
|
||||
|
||||
static void sh4_dmac_callback(INT32 param);
|
||||
|
||||
static void sh4_handle_sar0_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_sar1_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_sar2_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_sar3_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_dar0_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_dar1_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_dar2_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_dar3_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_dmatcr0_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_dmatcr1_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_dmatcr2_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_dmatcr3_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_chcr0_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_chcr1_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_chcr2_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_chcr3_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static void sh4_handle_dmaor_addr_w(UINT32 data, UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_sar0_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_sar1_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_sar2_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_sar3_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_dar0_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_dar1_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_dar2_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_dar3_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_dmatcr0_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_dmatcr1_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_dmatcr2_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_dmatcr3_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_chcr0_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_chcr1_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_chcr2_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_chcr3_addr_r(UINT32 mem_mask);
|
||||
static UINT32 sh4_handle_dmaor_addr_r(UINT32 mem_mask);
|
||||
|
|
@ -0,0 +1,704 @@
|
|||
/* SHA3/4 DMA Controller */
|
||||
|
||||
/*
|
||||
#include "emu.h"
|
||||
#include "debugger.h"
|
||||
#include "sh4.h"
|
||||
#include "sh4comn.h"
|
||||
#include "sh3comn.h"
|
||||
#include "sh4dmac.h"
|
||||
*/
|
||||
|
||||
static const int dmasize[8] = { 8, 1, 2, 4, 32, 0, 0, 0 };
|
||||
|
||||
static const int sh3_dmasize[4] = { 1, 2, 4, 16 };
|
||||
|
||||
static UINT32 sh4_handle_sar0_addr_r(UINT32 mem_mask) { return m_SH4_SAR0; }
|
||||
static UINT32 sh4_handle_sar1_addr_r(UINT32 mem_mask) { return m_SH4_SAR1; }
|
||||
static UINT32 sh4_handle_sar2_addr_r(UINT32 mem_mask) { return m_SH4_SAR2; }
|
||||
static UINT32 sh4_handle_sar3_addr_r(UINT32 mem_mask) { return m_SH4_SAR3; }
|
||||
static UINT32 sh4_handle_dar0_addr_r(UINT32 mem_mask) { return m_SH4_DAR0; }
|
||||
static UINT32 sh4_handle_dar1_addr_r(UINT32 mem_mask) { return m_SH4_DAR1; }
|
||||
static UINT32 sh4_handle_dar2_addr_r(UINT32 mem_mask) { return m_SH4_DAR2; }
|
||||
static UINT32 sh4_handle_dar3_addr_r(UINT32 mem_mask) { return m_SH4_DAR3; }
|
||||
static UINT32 sh4_handle_dmatcr0_addr_r(UINT32 mem_mask) { return m_SH4_DMATCR0; }
|
||||
static UINT32 sh4_handle_dmatcr1_addr_r(UINT32 mem_mask) { return m_SH4_DMATCR1; }
|
||||
static UINT32 sh4_handle_dmatcr2_addr_r(UINT32 mem_mask) { return m_SH4_DMATCR2; }
|
||||
static UINT32 sh4_handle_dmatcr3_addr_r(UINT32 mem_mask) { return m_SH4_DMATCR3; }
|
||||
static UINT32 sh4_handle_chcr0_addr_r(UINT32 mem_mask) { return m_SH4_CHCR0; }
|
||||
static UINT32 sh4_handle_chcr1_addr_r(UINT32 mem_mask) { return m_SH4_CHCR1; }
|
||||
static UINT32 sh4_handle_chcr2_addr_r(UINT32 mem_mask) { return m_SH4_CHCR2; }
|
||||
static UINT32 sh4_handle_chcr3_addr_r(UINT32 mem_mask) { return m_SH4_CHCR3; }
|
||||
static UINT32 sh4_handle_dmaor_addr_r(UINT32 mem_mask) { return m_SH4_DMAOR; }
|
||||
|
||||
static void sh4_dmac_callback(INT32 param)
|
||||
{
|
||||
int channel = param & 0xf;
|
||||
|
||||
LOG(("SH4 '%s': DMA %d complete\n", tag(), channel));
|
||||
m_dma_timer_active[channel] = 0;
|
||||
switch (channel)
|
||||
{
|
||||
case 0:
|
||||
m_SH4_DMATCR0 = 0;
|
||||
m_SH4_CHCR0 |= CHCR_TE;
|
||||
if (m_SH4_CHCR0 & CHCR_IE)
|
||||
sh4_exception_request(SH4_INTC_DMTE0);
|
||||
break;
|
||||
case 1:
|
||||
m_SH4_DMATCR1 = 0;
|
||||
m_SH4_CHCR1 |= CHCR_TE;
|
||||
if (m_SH4_CHCR1 & CHCR_IE)
|
||||
sh4_exception_request(SH4_INTC_DMTE1);
|
||||
break;
|
||||
case 2:
|
||||
m_SH4_DMATCR2 = 0;
|
||||
m_SH4_CHCR2 |= CHCR_TE;
|
||||
if (m_SH4_CHCR2 & CHCR_IE)
|
||||
sh4_exception_request(SH4_INTC_DMTE2);
|
||||
break;
|
||||
case 3:
|
||||
m_SH4_DMATCR3 = 0;
|
||||
m_SH4_CHCR3 |= CHCR_TE;
|
||||
if (m_SH4_CHCR3 & CHCR_IE)
|
||||
sh4_exception_request(SH4_INTC_DMTE3);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static int sh4_dma_transfer(int channel, int timermode, UINT32 chcr, UINT32 *sar, UINT32 *dar, UINT32 *dmatcr)
|
||||
{
|
||||
int incs, incd, size;
|
||||
UINT32 src, dst, count;
|
||||
|
||||
incd = (chcr & CHCR_DM) >> 14;
|
||||
incs = (chcr & CHCR_SM) >> 12;
|
||||
|
||||
if (m_cpu_type == CPU_TYPE_SH4)
|
||||
{
|
||||
size = dmasize[(chcr & CHCR_TS) >> 4];
|
||||
}
|
||||
else
|
||||
{
|
||||
size = sh3_dmasize[(chcr >> 3) & 3];
|
||||
}
|
||||
|
||||
if(incd == 3 || incs == 3)
|
||||
{
|
||||
logerror("SH4: DMA: bad increment values (%d, %d, %d, %04x)\n", incd, incs, size, chcr);
|
||||
return 0;
|
||||
}
|
||||
src = *sar;
|
||||
dst = *dar;
|
||||
count = *dmatcr;
|
||||
if (!count)
|
||||
count = 0x1000000;
|
||||
|
||||
//LOG(("SH4: DMA %d start %x, %x, %x, %04x, %d, %d, %d\n", channel, src, dst, count, chcr, incs, incd, size));
|
||||
//bprintf(0, _T("SH4: DMA %d start %x, %x, %x, %04x, %d, %d, %d\n"), channel, src, dst, count, chcr, incs, incd, size);
|
||||
|
||||
if (timermode == 1) // timer actvated after a time based on the number of words to transfer
|
||||
{
|
||||
INT32 cycles = 2*count+1;
|
||||
m_dma_timer_active[channel] = 1;
|
||||
//m_dma_timer[channel]->adjust(cycles_to_attotime(2*count+1), channel);
|
||||
//bprintf(0, _T("dma timer %d cycles!\n"), cycles);
|
||||
m_dma_timer[channel].start(cycles, -1, 1, 0);
|
||||
}
|
||||
else if (timermode == 2) // timer activated immediately
|
||||
{
|
||||
m_dma_timer_active[channel] = 1;
|
||||
//m_dma_timer[channel]->adjust(attotime::zero, channel);
|
||||
//bprintf(0, _T("dma timer now!\n"));
|
||||
m_dma_timer[channel].start(0, -1, 1, 0);
|
||||
}
|
||||
|
||||
src &= AM;
|
||||
dst &= AM;
|
||||
|
||||
switch(size)
|
||||
{
|
||||
case 1: // 8 bit
|
||||
for(;count > 0; count --)
|
||||
{
|
||||
if(incs == 2)
|
||||
src --;
|
||||
if(incd == 2)
|
||||
dst --;
|
||||
//m_program->write_byte(dst, m_program->read_byte(src));
|
||||
WB(dst, RB(src));
|
||||
if(incs == 1)
|
||||
src ++;
|
||||
if(incd == 1)
|
||||
dst ++;
|
||||
}
|
||||
break;
|
||||
case 2: // 16 bit
|
||||
src &= ~1;
|
||||
dst &= ~1;
|
||||
for(;count > 0; count --)
|
||||
{
|
||||
if(incs == 2)
|
||||
src -= 2;
|
||||
if(incd == 2)
|
||||
dst -= 2;
|
||||
//m_program->write_word(dst, m_program->read_word(src));
|
||||
WW(dst, RW(src));
|
||||
if(incs == 1)
|
||||
src += 2;
|
||||
if(incd == 1)
|
||||
dst += 2;
|
||||
}
|
||||
break;
|
||||
case 8: // 64 bit
|
||||
src &= ~7;
|
||||
dst &= ~7;
|
||||
for(;count > 0; count --)
|
||||
{
|
||||
if(incs == 2)
|
||||
src -= 8;
|
||||
if(incd == 2)
|
||||
dst -= 8;
|
||||
//m_program->write_qword(dst, m_program->read_qword(src));
|
||||
WL(dst, RL(src));
|
||||
WL(dst+4, RL(src+4));
|
||||
if(incs == 1)
|
||||
src += 8;
|
||||
if(incd == 1)
|
||||
dst += 8;
|
||||
|
||||
}
|
||||
break;
|
||||
case 4: // 32 bit
|
||||
src &= ~3;
|
||||
dst &= ~3;
|
||||
for(;count > 0; count --)
|
||||
{
|
||||
if(incs == 2)
|
||||
src -= 4;
|
||||
if(incd == 2)
|
||||
dst -= 4;
|
||||
//m_program->write_dword(dst, m_program->read_dword(src));
|
||||
WL(dst, RL(src));
|
||||
if(incs == 1)
|
||||
src += 4;
|
||||
if(incd == 1)
|
||||
dst += 4;
|
||||
|
||||
}
|
||||
break;
|
||||
case 32:
|
||||
src &= ~31;
|
||||
dst &= ~31;
|
||||
for(;count > 0; count --)
|
||||
{
|
||||
if(incs == 2)
|
||||
src -= 32;
|
||||
if(incd == 2)
|
||||
dst -= 32;
|
||||
//m_program->write_qword(dst, m_program->read_qword(src));
|
||||
//m_program->write_qword(dst+8, m_program->read_qword(src+8));
|
||||
//m_program->write_qword(dst+16, m_program->read_qword(src+16));
|
||||
//m_program->write_qword(dst+24, m_program->read_qword(src+24));
|
||||
WL(dst, RL(src)); WL(dst+4, RL(src+4));
|
||||
WL(dst+8, RL(src+8)); WL(dst+12, RL(src+12));
|
||||
WL(dst+16, RL(src+16)); WL(dst+20, RL(src+20));
|
||||
WL(dst+24, RL(src+24)); WL(dst+28, RL(src+28));
|
||||
if(incs == 1)
|
||||
src += 32;
|
||||
if(incd == 1)
|
||||
dst += 32;
|
||||
}
|
||||
break;
|
||||
}
|
||||
*sar = (*sar & !AM) | src;
|
||||
*dar = (*dar & !AM) | dst;
|
||||
*dmatcr = count;
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int sh4_dma_transfer_device(int channel, UINT32 chcr, UINT32 *sar, UINT32 *dar, UINT32 *dmatcr)
|
||||
{
|
||||
int incs, incd, size, mod;
|
||||
UINT32 src, dst, count;
|
||||
|
||||
incd = (chcr & CHCR_DM) >> 14;
|
||||
incs = (chcr & CHCR_SM) >> 12;
|
||||
|
||||
|
||||
if (m_cpu_type == CPU_TYPE_SH4)
|
||||
{
|
||||
size = dmasize[(chcr & CHCR_TS) >> 4];
|
||||
}
|
||||
else
|
||||
{
|
||||
size = sh3_dmasize[(chcr >> 3) & 3];
|
||||
}
|
||||
|
||||
mod = ((chcr & CHCR_RS) >> 8);
|
||||
if (incd == 3 || incs == 3)
|
||||
{
|
||||
logerror("SH4: DMA: bad increment values (%d, %d, %d, %04x)\n", incd, incs, size, chcr);
|
||||
return 0;
|
||||
}
|
||||
src = *sar;
|
||||
dst = *dar;
|
||||
count = *dmatcr;
|
||||
if (!count)
|
||||
count = 0x1000000;
|
||||
|
||||
LOG(("SH4: DMA %d start device<->memory %x, %x, %x, %04x, %d, %d, %d\n", channel, src, dst, count, chcr, incs, incd, size));
|
||||
|
||||
m_dma_timer_active[channel] = 1;
|
||||
|
||||
src &= AM;
|
||||
dst &= AM;
|
||||
|
||||
// remember parameters
|
||||
m_dma_source[channel]=src;
|
||||
m_dma_destination[channel]=dst;
|
||||
m_dma_count[channel]=count;
|
||||
m_dma_wordsize[channel]=size;
|
||||
m_dma_source_increment[channel]=incs;
|
||||
m_dma_destination_increment[channel]=incd;
|
||||
m_dma_mode[channel]=mod;
|
||||
|
||||
// inform device its ready to transfer
|
||||
//m_io->write_dword(SH4_IOPORT_DMA, channel | (mod << 16));
|
||||
WritePort(SH4_IOPORT_DMA, channel | (mod << 16));
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static void sh4_dmac_check(int channel)
|
||||
{
|
||||
UINT32 dmatcr, chcr, sar, dar;
|
||||
|
||||
switch (channel)
|
||||
{
|
||||
case 0:
|
||||
sar = m_SH4_SAR0;
|
||||
dar = m_SH4_DAR0;
|
||||
chcr = m_SH4_CHCR0;
|
||||
dmatcr = m_SH4_DMATCR0;
|
||||
break;
|
||||
case 1:
|
||||
sar = m_SH4_SAR1;
|
||||
dar = m_SH4_DAR1;
|
||||
chcr = m_SH4_CHCR1;
|
||||
dmatcr = m_SH4_DMATCR1;
|
||||
break;
|
||||
case 2:
|
||||
sar = m_SH4_SAR2;
|
||||
dar = m_SH4_DAR2;
|
||||
chcr = m_SH4_CHCR2;
|
||||
dmatcr = m_SH4_DMATCR2;
|
||||
break;
|
||||
case 3:
|
||||
sar = m_SH4_SAR3;
|
||||
dar = m_SH4_DAR3;
|
||||
chcr = m_SH4_CHCR3;
|
||||
dmatcr = m_SH4_DMATCR3;
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
}
|
||||
if (chcr & m_SH4_DMAOR & DMAOR_DME)
|
||||
{
|
||||
if ((((chcr & CHCR_RS) >> 8) < 2) || (((chcr & CHCR_RS) >> 8) > 6))
|
||||
return;
|
||||
if (!m_dma_timer_active[channel] && !(chcr & CHCR_TE) && !(m_SH4_DMAOR & (DMAOR_AE | DMAOR_NMIF)))
|
||||
{
|
||||
if (((chcr & CHCR_RS) >> 8) > 3)
|
||||
sh4_dma_transfer(channel, 1, chcr, &sar, &dar, &dmatcr);
|
||||
else if ((m_SH4_DMAOR & DMAOR_DDT) == 0)
|
||||
sh4_dma_transfer_device(channel, chcr, &sar, &dar, &dmatcr); // tell device we are ready to transfer
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (m_dma_timer_active[channel])
|
||||
{
|
||||
logerror("SH4: DMA %d cancelled in-flight but all data transferred", channel);
|
||||
//m_dma_timer[channel]->adjust(attotime::never, channel);
|
||||
m_dma_timer[channel].stop();
|
||||
m_dma_timer_active[channel] = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#if 0
|
||||
// sh3-only core for now -dink
|
||||
|
||||
// called by drivers to transfer data in a cpu<->device dma. 'device' must be a SH4 cpu
|
||||
static int sh4_dma_data(struct sh4_device_dma *s)
|
||||
{
|
||||
UINT32 pos, len, siz;
|
||||
int channel = s->channel;
|
||||
void *data = s->buffer;
|
||||
|
||||
if (!m_dma_timer_active[channel])
|
||||
return 0;
|
||||
|
||||
if (m_dma_mode[channel] == 2)
|
||||
{
|
||||
// device receives data
|
||||
len = m_dma_count[channel];
|
||||
if (s->length < len)
|
||||
len = s->length;
|
||||
siz = m_dma_wordsize[channel];
|
||||
for (pos = 0;pos < len;pos++) {
|
||||
switch (siz)
|
||||
{
|
||||
case 8:
|
||||
if (m_dma_source_increment[channel] == 2)
|
||||
m_dma_source[channel] -= 8;
|
||||
*(UINT64 *)data = m_program->read_qword(m_dma_source[channel] & ~7);
|
||||
if (m_dma_source_increment[channel] == 1)
|
||||
m_dma_source[channel] += 8;
|
||||
break;
|
||||
case 1:
|
||||
if (m_dma_source_increment[channel] == 2)
|
||||
m_dma_source[channel]--;
|
||||
*(UINT8 *)data = m_program->read_byte(m_dma_source[channel]);
|
||||
if (m_dma_source_increment[channel] == 1)
|
||||
m_dma_source[channel]++;
|
||||
break;
|
||||
case 2:
|
||||
if (m_dma_source_increment[channel] == 2)
|
||||
m_dma_source[channel] -= 2;
|
||||
*(UINT16 *)data = m_program->read_word(m_dma_source[channel] & ~1);
|
||||
if (m_dma_source_increment[channel] == 1)
|
||||
m_dma_source[channel] += 2;
|
||||
break;
|
||||
case 4:
|
||||
if (m_dma_source_increment[channel] == 2)
|
||||
m_dma_source[channel] -= 4;
|
||||
*(UINT32 *)data = m_program->read_dword(m_dma_source[channel] & ~3);
|
||||
if (m_dma_source_increment[channel] == 1)
|
||||
m_dma_source[channel] += 4;
|
||||
break;
|
||||
case 32:
|
||||
if (m_dma_source_increment[channel] == 2)
|
||||
m_dma_source[channel] -= 32;
|
||||
*(UINT64 *)data = m_program->read_qword(m_dma_source[channel] & ~31);
|
||||
*((UINT64 *)data+1) = m_program->read_qword((m_dma_source[channel] & ~31)+8);
|
||||
*((UINT64 *)data+2) = m_program->read_qword((m_dma_source[channel] & ~31)+16);
|
||||
*((UINT64 *)data+3) = m_program->read_qword((m_dma_source[channel] & ~31)+24);
|
||||
if (m_dma_source_increment[channel] == 1)
|
||||
m_dma_source[channel] += 32;
|
||||
break;
|
||||
}
|
||||
m_dma_count[channel]--;
|
||||
}
|
||||
if (m_dma_count[channel] == 0) // all data transferred ?
|
||||
{
|
||||
m_dma_timer[channel]->adjust(attotime::zero, channel);
|
||||
return 2;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
else if (m_dma_mode[channel] == 3)
|
||||
{
|
||||
// device sends data
|
||||
len = m_dma_count[channel];
|
||||
if (s->length < len)
|
||||
len = s->length;
|
||||
siz = m_dma_wordsize[channel];
|
||||
for (pos = 0;pos < len;pos++) {
|
||||
switch (siz)
|
||||
{
|
||||
case 8:
|
||||
if (m_dma_destination_increment[channel] == 2)
|
||||
m_dma_destination[channel]-=8;
|
||||
m_program->write_qword(m_dma_destination[channel] & ~7, *(UINT64 *)data);
|
||||
if (m_dma_destination_increment[channel] == 1)
|
||||
m_dma_destination[channel]+=8;
|
||||
break;
|
||||
case 1:
|
||||
if (m_dma_destination_increment[channel] == 2)
|
||||
m_dma_destination[channel]--;
|
||||
m_program->write_byte(m_dma_destination[channel], *(UINT8 *)data);
|
||||
if (m_dma_destination_increment[channel] == 1)
|
||||
m_dma_destination[channel]++;
|
||||
break;
|
||||
case 2:
|
||||
if (m_dma_destination_increment[channel] == 2)
|
||||
m_dma_destination[channel]-=2;
|
||||
m_program->write_word(m_dma_destination[channel] & ~1, *(UINT16 *)data);
|
||||
if (m_dma_destination_increment[channel] == 1)
|
||||
m_dma_destination[channel]+=2;
|
||||
break;
|
||||
case 4:
|
||||
if (m_dma_destination_increment[channel] == 2)
|
||||
m_dma_destination[channel]-=4;
|
||||
m_program->write_dword(m_dma_destination[channel] & ~3, *(UINT32 *)data);
|
||||
if (m_dma_destination_increment[channel] == 1)
|
||||
m_dma_destination[channel]+=4;
|
||||
break;
|
||||
case 32:
|
||||
if (m_dma_destination_increment[channel] == 2)
|
||||
m_dma_destination[channel]-=32;
|
||||
m_program->write_qword(m_dma_destination[channel] & ~31, *(UINT64 *)data);
|
||||
m_program->write_qword((m_dma_destination[channel] & ~31)+8, *((UINT64 *)data+1));
|
||||
m_program->write_qword((m_dma_destination[channel] & ~31)+16, *((UINT64 *)data+2));
|
||||
m_program->write_qword((m_dma_destination[channel] & ~31)+24, *((UINT64 *)data+3));
|
||||
if (m_dma_destination_increment[channel] == 1)
|
||||
m_dma_destination[channel]+=32;
|
||||
break;
|
||||
}
|
||||
m_dma_count[channel]--;
|
||||
}
|
||||
|
||||
if (m_dma_count[channel] == 0) // all data transferred ?
|
||||
{
|
||||
m_dma_timer[channel]->adjust(attotime::zero, channel);
|
||||
return 2;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
// called by drivers to transfer data in a DDT dma.
|
||||
static void sh4_dma_ddt(struct sh4_ddt_dma *s)
|
||||
{
|
||||
UINT32 chcr;
|
||||
UINT32 *p32bits;
|
||||
UINT64 *p32bytes;
|
||||
UINT32 pos,len,siz;
|
||||
|
||||
if (m_cpu_type != CPU_TYPE_SH4)
|
||||
fatalerror("sh4_dma_ddt uses m_m[] with SH3\n");
|
||||
|
||||
if (m_dma_timer_active[s->channel])
|
||||
return;
|
||||
if (s->mode >= 0) {
|
||||
switch (s->channel)
|
||||
{
|
||||
case 0:
|
||||
if (s->mode & 1)
|
||||
s->source = m_SH4_SAR0;
|
||||
if (s->mode & 2)
|
||||
m_SH4_SAR0 = s->source;
|
||||
if (s->mode & 4)
|
||||
s->destination = m_SH4_DAR0;
|
||||
if (s->mode & 8)
|
||||
m_SH4_DAR0 = s->destination;
|
||||
break;
|
||||
case 1:
|
||||
if (s->mode & 1)
|
||||
s->source = m_SH4_SAR1;
|
||||
if (s->mode & 2)
|
||||
m_SH4_SAR1 = s->source;
|
||||
if (s->mode & 4)
|
||||
s->destination = m_SH4_DAR1;
|
||||
if (s->mode & 8)
|
||||
m_SH4_DAR1 = s->destination;
|
||||
break;
|
||||
case 2:
|
||||
if (s->mode & 1)
|
||||
s->source = m_SH4_SAR2;
|
||||
if (s->mode & 2)
|
||||
m_SH4_SAR2 = s->source;
|
||||
if (s->mode & 4)
|
||||
s->destination = m_SH4_DAR2;
|
||||
if (s->mode & 8)
|
||||
m_SH4_DAR2 = s->destination;
|
||||
break;
|
||||
case 3:
|
||||
default:
|
||||
if (s->mode & 1)
|
||||
s->source = m_SH4_SAR3;
|
||||
if (s->mode & 2)
|
||||
m_SH4_SAR3 = s->source;
|
||||
if (s->mode & 4)
|
||||
s->destination = m_SH4_DAR3;
|
||||
if (s->mode & 8)
|
||||
m_SH4_DAR3 = s->destination;
|
||||
break;
|
||||
}
|
||||
switch (s->channel)
|
||||
{
|
||||
case 0:
|
||||
chcr = m_SH4_CHCR0;
|
||||
len = m_SH4_DMATCR0;
|
||||
break;
|
||||
case 1:
|
||||
chcr = m_SH4_CHCR1;
|
||||
len = m_SH4_DMATCR1;
|
||||
break;
|
||||
case 2:
|
||||
chcr = m_SH4_CHCR2;
|
||||
len = m_SH4_DMATCR2;
|
||||
break;
|
||||
case 3:
|
||||
default:
|
||||
chcr = m_SH4_CHCR3;
|
||||
len = m_SH4_DMATCR3;
|
||||
break;
|
||||
}
|
||||
if ((s->direction) == 0) {
|
||||
chcr = (chcr & 0xffff3fff) | ((s->mode & 0x30) << 10);
|
||||
} else {
|
||||
chcr = (chcr & 0xffffcfff) | ((s->mode & 0x30) << 8);
|
||||
}
|
||||
|
||||
|
||||
if (m_cpu_type == CPU_TYPE_SH4)
|
||||
{
|
||||
//siz = dmasize[(chcr & CHCR_TS) >> 4];
|
||||
siz = dmasize[(chcr >> 4) & 7];
|
||||
}
|
||||
else
|
||||
{
|
||||
siz = sh3_dmasize[(chcr >> 3) & 3];
|
||||
}
|
||||
|
||||
|
||||
if (siz && (s->size))
|
||||
if ((len * siz) != (s->length * s->size))
|
||||
return;
|
||||
sh4_dma_transfer(s->channel, 0, chcr, &s->source, &s->destination, &len);
|
||||
} else {
|
||||
if (s->size == 4) {
|
||||
if ((s->direction) == 0) {
|
||||
len = s->length;
|
||||
p32bits = (UINT32 *)(s->buffer);
|
||||
for (pos = 0;pos < len;pos++) {
|
||||
*p32bits = m_program->read_dword(s->source);
|
||||
p32bits++;
|
||||
s->source = s->source + 4;
|
||||
}
|
||||
} else {
|
||||
len = s->length;
|
||||
p32bits = (UINT32 *)(s->buffer);
|
||||
for (pos = 0;pos < len;pos++) {
|
||||
m_program->write_dword(s->destination, *p32bits);
|
||||
p32bits++;
|
||||
s->destination = s->destination + 4;
|
||||
}
|
||||
}
|
||||
}
|
||||
if (s->size == 32) {
|
||||
if ((s->direction) == 0) {
|
||||
len = s->length * 4;
|
||||
p32bytes = (UINT64 *)(s->buffer);
|
||||
for (pos = 0;pos < len;pos++) {
|
||||
*p32bytes = m_program->read_qword(s->source);
|
||||
p32bytes++;
|
||||
s->destination = s->destination + 8;
|
||||
}
|
||||
} else {
|
||||
len = s->length * 4;
|
||||
p32bytes = (UINT64 *)(s->buffer);
|
||||
for (pos = 0;pos < len;pos++) {
|
||||
m_program->write_qword(s->destination, *p32bytes);
|
||||
p32bytes++;
|
||||
s->destination = s->destination + 8;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif // end sh4-disabled -dink
|
||||
|
||||
static void sh4_handle_sar0_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_SAR0);
|
||||
}
|
||||
|
||||
static void sh4_handle_sar1_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_SAR1);
|
||||
}
|
||||
|
||||
static void sh4_handle_sar2_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_SAR2);
|
||||
}
|
||||
|
||||
static void sh4_handle_sar3_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_SAR3);
|
||||
}
|
||||
|
||||
static void sh4_handle_dar0_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_DAR0);
|
||||
}
|
||||
|
||||
static void sh4_handle_dar1_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_DAR1);
|
||||
}
|
||||
|
||||
static void sh4_handle_dar2_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_DAR2);
|
||||
}
|
||||
|
||||
static void sh4_handle_dar3_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_DAR3);
|
||||
}
|
||||
|
||||
static void sh4_handle_dmatcr0_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_DMATCR0);
|
||||
}
|
||||
|
||||
static void sh4_handle_dmatcr1_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_DMATCR1);
|
||||
}
|
||||
|
||||
static void sh4_handle_dmatcr2_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_DMATCR2);
|
||||
}
|
||||
|
||||
static void sh4_handle_dmatcr3_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_DMATCR3);
|
||||
}
|
||||
|
||||
static void sh4_handle_chcr0_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_CHCR0);
|
||||
sh4_dmac_check(0);
|
||||
}
|
||||
|
||||
static void sh4_handle_chcr1_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_CHCR1);
|
||||
sh4_dmac_check(1);
|
||||
}
|
||||
|
||||
static void sh4_handle_chcr2_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_CHCR2);
|
||||
sh4_dmac_check(2);
|
||||
}
|
||||
|
||||
static void sh4_handle_chcr3_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_CHCR3);
|
||||
sh4_dmac_check(3);
|
||||
}
|
||||
|
||||
static void sh4_handle_dmaor_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
UINT32 old = m_SH4_DMAOR;
|
||||
COMBINE_DATA(&m_SH4_DMAOR);
|
||||
|
||||
if ((m_SH4_DMAOR & DMAOR_AE) && (~old & DMAOR_AE))
|
||||
m_SH4_DMAOR &= ~DMAOR_AE;
|
||||
if ((m_SH4_DMAOR & DMAOR_NMIF) && (~old & DMAOR_NMIF))
|
||||
m_SH4_DMAOR &= ~DMAOR_NMIF;
|
||||
sh4_dmac_check(0);
|
||||
sh4_dmac_check(1);
|
||||
sh4_dmac_check(2);
|
||||
sh4_dmac_check(3);
|
||||
}
|
||||
|
|
@ -0,0 +1,181 @@
|
|||
#pragma once
|
||||
|
||||
#ifndef __SH4REGS_H__
|
||||
#define __SH4REGS_H__
|
||||
|
||||
/* 00000001111111100000000011111100 */
|
||||
#define PTEH 0x2000 /* FF000000 */
|
||||
#define PTEL 0x2001 /* FF000004 */
|
||||
#define TTB 0x2002 /* FF000008 */
|
||||
#define TEA 0x2003 /* FF00000C */
|
||||
#define MMUCR 0x2004 /* FF000010 */
|
||||
#define BASRA 0x2005 /* FF000014 */
|
||||
#define BASRB 0x2006 /* FF000018 */
|
||||
#define CCR 0x2007 /* FF00001C */
|
||||
#define TRA 0x2008 /* FF000020 */
|
||||
#define EXPEVT 0x2009 /* FF000024 */
|
||||
#define INTEVT 0x200A /* FF000028 */
|
||||
#define VERSION 0x200C /* FF000030 */
|
||||
#define PTEA 0x200D /* FF000034 */
|
||||
#define QACR0 0x200E /* FF000038 */
|
||||
#define QACR1 0x200F /* FF00003C */
|
||||
#define PRR 0x2011 /* FF000044 */
|
||||
#define BARA 0x2400 /* FF200000 */
|
||||
#define BAMRA 0x2401 /* FF200004 */
|
||||
#define BBRA 0x2402 /* FF200008 */
|
||||
#define BARB 0x2403 /* FF20000C */
|
||||
#define BAMRB 0x2404 /* FF200010 */
|
||||
#define BBRB 0x2405 /* FF200014 */
|
||||
#define BDRB 0x2406 /* FF200018 */
|
||||
#define BDMRB 0x2407 /* FF20001C */
|
||||
#define BRCR 0x2408 /* FF200020 */
|
||||
#define BCR1 0x3000 /* FF800000 */
|
||||
#define BCR2 0x3001 /* FF800004 */
|
||||
#define BCR3 0x3014 /* FF800050 */
|
||||
#define BCR4 0x17C /* FE0A00F0 */
|
||||
#define WCR1 0x3002 /* FF800008 */
|
||||
#define WCR2 0x3003 /* FF80000C */
|
||||
#define WCR3 0x3004 /* FF800010 */
|
||||
#define MCR 0x3005 /* FF800014 */
|
||||
#define PCR 0x3006 /* FF800018 */
|
||||
#define RTCSR 0x3007 /* FF80001C */
|
||||
#define RTCNT 0x3008 /* FF800020 */
|
||||
#define RTCOR 0x3009 /* FF800024 */
|
||||
#define RFCR 0x300A /* FF800028 */
|
||||
#define PCTRA 0x300B /* FF80002C */
|
||||
#define PDTRA 0x300C /* FF800030 */
|
||||
#define PCTRB 0x3010 /* FF800040 */
|
||||
#define PDTRB 0x3011 /* FF800044 */
|
||||
#define GPIOIC 0x3012 /* FF800048 */
|
||||
#define SDMR2 0x3200 /* FF900000 */
|
||||
#define SDMR3 0x3280 /* FF940000 */
|
||||
#define SH4_SAR0_ADDR 0x3400 /* FFA00000 */
|
||||
#define SH4_DAR0_ADDR 0x3401 /* FFA00004 */
|
||||
#define SH4_DMATCR0_ADDR 0x3402 /* FFA00008 */
|
||||
#define SH4_CHCR0_ADDR 0x3403 /* FFA0000C */
|
||||
#define SH4_SAR1_ADDR 0x3404 /* FFA00010 */
|
||||
#define SH4_DAR1_ADDR 0x3405 /* FFA00014 */
|
||||
#define SH4_DMATCR1_ADDR 0x3406 /* FFA00018 */
|
||||
#define SH4_CHCR1_ADDR 0x3407 /* FFA0001C */
|
||||
#define SH4_SAR2_ADDR 0x3408 /* FFA00020 */
|
||||
#define SH4_DAR2_ADDR 0x3409 /* FFA00024 */
|
||||
#define SH4_DMATCR2_ADDR 0x340A /* FFA00028 */
|
||||
#define SH4_CHCR2_ADDR 0x340B /* FFA0002C */
|
||||
#define SH4_SAR3_ADDR 0x340C /* FFA00030 */
|
||||
#define SH4_DAR3_ADDR 0x340D /* FFA00034 */
|
||||
#define SH4_DMATCR3_ADDR 0x340E /* FFA00038 */
|
||||
#define SH4_CHCR3_ADDR 0x340F /* FFA0003C */
|
||||
#define SH4_DMAOR_ADDR 0x3410 /* FFA00040 */
|
||||
#define SAR4 0x3414 /* FFA00050 */
|
||||
#define DAR4 0x3415 /* FFA00054 */
|
||||
#define DMATCR4 0x3416 /* FFA00058 */
|
||||
#define CHCR4 0x3417 /* FFA0005C */
|
||||
#define SAR5 0x3418 /* FFA00060 */
|
||||
#define DAR5 0x3419 /* FFA00064 */
|
||||
#define DMATCR5 0x341A /* FFA00068 */
|
||||
#define CHCR5 0x341B /* FFA0006C */
|
||||
#define SAR6 0x341C /* FFA00070 */
|
||||
#define DAR6 0x341D /* FFA00074 */
|
||||
#define DMATCR6 0x341E /* FFA00078 */
|
||||
#define CHCR6 0x341F /* FFA0007C */
|
||||
#define SAR7 0x3420 /* FFA00080 */
|
||||
#define DAR7 0x3421 /* FFA00084 */
|
||||
#define DMATCR7 0x3422 /* FFA00088 */
|
||||
#define CHCR7 0x3423 /* FFA0008C */
|
||||
#define FRQCR 0x3800 /* FFC00000 */
|
||||
#define STBCR 0x3801 /* FFC00004 */
|
||||
#define WTCNT 0x3802 /* FFC00008 */
|
||||
#define WTCSR 0x3803 /* FFC0000C */
|
||||
#define STBCR2 0x3804 /* FFC00010 */
|
||||
#define R64CNT 0x3900 /* FFC80000 */
|
||||
#define RSECCNT 0x3901 /* FFC80004 */
|
||||
#define RMINCNT 0x3902 /* FFC80008 */
|
||||
#define RHRCNT 0x3903 /* FFC8000C */
|
||||
#define RWKCNT 0x3904 /* FFC80010 */
|
||||
#define RDAYCNT 0x3905 /* FFC80014 */
|
||||
#define RMONCNT 0x3906 /* FFC80018 */
|
||||
#define RYRCNT 0x3907 /* FFC8001C */
|
||||
#define RSECAR 0x3908 /* FFC80020 */
|
||||
#define RMINAR 0x3909 /* FFC80024 */
|
||||
#define RHRAR 0x390A /* FFC80028 */
|
||||
#define RWKAR 0x390B /* FFC8002C */
|
||||
#define RDAYAR 0x390C /* FFC80030 */
|
||||
#define RMONAR 0x390D /* FFC80034 */
|
||||
#define RCR1 0x390E /* FFC80038 */
|
||||
#define RCR2 0x390F /* FFC8003C */
|
||||
#define RCR3 0x3914 /* FFC80050 */
|
||||
#define RYRAR 0x3915 /* FFC80054 */
|
||||
#define ICR 0x3A00 /* FFD00000 */
|
||||
#define IPRA 0x3A01 /* FFD00004 */
|
||||
#define IPRB 0x3A02 /* FFD00008 */
|
||||
#define IPRC 0x3A03 /* FFD0000C */
|
||||
#define IPRD 0x3A04 /* FFD00010 */
|
||||
#define INTPRI00 0x100 /* FE080000 */
|
||||
#define INTREQ00 0x108 /* FE080020 */
|
||||
#define INTMSK00 0x110 /* FE080040 */
|
||||
#define INTMSKCLR00 0x118 /* FE080060 */
|
||||
#define CLKSTP00 0x140 /* FE0A0000 */
|
||||
#define CLKSTPCLR00 0x142 /* FE0A0008 */
|
||||
#define TSTR2 0x201 /* FE100004 */
|
||||
#define TCOR3 0x202 /* FE100008 */
|
||||
#define TCNT3 0x203 /* FE10000C */
|
||||
#define TCR3 0x204 /* FE100010 */
|
||||
#define TCOR4 0x205 /* FE100014 */
|
||||
#define TCNT4 0x206 /* FE100018 */
|
||||
#define TCR4 0x207 /* FE10001C */
|
||||
#define SH4_TOCR_ADDR 0x3B00 /* FFD80000 */
|
||||
#define SH4_TSTR_ADDR 0x3B01 /* FFD80004 */
|
||||
#define SH4_TCOR0_ADDR 0x3B02 /* FFD80008 */
|
||||
#define SH4_TCNT0_ADDR 0x3B03 /* FFD8000C */
|
||||
#define SH4_TCR0_ADDR 0x3B04 /* FFD80010 */
|
||||
#define SH4_TCOR1_ADDR 0x3B05 /* FFD80014 */
|
||||
#define SH4_TCNT1_ADDR 0x3B06 /* FFD80018 */
|
||||
#define SH4_TCR1_ADDR 0x3B07 /* FFD8001C */
|
||||
#define SH4_TCOR2_ADDR 0x3B08 /* FFD80020 */
|
||||
#define SH4_TCNT2_ADDR 0x3B09 /* FFD80024 */
|
||||
#define SH4_TCR2_ADDR 0x3B0A /* FFD80028 */
|
||||
#define SH4_TCPR2_ADDR 0x3B0B /* FFD8002C */
|
||||
#define SCSMR1 0x3C00 /* FFE00000 */
|
||||
#define SCBRR1 0x3C01 /* FFE00004 */
|
||||
#define SCSCR1 0x3C02 /* FFE00008 */
|
||||
#define SCTDR1 0x3C03 /* FFE0000C */
|
||||
#define SCSSR1 0x3C04 /* FFE00010 */
|
||||
#define SCRDR1 0x3C05 /* FFE00014 */
|
||||
#define SCSCMR1 0x3C06 /* FFE00018 */
|
||||
#define SCSPTR1 0x3C07 /* FFE0001C */
|
||||
#define SCSMR2 0x3D00 /* FFE80000 */
|
||||
#define SCBRR2 0x3D01 /* FFE80004 */
|
||||
#define SCSCR2 0x3D02 /* FFE80008 */
|
||||
#define SCFTDR2 0x3D03 /* FFE8000C */
|
||||
#define SCFSR2 0x3D04 /* FFE80010 */
|
||||
#define SCFRDR2 0x3D05 /* FFE80014 */
|
||||
#define SCFCR2 0x3D06 /* FFE80018 */
|
||||
#define SCFDR2 0x3D07 /* FFE8001C */
|
||||
#define SCSPTR2 0x3D08 /* FFE80020 */
|
||||
#define SCLSR2 0x3D09 /* FFE80024 */
|
||||
#define SDIR 0x3E00 /* FFF00000 */
|
||||
#define SDDR 0x3E02 /* FFF00008 */
|
||||
#define SDINT 0x3E05 /* FFF00014 */
|
||||
#define SIZEREGS 15878
|
||||
|
||||
|
||||
|
||||
#define MMUCR_LRUI 0xfc000000
|
||||
#define MMUCR_URB 0x00fc0000
|
||||
#define MMUCR_URC 0x0000fc00
|
||||
#define MMUCR_SQMD 0x00000200
|
||||
#define MMUCR_SV 0x00000100
|
||||
#define MMUCR_TI 0x00000004
|
||||
#define MMUCR_AT 0x00000001
|
||||
|
||||
/* constants */
|
||||
#define PVR_SH7091 0x040205c1
|
||||
#define PVR_SH7750 0x04020500 // from TN-SH7-361B/E
|
||||
#define PVR_SH7750S 0x04020600
|
||||
#define PVR_SH7750R 0x04050000
|
||||
#define PRR_SH7750R 0x00000100
|
||||
#define PVR_SH7751 0x04110000
|
||||
#define PVR_SH7751R 0x04050000
|
||||
#define PRR_SH7751R 0x00000110
|
||||
|
||||
#endif /* __SH4REGS_H__ */
|
||||
|
|
@ -0,0 +1 @@
|
|||
/* SH3/4 Timer Unit */
|
||||
|
|
@ -0,0 +1,323 @@
|
|||
/* SH3/4 Timer Unit */
|
||||
|
||||
/*#include "emu.h"
|
||||
#include "debugger.h"
|
||||
#include "sh4.h"
|
||||
#include "sh4comn.h"
|
||||
#include "sh3comn.h"
|
||||
#include "sh4tmu.h"*/
|
||||
|
||||
static const int tcnt_div[8] = { 4, 16, 64, 256, 1024, 1, 1, 1 };
|
||||
|
||||
/*-------------------------------------------------
|
||||
sh4_scale_up_mame_time - multiply a attotime by
|
||||
a (constant+1) where 0 <= constant < 2^32
|
||||
-------------------------------------------------*/
|
||||
|
||||
/*INLINE attotime sh4_scale_up_mame_time(const attotime &_time1, UINT32 factor1)
|
||||
{
|
||||
return _time1 * factor1 + _time1;
|
||||
}*/
|
||||
|
||||
static UINT32 compute_ticks_timer(int timer_num, int hertz, int divisor)
|
||||
{
|
||||
//double ret=((timer->remaining().as_double() * (double)hertz) / (double)divisor) - 1;
|
||||
return (m_timer[timer_num].timeleft()) - 1;
|
||||
}
|
||||
|
||||
static void sh4_timer_recompute(int which)
|
||||
{
|
||||
// double ticks;
|
||||
|
||||
UINT32 tcnt = 0;
|
||||
UINT32 tcr = 0;
|
||||
switch (which)
|
||||
{
|
||||
case 0:
|
||||
tcr = m_SH4_TCR0;
|
||||
tcnt = m_SH4_TCNT0;
|
||||
break;
|
||||
|
||||
case 1:
|
||||
tcr = m_SH4_TCR1;
|
||||
tcnt = m_SH4_TCNT1;
|
||||
break;
|
||||
|
||||
case 2:
|
||||
tcr = m_SH4_TCR2;
|
||||
tcnt = m_SH4_TCNT2;
|
||||
break;
|
||||
}
|
||||
|
||||
//ticks = tcnt;
|
||||
//m_timer[which]->adjust(sh4_scale_up_mame_time(attotime::from_hz(m_pm_clock) * tcnt_div[tcr & 7], ticks), which);
|
||||
//bprintf(0, _T("sh4_timer_recompute(), starting timer #%d\n"), which);
|
||||
m_timer[which].set_prescaler((m_pm_divider) * (tcnt_div[tcr & 7]));
|
||||
m_timer[which].start(tcnt, which, 1, 0);
|
||||
}
|
||||
|
||||
|
||||
static void sh4_timer_callback(int param)
|
||||
{
|
||||
int which = param;
|
||||
m_cpu_off = 0; //dink
|
||||
switch (which)
|
||||
{
|
||||
case 0:
|
||||
m_SH4_TCNT0 = m_SH4_TCOR0;
|
||||
break;
|
||||
|
||||
case 1:
|
||||
m_SH4_TCNT1 = m_SH4_TCOR1;
|
||||
break;
|
||||
|
||||
case 2:
|
||||
m_SH4_TCNT2 = m_SH4_TCOR2;
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
sh4_timer_recompute(which);
|
||||
|
||||
switch (which)
|
||||
{
|
||||
case 0:
|
||||
m_SH4_TCR0 |= 0x100;
|
||||
break;
|
||||
|
||||
case 1:
|
||||
m_SH4_TCR1 |= 0x100;
|
||||
break;
|
||||
|
||||
case 2:
|
||||
m_SH4_TCR2 |= 0x100;
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
switch (which)
|
||||
{
|
||||
case 0:
|
||||
if (m_SH4_TCR0 & 0x20)
|
||||
{
|
||||
sh4_exception_request(SH4_INTC_TUNI0);
|
||||
// logerror("SH4_INTC_TUNI0 requested\n");
|
||||
}
|
||||
break;
|
||||
|
||||
case 1:
|
||||
if (m_SH4_TCR1 & 0x20)
|
||||
{
|
||||
sh4_exception_request(SH4_INTC_TUNI1);
|
||||
// logerror("SH4_INTC_TUNI1 requested\n");
|
||||
}
|
||||
break;
|
||||
|
||||
case 2:
|
||||
if (m_SH4_TCR2 & 0x20)
|
||||
{
|
||||
sh4_exception_request(SH4_INTC_TUNI2);
|
||||
// logerror("SH4_INTC_TUNI2 requested\n");
|
||||
}
|
||||
break;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static UINT32 sh4_handle_tcnt0_addr_r(UINT32 mem_mask)
|
||||
{
|
||||
if (m_SH4_TSTR & 1)
|
||||
return compute_ticks_timer(0, m_pm_clock, tcnt_div[m_SH4_TCR0 & 7]);
|
||||
else
|
||||
return m_SH4_TCNT0;
|
||||
}
|
||||
|
||||
static UINT32 sh4_handle_tcnt1_addr_r(UINT32 mem_mask)
|
||||
{
|
||||
if (m_SH4_TSTR & 2)
|
||||
return compute_ticks_timer(1, m_pm_clock, tcnt_div[m_SH4_TCR1 & 7]);
|
||||
else
|
||||
return m_SH4_TCNT1;
|
||||
}
|
||||
|
||||
static UINT32 sh4_handle_tcnt2_addr_r(UINT32 mem_mask)
|
||||
{
|
||||
if (m_SH4_TSTR & 4)
|
||||
return compute_ticks_timer(2, m_pm_clock, tcnt_div[m_SH4_TCR2 & 7]);
|
||||
else
|
||||
return m_SH4_TCNT2;
|
||||
}
|
||||
|
||||
static UINT32 sh4_handle_tcor0_addr_r(UINT32 mem_mask)
|
||||
{
|
||||
return m_SH4_TCOR0;
|
||||
}
|
||||
|
||||
static UINT32 sh4_handle_tcor1_addr_r(UINT32 mem_mask)
|
||||
{
|
||||
return m_SH4_TCOR1;
|
||||
}
|
||||
|
||||
static UINT32 sh4_handle_tcor2_addr_r(UINT32 mem_mask)
|
||||
{
|
||||
return m_SH4_TCOR2;
|
||||
}
|
||||
|
||||
static UINT32 sh4_handle_tcr0_addr_r(UINT32 mem_mask)
|
||||
{
|
||||
return m_SH4_TCR0;
|
||||
}
|
||||
|
||||
static UINT32 sh4_handle_tcr1_addr_r(UINT32 mem_mask)
|
||||
{
|
||||
return m_SH4_TCR1;
|
||||
}
|
||||
|
||||
static UINT32 sh4_handle_tcr2_addr_r(UINT32 mem_mask)
|
||||
{
|
||||
return m_SH4_TCR2;
|
||||
}
|
||||
|
||||
static UINT32 sh4_handle_tstr_addr_r(UINT32 mem_mask)
|
||||
{
|
||||
return m_SH4_TSTR;
|
||||
}
|
||||
|
||||
static UINT32 sh4_handle_tocr_addr_r(UINT32 mem_mask)
|
||||
{
|
||||
return m_SH4_TOCR;
|
||||
}
|
||||
|
||||
static UINT32 sh4_handle_tcpr2_addr_r(UINT32 mem_mask)
|
||||
{
|
||||
return m_SH4_TCPR2;
|
||||
}
|
||||
|
||||
|
||||
static void sh4_handle_tstr_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
UINT32 old2 = m_SH4_TSTR;
|
||||
COMBINE_DATA(&m_SH4_TSTR);
|
||||
|
||||
if (old2 & 1)
|
||||
m_SH4_TCNT0 = compute_ticks_timer(0, m_pm_clock, tcnt_div[m_SH4_TCR0 & 7]);
|
||||
if ((m_SH4_TSTR & 1) == 0) {
|
||||
m_timer[0].stop();
|
||||
} else
|
||||
sh4_timer_recompute(0);
|
||||
|
||||
if (old2 & 2)
|
||||
m_SH4_TCNT1 = compute_ticks_timer(1, m_pm_clock, tcnt_div[m_SH4_TCR1 & 7]);
|
||||
if ((m_SH4_TSTR & 2) == 0) {
|
||||
m_timer[1].stop();
|
||||
} else
|
||||
sh4_timer_recompute(1);
|
||||
|
||||
if (old2 & 4)
|
||||
m_SH4_TCNT2 = compute_ticks_timer(2, m_pm_clock, tcnt_div[m_SH4_TCR2 & 7]);
|
||||
if ((m_SH4_TSTR & 4) == 0) {
|
||||
m_timer[2].stop();
|
||||
} else
|
||||
sh4_timer_recompute(2);
|
||||
}
|
||||
|
||||
static void sh4_handle_tcr0_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
UINT32 old2 = m_SH4_TCR0;
|
||||
COMBINE_DATA(&m_SH4_TCR0);
|
||||
if (m_SH4_TSTR & 1)
|
||||
{
|
||||
m_SH4_TCNT0 = compute_ticks_timer(0, m_pm_clock, tcnt_div[old2 & 7]);
|
||||
sh4_timer_recompute(0);
|
||||
}
|
||||
if (!(m_SH4_TCR0 & 0x20) || !(m_SH4_TCR0 & 0x100))
|
||||
sh4_exception_unrequest(SH4_INTC_TUNI0);
|
||||
}
|
||||
|
||||
static void sh4_handle_tcr1_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
UINT32 old2 = m_SH4_TCR1;
|
||||
COMBINE_DATA(&m_SH4_TCR1);
|
||||
if (m_SH4_TSTR & 2)
|
||||
{
|
||||
m_SH4_TCNT1 = compute_ticks_timer(1, m_pm_clock, tcnt_div[old2 & 7]);
|
||||
sh4_timer_recompute(1);
|
||||
}
|
||||
if (!(m_SH4_TCR1 & 0x20) || !(m_SH4_TCR1 & 0x100))
|
||||
sh4_exception_unrequest(SH4_INTC_TUNI1);
|
||||
}
|
||||
|
||||
static void sh4_handle_tcr2_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
UINT32 old2 = m_SH4_TCR2;
|
||||
COMBINE_DATA(&m_SH4_TCR2);
|
||||
if (m_SH4_TSTR & 4)
|
||||
{
|
||||
m_SH4_TCNT2 = compute_ticks_timer(2, m_pm_clock, tcnt_div[old2 & 7]);
|
||||
sh4_timer_recompute(2);
|
||||
}
|
||||
if (!(m_SH4_TCR2 & 0x20) || !(m_SH4_TCR2 & 0x100))
|
||||
sh4_exception_unrequest(SH4_INTC_TUNI2);
|
||||
}
|
||||
|
||||
static void sh4_handle_tcor0_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_TCOR0);
|
||||
if (m_SH4_TSTR & 1)
|
||||
{
|
||||
m_SH4_TCNT0 = compute_ticks_timer(0, m_pm_clock, tcnt_div[m_SH4_TCR0 & 7]);
|
||||
sh4_timer_recompute(0);
|
||||
}
|
||||
}
|
||||
|
||||
static void sh4_handle_tcor1_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_TCOR1);
|
||||
if (m_SH4_TSTR & 2)
|
||||
{
|
||||
m_SH4_TCNT1 = compute_ticks_timer(1, m_pm_clock, tcnt_div[m_SH4_TCR1 & 7]);
|
||||
sh4_timer_recompute(1);
|
||||
}
|
||||
}
|
||||
|
||||
static void sh4_handle_tcor2_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_TCOR2);
|
||||
if (m_SH4_TSTR & 4)
|
||||
{
|
||||
m_SH4_TCNT2 = compute_ticks_timer(2, m_pm_clock, tcnt_div[m_SH4_TCR2 & 7]);
|
||||
sh4_timer_recompute(2);
|
||||
}
|
||||
}
|
||||
|
||||
static void sh4_handle_tcnt0_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_TCNT0);
|
||||
if (m_SH4_TSTR & 1)
|
||||
sh4_timer_recompute(0);
|
||||
}
|
||||
|
||||
static void sh4_handle_tcnt1_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_TCNT1);
|
||||
if (m_SH4_TSTR & 2)
|
||||
sh4_timer_recompute(1);
|
||||
}
|
||||
|
||||
static void sh4_handle_tcnt2_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_TCNT2);
|
||||
if (m_SH4_TSTR & 4)
|
||||
sh4_timer_recompute(2);
|
||||
}
|
||||
|
||||
static void sh4_handle_tocr_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_TOCR);
|
||||
}
|
||||
|
||||
static void sh4_handle_tcpr2_addr_w(UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_SH4_TCPR2);
|
||||
}
|
||||
Loading…
Reference in New Issue