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GPU: Page align VRAM storage on Apple Silicon

This commit is contained in:
Stenzek 2024-11-10 14:02:03 +10:00
parent 2bf0838634
commit 5b600789d6
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1 changed files with 7 additions and 2 deletions
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9
src/core/gpu.cpp
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@ -45,8 +45,13 @@ LOG_CHANNEL(GPU);
std::unique_ptr<GPU> g_gpu; std::unique_ptr<GPU> g_gpu;
// aligning VRAM to 4K is fine, since the ARM64 instructions compute 4K page aligned addresses // aligning VRAM to 4K is fine, since the ARM64 instructions compute 4K page aligned addresses
// TOOD: REMOVE ME // or it would be, except we want to import the memory for readbacks on metal..
alignas(4096) u16 g_vram[VRAM_SIZE / sizeof(u16)]; #ifdef DYNAMIC_HOST_PAGE_SIZE
#define VRAM_STORAGE_ALIGNMENT MIN_HOST_PAGE_SIZE
#else
#define VRAM_STORAGE_ALIGNMENT HOST_PAGE_SIZE
#endif
alignas(VRAM_STORAGE_ALIGNMENT) u16 g_vram[VRAM_SIZE / sizeof(u16)];
u16 g_gpu_clut[GPU_CLUT_SIZE]; u16 g_gpu_clut[GPU_CLUT_SIZE];
const GPU::GP0CommandHandlerTable GPU::s_GP0_command_handler_table = GPU::GenerateGP0CommandHandlerTable(); const GPU::GP0CommandHandlerTable GPU::s_GP0_command_handler_table = GPU::GenerateGP0CommandHandlerTable();