Commit Graph

85 Commits

Author SHA1 Message Date
Fiora 5088a2b4e2 x64Emitter: add BMI1/BMI2 support
TZCNT and LZCNT use a completely different encoding scheme, so they should
probably go in a separate patch.

Also add some tests.
2014-09-03 10:04:01 -07:00
Pierre Bourdon a79ced2fc2 x64Emitter: Make it clear for both SSE to int conv that X64 regs are expected 2014-09-02 09:55:47 +02:00
Pierre Bourdon c428c5999f x64Emitter: UNPCKLPS/HPS are now tested 2014-09-02 09:53:00 +02:00
Pierre Bourdon cc0b048c0b x64Emitter: Support FLD/FSTP with 80 bits operands 2014-09-02 09:52:59 +02:00
Pierre Bourdon 9c4daac3a4 x64Emitter: RDTSC now without a typo'd name 2014-09-02 09:52:04 +02:00
Pierre Bourdon 88af225070 x64Emitter: Remove a declared function that is never implemented 2014-09-02 09:52:04 +02:00
Lioncash ba4934b75e Common: Clean up brace placements 2014-08-30 18:06:35 -04:00
Fiora f9d4ff0d5d x64Emitter: add support for some missing CVT instructions 2014-08-27 20:15:42 -07:00
Tillmann Karras 80be585fef x64Emitter: remove redundant "Gen::" 2014-08-20 02:56:07 +02:00
Tillmann Karras a363f4fa3e x64Emitter: make 'packed' parameter a bool 2014-08-20 02:54:30 +02:00
Fiora 802b28daf9 x64Emitter: refactor to support longer opcodes
Also add some new SSE4 opcodes.
2014-08-17 04:48:17 -07:00
Ryan Houdek 0c24e1dcf2 Remove the rest of x86_32 support from Common. 2014-08-03 13:49:46 -05:00
Tillmann Karras 6df48ed432 x64Emitter: add CVTTPD2DQ 2014-07-15 23:53:56 +02:00
Tillmann Karras f8280401f6 x64Emitter: J_CC: use 32 bit offset automatically 2014-06-03 23:08:58 +02:00
Tillmann Karras e659f5ac58 JitBackpatch: fix NOP padding
The new NOP emitter breaks when called with a negative count. As it
turns out, it did happen when deoptimizing 8 bit MOVs because they are
only 4 bytes long and need no BSWAP.
2014-04-30 15:26:11 +02:00
Tillmann Karras 957649b7af Optimize NOPs 2014-04-23 21:15:09 +02:00
Pierre Bourdon b2597739ff x64Emitter: Add the MOVBE instruction. 2014-04-11 23:33:21 +02:00
Ryan Houdek 87d106d65c Remove dumb CodeBlock duplication in the emitters.
Fixes issue 6990.
This uses a bit of templating to remove the duplicate code that is the CodeBlocks in each emitter headers.
No actual functionality change in this.
2014-04-09 13:53:43 -05:00
Pierre Bourdon 664c8d30a0 Remove all trailing whitespaces from our codebase. 2014-03-29 11:05:44 +01:00
Tillmann Karras d802d39281 clang-modernize -use-nullptr
and s/\bNULL\b/nullptr/g for *.cpp/h/mm files not compiled on my machine
2014-03-09 21:14:26 +01:00
Pierre Bourdon edba8096bf x64Emitter: Add functions to call a C++ std::function from JITed code 2014-03-08 23:32:43 +01:00
Pierre Bourdon 9869c53859 x64ABI: Add two more CallFunction functions (for additional parameter types). 2014-03-08 23:32:43 +01:00
Pierre Bourdon 6d6abfa61f x64Emitter: Allow const pointers where it makes sense to do so. 2014-03-08 23:32:43 +01:00
Ryan Houdek 4f02132f93 Make our architecture defines less stupid.
Our defines were never clear between what meant 64bit or x86_64
This makes a clear cut between bitness and architecture.
This commit also has the side effect of bringing up aarch64 compiling support.
2014-03-04 09:36:59 -06:00
Pierre Bourdon 311caef094 Merge pull request #25 from Tilka/ppc_fp
Fix non-IEEE mode
2014-02-23 04:15:37 +01:00
Pierre Bourdon 83b7bb64aa Make Common/ mostly IWYU clean (and fix errors in rest of the project detected by this change). 2014-02-22 23:37:29 +01:00
Lioncash 2afe215271 Convert all includes to relative paths. 2014-02-18 02:19:10 -05:00
Lioncash 3fd87a7636 Second and final pass of clearing out tabs. 2014-02-17 02:19:41 -05:00
Scott Mansell 1eb8168488 x64Emitter: Add the xmm, xmm form of PSRLQ instruction. 2014-02-12 23:12:16 +01:00
Tillmann Karras db196d8c5b Jit64[IL]: fix float conversions
Floating-point is complicated...

Some background: Denormals are floats that are too close to zero to be
stored in a normalized way (their exponent would need more bits). Since
they are stored unnormalized, they are hard to work with, even in
hardware.  That's why both PowerPC and SSE can be configured to operate
in faster but non-standard-conpliant modes in which these numbers are
simply rounded ('flushed') to zero.

Internally, we do the same as the PowerPC CPU and store all floats in
double format. This means that for loading and storing singles we need a
conversion. The PowerPC CPU does this in hardware. We previously did
this using CVTSS2SD/CVTSD2SS. Unfortunately, these instructions are
considered arithmetic and therefore flush denormals to zero if non-IEEE
mode is active. This normally wouldn't be a problem since the next
arithmetic floating-point instruction would do the same anyway but as it
turns out some games actually use floating-point instructions for
copying arbitrary data.

My idea for fixing this problem was to use x87 instructions since the
x87 FPU never supported flush-to-zero and thus doesn't mangle denormals.
However, there is one more problem to deal with: SNaNs are automatically
converted to QNaNs (by setting the most-significant bit of the
fraction). I opted to fix this by manually resetting the QNaN bit of all
values with all-1s exponent.
2014-02-12 23:12:15 +01:00
Tillmann Karras c25c4a6e20 x64: add support for some x87 instructions 2014-02-12 22:45:01 +01:00
Tillmann Karras 3218f6cca8 x64: drop instructions that don't exist
These instructions don't exist in hardware although I agree that they
would be useful for our purposes ;)
2014-02-11 05:22:53 +01:00
lioncash d2038049f5 Replace all include guard ifdefs with "#pragma once" 2014-02-10 18:07:16 -05:00
Lioncash 40182a48a5 Cleanup enum indentations. 2014-02-09 16:16:10 -05:00
Jasper St. Pierre 34692ab826 Remove unnecessary Src/ folders 2013-12-31 14:03:19 -05:00