[AArch64] Fix ADDS/SUBS emitter functions.
These weren't emitting the flag bit. So they were regular ADD and SUB emitters.
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@ -799,7 +799,7 @@ void ARM64XEmitter::ADD(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ArithOption Optio
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void ARM64XEmitter::ADDS(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm)
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{
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ADD(Rd, Rn, Rm, ArithOption(Rd));
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EncodeArithmeticInst(0, true, Rd, Rn, Rm, ArithOption(Rd));
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}
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void ARM64XEmitter::ADDS(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ArithOption Option)
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@ -819,7 +819,7 @@ void ARM64XEmitter::SUB(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ArithOption Optio
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void ARM64XEmitter::SUBS(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm)
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{
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SUB(Rd, Rn, Rm, ArithOption(Rd));
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EncodeArithmeticInst(1, false, Rd, Rn, Rm, ArithOption(Rd));
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}
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void ARM64XEmitter::SUBS(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ArithOption Option)
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