From f4f59ea71ed69797834eb2ba6e53516cf2a6ac44 Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Wed, 7 Jan 2015 12:56:45 -0600 Subject: [PATCH] [AArch64] Fix ADDS/SUBS emitter functions. These weren't emitting the flag bit. So they were regular ADD and SUB emitters. --- Source/Core/Common/Arm64Emitter.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Source/Core/Common/Arm64Emitter.cpp b/Source/Core/Common/Arm64Emitter.cpp index 3d1c9801be..f07ce26bc7 100644 --- a/Source/Core/Common/Arm64Emitter.cpp +++ b/Source/Core/Common/Arm64Emitter.cpp @@ -799,7 +799,7 @@ void ARM64XEmitter::ADD(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ArithOption Optio void ARM64XEmitter::ADDS(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { - ADD(Rd, Rn, Rm, ArithOption(Rd)); + EncodeArithmeticInst(0, true, Rd, Rn, Rm, ArithOption(Rd)); } void ARM64XEmitter::ADDS(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ArithOption Option) @@ -819,7 +819,7 @@ void ARM64XEmitter::SUB(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ArithOption Optio void ARM64XEmitter::SUBS(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) { - SUB(Rd, Rn, Rm, ArithOption(Rd)); + EncodeArithmeticInst(1, false, Rd, Rn, Rm, ArithOption(Rd)); } void ARM64XEmitter::SUBS(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ArithOption Option)