Merge pull request #8551 from Sintendo/jit64addx
Jit64: addx optimizations
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commit
f17f03ea3c
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@ -1330,18 +1330,29 @@ void Jit64::addx(UGeckoInstruction inst)
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RCX64Reg Rd = gpr.Bind(d, RCMode::Write);
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RegCache::Realize(Ra, Rb, Rd);
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if (Ra.IsSimpleReg() && Rb.IsSimpleReg() && !inst.OE)
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if (d == a)
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{
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LEA(32, Rd, MRegSum(Ra.GetSimpleReg(), Rb.GetSimpleReg()));
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ADD(32, Rd, Rb);
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}
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else if (d == b)
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{
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ADD(32, Rd, Ra);
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}
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else if (Ra.IsSimpleReg() && Rb.IsSimpleReg() && !inst.OE)
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{
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LEA(32, Rd, MRegSum(Ra.GetSimpleReg(), Rb.GetSimpleReg()));
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}
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else if (Ra.IsSimpleReg() && Rb.IsImm() && !inst.OE)
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{
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LEA(32, Rd, MDisp(Ra.GetSimpleReg(), Rb.SImm32()));
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}
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else if (Rb.IsSimpleReg() && Ra.IsImm() && !inst.OE)
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{
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LEA(32, Rd, MDisp(Rb.GetSimpleReg(), Ra.SImm32()));
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}
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else
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{
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if (d != a)
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MOV(32, Rd, Ra);
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MOV(32, Rd, Ra);
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ADD(32, Rd, Rb);
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}
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if (inst.OE)
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