Merge pull request #8133 from Sintendo/mov64imm32
x64Emitter: Emit shorter MOVs for 32-bit immediates
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commit
6e18dfb600
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@ -1591,8 +1591,9 @@ void XEmitter::XOR(int bits, const OpArg& a1, const OpArg& a2)
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}
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void XEmitter::MOV(int bits, const OpArg& a1, const OpArg& a2)
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{
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if (bits == 64 && a1.IsSimpleReg() && a2.scale == SCALE_IMM64 &&
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a2.offset == static_cast<u32>(a2.offset))
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if (bits == 64 && a1.IsSimpleReg() &&
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((a2.scale == SCALE_IMM64 && a2.offset == static_cast<u32>(a2.offset)) ||
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(a2.scale == SCALE_IMM32 && static_cast<s32>(a2.offset) >= 0)))
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{
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WriteNormalOp(32, NormalOp::MOV, a1, a2.AsImm32());
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return;
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@ -554,7 +554,7 @@ TWO_OP_ARITH_TEST(OR)
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TWO_OP_ARITH_TEST(XOR)
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TWO_OP_ARITH_TEST(MOV)
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TEST_F(x64EmitterTest, MOV_Imm64)
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TEST_F(x64EmitterTest, MOV64)
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{
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for (size_t i = 0; i < reg64names.size(); i++)
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{
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@ -569,6 +569,10 @@ TEST_F(x64EmitterTest, MOV_Imm64)
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emitter->MOV(64, R(reg64names[i].reg), Imm64(0xDEADBEEF));
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EXPECT_EQ(emitter->GetCodePtr(), code_buffer + 5 + (i > 7));
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ExpectDisassembly("mov " + reg32names[i].name + ", 0xdeadbeef");
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emitter->MOV(64, R(reg64names[i].reg), Imm32(0x7FFFFFFF));
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EXPECT_EQ(emitter->GetCodePtr(), code_buffer + 5 + (i > 7));
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ExpectDisassembly("mov " + reg32names[i].name + ", 0x7fffffff");
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}
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}
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