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Move MOVBE wrappers directly into XEmitter class

This commit is contained in:
Tillmann Karras 2015-01-14 23:31:00 +01:00
parent e82e9f97f5
commit e80b657cf4
4 changed files with 29 additions and 29 deletions
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27
Source/Core/Common/x64Emitter.cpp
View File

@ -890,6 +890,33 @@ void XEmitter::WriteMOVBE(int bits, u8 op, X64Reg reg, OpArg arg)
void XEmitter::MOVBE(int bits, X64Reg dest, const OpArg& src) {WriteMOVBE(bits, 0xF0, dest, src);}
void XEmitter::MOVBE(int bits, const OpArg& dest, X64Reg src) {WriteMOVBE(bits, 0xF1, src, dest);}
void XEmitter::LoadAndSwap(int size, Gen::X64Reg dst, const Gen::OpArg& src)
{
if (cpu_info.bMOVBE)
{
MOVBE(size, dst, src);
}
else
{
MOV(size, R(dst), src);
BSWAP(size, dst);
}
}
void XEmitter::SwapAndStore(int size, const Gen::OpArg& dst, Gen::X64Reg src)
{
if (cpu_info.bMOVBE)
{
MOVBE(size, dst, src);
}
else
{
BSWAP(size, src);
MOV(size, dst, R(src));
}
}
void XEmitter::LEA(int bits, X64Reg dest, OpArg src)
{
_assert_msg_(DYNA_REC, !src.IsImm(), "LEA - Imm argument");

2
Source/Core/Common/x64Emitter.h
View File

@ -479,6 +479,8 @@ public:
// Available only on Atom or >= Haswell so far. Test with cpu_info.bMOVBE.
void MOVBE(int bits, X64Reg dest, const OpArg& src);
void MOVBE(int bits, const OpArg& dest, X64Reg src);
void LoadAndSwap(int size, Gen::X64Reg dst, const Gen::OpArg& src);
void SwapAndStore(int size, const Gen::OpArg& dst, Gen::X64Reg src);
// Available only on AMD >= Phenom or Intel >= Haswell
void LZCNT(int bits, X64Reg dest, OpArg src);

26
Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp
View File

@ -23,32 +23,6 @@ void EmuCodeBlock::MemoryExceptionCheck()
}
}
void EmuCodeBlock::LoadAndSwap(int size, Gen::X64Reg dst, const Gen::OpArg& src)
{
if (cpu_info.bMOVBE)
{
MOVBE(size, dst, src);
}
else
{
MOV(size, R(dst), src);
BSWAP(size, dst);
}
}
void EmuCodeBlock::SwapAndStore(int size, const Gen::OpArg& dst, Gen::X64Reg src)
{
if (cpu_info.bMOVBE)
{
MOVBE(size, dst, src);
}
else
{
BSWAP(size, src);
MOV(size, dst, R(src));
}
}
void EmuCodeBlock::UnsafeLoadRegToReg(X64Reg reg_addr, X64Reg reg_value, int accessSize, s32 offset, bool signExtend)
{
MOVZX(32, accessSize, reg_value, MComplex(RMEM, reg_addr, SCALE_1, offset));

3
Source/Core/Core/PowerPC/JitCommon/Jit_Util.h
View File

@ -68,9 +68,6 @@ public:
SetCodePtr(nearcode);
}
void LoadAndSwap(int size, Gen::X64Reg dst, const Gen::OpArg& src);
void SwapAndStore(int size, const Gen::OpArg& dst, Gen::X64Reg src);
Gen::FixupBranch CheckIfSafeAddress(Gen::OpArg reg_value, Gen::X64Reg reg_addr, BitSet32 registers_in_use, u32 mem_mask);
void UnsafeLoadRegToReg(Gen::X64Reg reg_addr, Gen::X64Reg reg_value, int accessSize, s32 offset = 0, bool signExtend = false);
void UnsafeLoadRegToRegNoSwap(Gen::X64Reg reg_addr, Gen::X64Reg reg_value, int accessSize, s32 offset, bool signExtend = false);