ShuriZma
/
dolphin
mirror of https://github.com/dolphin-emu/dolphin.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

[ARM] Missed flushing our register caches in mtmsr. This would cause a buttload of problems, including the suspected ori being wrong issue. So flush caches and reenable ori.

This commit is contained in:
Ryan Houdek 2013-08-05 02:15:25 +00:00
parent bafed349e8
commit db93b516b0
2 changed files with 6 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Integer.cpp
View File

@ -123,12 +123,11 @@ void JitArm::mulli(UGeckoInstruction inst)
MUL(RD, RA, rA); MUL(RD, RA, rA);
gpr.Unlock(rA); gpr.Unlock(rA);
} }
// Wrong 04-08-2013. Breaks Wind Waker booting
void JitArm::ori(UGeckoInstruction inst) void JitArm::ori(UGeckoInstruction inst)
{ {
INSTRUCTION_START INSTRUCTION_START
JITDISABLE(Integer) JITDISABLE(Integer)
Default(inst); return;
ARMReg RA = gpr.R(inst.RA); ARMReg RA = gpr.R(inst.RA);
ARMReg RS = gpr.R(inst.RS); ARMReg RS = gpr.R(inst.RS);
@ -283,7 +282,7 @@ void JitArm::cmpli(UGeckoInstruction inst)
gpr.Unlock(rA); gpr.Unlock(rA);
} }
// Wrong - 27/10/2012
void JitArm::negx(UGeckoInstruction inst) void JitArm::negx(UGeckoInstruction inst)
{ {
INSTRUCTION_START INSTRUCTION_START

4
Source/Core/Core/Src/PowerPC/JitArm32/JitArm_SystemRegisters.cpp
View File

@ -105,6 +105,10 @@ void JitArm::mtmsr(UGeckoInstruction inst)
//JITDISABLE(SystemRegisters) //JITDISABLE(SystemRegisters)
STR(gpr.R(inst.RS), R9, PPCSTATE_OFF(msr)); STR(gpr.R(inst.RS), R9, PPCSTATE_OFF(msr));
gpr.Flush();
fpr.Flush();
WriteExit(js.compilerPC + 4, 0); WriteExit(js.compilerPC + 4, 0);
} }
void JitArm::mfmsr(UGeckoInstruction inst) void JitArm::mfmsr(UGeckoInstruction inst)