ShuriZma
/
dolphin
mirror of https://github.com/dolphin-emu/dolphin.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Merge pull request #861 from comex/warnings 

Fix warnings for OS X
This commit is contained in:
comex 2014-08-24 16:15:58 -04:00
parent b458d1a367 cf01f47b52
commit a7752f49be
9 changed files with 35 additions and 58 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
Externals/wxWidgets3/CMakeLists.txt vendored
View File

@ -901,12 +901,8 @@ else()
endif() endif()
add_definitions(-DWXBUILDING) add_definitions(-DWXBUILDING)
add_definitions(-Wno-deprecated-declarations) # wxWidgets warnings are not our problem.
add_definitions(-Wno-shadow) add_definitions(-w)
add_definitions(-Wno-parentheses-equality)
add_definitions(-Wno-self-assign)
add_definitions(-Wno-null-conversion)
add_definitions(-Wno-sign-compare)
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=gnu++98") set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=gnu++98")
enable_precompiled_headers(include/wx/wxprec.h src/common/dummy.cpp SRCS) enable_precompiled_headers(include/wx/wxprec.h src/common/dummy.cpp SRCS)

3
Source/Core/Core/Core.cpp
View File

@ -115,9 +115,6 @@ std::string StopMessage(bool bMainThread, std::string Message)
void DisplayMessage(const std::string& message, int time_in_ms) void DisplayMessage(const std::string& message, int time_in_ms)
{ {
SCoreStartupParameter& _CoreParameter =
SConfig::GetInstance().m_LocalCoreStartupParameter;
// Actually displaying non-ASCII could cause things to go pear-shaped // Actually displaying non-ASCII could cause things to go pear-shaped
for (const char& c : message) for (const char& c : message)
{ {

38
Source/Core/Core/DSP/Jit/DSPJitRegCache.cpp
View File

@ -284,26 +284,26 @@ void DSPJitRegCache::flushRegs(DSPJitRegCache &cache, bool emit)
{ {
_assert_msg_(DSPLLE, _assert_msg_(DSPLLE,
xregs[i].guest_reg == cache.xregs[i].guest_reg, xregs[i].guest_reg == cache.xregs[i].guest_reg,
"cache and current xreg guest_reg mismatch for %" PRIx64, i); "cache and current xreg guest_reg mismatch for %u", (unsigned int) i);
} }
for (i = 0; i <= DSP_REG_MAX_MEM_BACKED; i++) for (i = 0; i <= DSP_REG_MAX_MEM_BACKED; i++)
{ {
_assert_msg_(DSPLLE, _assert_msg_(DSPLLE,
regs[i].loc.IsImm() == cache.regs[i].loc.IsImm(), regs[i].loc.IsImm() == cache.regs[i].loc.IsImm(),
"cache and current reg loc mismatch for %zi", i); "cache and current reg loc mismatch for %i", (unsigned int) i);
_assert_msg_(DSPLLE, _assert_msg_(DSPLLE,
regs[i].loc.GetSimpleReg() == cache.regs[i].loc.GetSimpleReg(), regs[i].loc.GetSimpleReg() == cache.regs[i].loc.GetSimpleReg(),
"cache and current reg loc mismatch for %zi", i); "cache and current reg loc mismatch for %i", (unsigned int) i);
_assert_msg_(DSPLLE, _assert_msg_(DSPLLE,
regs[i].dirty || !cache.regs[i].dirty, regs[i].dirty || !cache.regs[i].dirty,
"cache and current reg dirty mismatch for %zi", i); "cache and current reg dirty mismatch for %i", (unsigned int) i);
_assert_msg_(DSPLLE, _assert_msg_(DSPLLE,
regs[i].used == cache.regs[i].used, regs[i].used == cache.regs[i].used,
"cache and current reg used mismatch for %zi", i); "cache and current reg used mismatch for %i", (unsigned int) i);
_assert_msg_(DSPLLE, _assert_msg_(DSPLLE,
regs[i].shift == cache.regs[i].shift, regs[i].shift == cache.regs[i].shift,
"cache and current reg shift mismatch for %zi", i); "cache and current reg shift mismatch for %i", (unsigned int) i);
} }
use_ctr = cache.use_ctr; use_ctr = cache.use_ctr;
@ -560,11 +560,11 @@ X64Reg DSPJitRegCache::makeABICallSafe(X64Reg reg)
void DSPJitRegCache::movToHostReg(size_t reg, X64Reg host_reg, bool load) void DSPJitRegCache::movToHostReg(size_t reg, X64Reg host_reg, bool load)
{ {
_assert_msg_(DSPLLE, reg <= DSP_REG_MAX_MEM_BACKED, _assert_msg_(DSPLLE, reg <= DSP_REG_MAX_MEM_BACKED,
"bad register name %" PRIx64, reg); "bad register name %u", (unsigned int) reg);
_assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE, _assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE,
"register %" PRIx64 " is proxy for %d", reg, regs[reg].parentReg); "register %u is proxy for %d", (unsigned int) reg, regs[reg].parentReg);
_assert_msg_(DSPLLE, !regs[reg].used, _assert_msg_(DSPLLE, !regs[reg].used,
"moving to host reg in use guest reg %" PRIx64, reg); "moving to host reg in use guest reg %u", (unsigned int) reg);
X64Reg old_reg = regs[reg].loc.GetSimpleReg(); X64Reg old_reg = regs[reg].loc.GetSimpleReg();
if (old_reg == host_reg) if (old_reg == host_reg)
{ {
@ -606,11 +606,11 @@ void DSPJitRegCache::movToHostReg(size_t reg, X64Reg host_reg, bool load)
void DSPJitRegCache::movToHostReg(size_t reg, bool load) void DSPJitRegCache::movToHostReg(size_t reg, bool load)
{ {
_assert_msg_(DSPLLE, reg <= DSP_REG_MAX_MEM_BACKED, _assert_msg_(DSPLLE, reg <= DSP_REG_MAX_MEM_BACKED,
"bad register name %" PRIx64, reg); "bad register name %u", (unsigned int) reg);
_assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE, _assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE,
"register %" PRIx64 " is proxy for %d", reg, regs[reg].parentReg); "register %u is proxy for %d", (unsigned int) reg, regs[reg].parentReg);
_assert_msg_(DSPLLE, !regs[reg].used, _assert_msg_(DSPLLE, !regs[reg].used,
"moving to host reg in use guest reg %" PRIx64, reg); "moving to host reg in use guest reg %u", (unsigned int) reg);
if (regs[reg].loc.IsSimpleReg()) if (regs[reg].loc.IsSimpleReg())
{ {
@ -638,13 +638,13 @@ void DSPJitRegCache::movToHostReg(size_t reg, bool load)
void DSPJitRegCache::rotateHostReg(size_t reg, int shift, bool emit) void DSPJitRegCache::rotateHostReg(size_t reg, int shift, bool emit)
{ {
_assert_msg_(DSPLLE, reg <= DSP_REG_MAX_MEM_BACKED, _assert_msg_(DSPLLE, reg <= DSP_REG_MAX_MEM_BACKED,
"bad register name %" PRIx64, reg); "bad register name %u", (unsigned int) reg);
_assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE, _assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE,
"register %" PRIx64 " is proxy for %d", reg, regs[reg].parentReg); "register %u is proxy for %d", (unsigned int) reg, regs[reg].parentReg);
_assert_msg_(DSPLLE, regs[reg].loc.IsSimpleReg(), _assert_msg_(DSPLLE, regs[reg].loc.IsSimpleReg(),
"register %" PRIx64 " is not a simple reg", reg); "register %u is not a simple reg", (unsigned int) reg);
_assert_msg_(DSPLLE, !regs[reg].used, _assert_msg_(DSPLLE, !regs[reg].used,
"rotating in use guest reg %" PRIx64, reg); "rotating in use guest reg %u", (unsigned int) reg);
if (shift > regs[reg].shift && emit) if (shift > regs[reg].shift && emit)
{ {
@ -682,11 +682,11 @@ void DSPJitRegCache::rotateHostReg(size_t reg, int shift, bool emit)
void DSPJitRegCache::movToMemory(size_t reg) void DSPJitRegCache::movToMemory(size_t reg)
{ {
_assert_msg_(DSPLLE, reg <= DSP_REG_MAX_MEM_BACKED, _assert_msg_(DSPLLE, reg <= DSP_REG_MAX_MEM_BACKED,
"bad register name %" PRIx64, reg); "bad register name %u", (unsigned int) reg);
_assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE, _assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE,
"register %" PRIx64 " is proxy for %d", reg, regs[reg].parentReg); "register %u is proxy for %d", (unsigned int) reg, regs[reg].parentReg);
_assert_msg_(DSPLLE, !regs[reg].used, _assert_msg_(DSPLLE, !regs[reg].used,
"moving to memory in use guest reg %" PRIx64, reg); "moving to memory in use guest reg %u", (unsigned int) reg);
if (regs[reg].used) if (regs[reg].used)
{ {

2
Source/Core/Core/PowerPC/Interpreter/Interpreter.cpp
View File

@ -82,7 +82,7 @@ static void Trace(UGeckoInstruction& instCode)
} }
std::string ppc_inst = GekkoDisassembler::Disassemble(instCode.hex, PC); std::string ppc_inst = GekkoDisassembler::Disassemble(instCode.hex, PC);
DEBUG_LOG(POWERPC, "INTER PC: %08x SRR0: %08x SRR1: %08x CRval: %016lx FPSCR: %08x MSR: %08x LR: %08x %s %08x %s", PC, SRR0, SRR1, PowerPC::ppcState.cr_val[0], PowerPC::ppcState.fpscr, PowerPC::ppcState.msr, PowerPC::ppcState.spr[8], regs.c_str(), instCode.hex, ppc_inst.c_str()); DEBUG_LOG(POWERPC, "INTER PC: %08x SRR0: %08x SRR1: %08x CRval: %016lx FPSCR: %08x MSR: %08x LR: %08x %s %08x %s", PC, SRR0, SRR1, (unsigned long) PowerPC::ppcState.cr_val[0], PowerPC::ppcState.fpscr, PowerPC::ppcState.msr, PowerPC::ppcState.spr[8], regs.c_str(), instCode.hex, ppc_inst.c_str());
} }
int Interpreter::SingleStepInner(void) int Interpreter::SingleStepInner(void)

12
Source/Core/Core/PowerPC/Jit64/JitRegCache.cpp
View File

@ -311,7 +311,7 @@ void FPURegCache::LoadRegister(size_t preg, X64Reg newLoc)
{ {
if (!regs[preg].location.IsImm() && (regs[preg].location.offset & 0xF)) if (!regs[preg].location.IsImm() && (regs[preg].location.offset & 0xF))
{ {
PanicAlert("WARNING - misaligned fp register location %" PRIx64, preg); PanicAlert("WARNING - misaligned fp register location %u", (unsigned int) preg);
} }
emit->MOVAPD(newLoc, regs[preg].location); emit->MOVAPD(newLoc, regs[preg].location);
} }
@ -323,17 +323,17 @@ void FPURegCache::StoreRegister(size_t preg, OpArg newLoc)
void RegCache::Flush(FlushMode mode) void RegCache::Flush(FlushMode mode)
{ {
for (size_t i = 0; i < xregs.size(); i++) for (unsigned int i = 0; i < xregs.size(); i++)
{ {
if (xregs[i].locked) if (xregs[i].locked)
PanicAlert("Someone forgot to unlock X64 reg %" PRIx64, i); PanicAlert("Someone forgot to unlock X64 reg %u", i);
} }
for (size_t i = 0; i < regs.size(); i++) for (unsigned int i = 0; i < regs.size(); i++)
{ {
if (regs[i].locked) if (regs[i].locked)
{ {
PanicAlert("Someone forgot to unlock PPC reg %" PRIx64 " (X64 reg %i).", i, RX(i)); PanicAlert("Someone forgot to unlock PPC reg %u (X64 reg %i).", i, RX(i));
} }
if (regs[i].away) if (regs[i].away)
@ -344,7 +344,7 @@ void RegCache::Flush(FlushMode mode)
} }
else else
{ {
_assert_msg_(DYNA_REC,0,"Jit64 - Flush unhandled case, reg %" PRIx64 " PC: %08x", i, PC); _assert_msg_(DYNA_REC,0,"Jit64 - Flush unhandled case, reg %u PC: %08x", i, PC);
} }
} }
} }

2
Source/Core/Core/PowerPC/Jit64/JitRegCache.h
View File

@ -97,7 +97,7 @@ public:
if (IsBound(preg)) if (IsBound(preg))
return regs[preg].location.GetSimpleReg(); return regs[preg].location.GetSimpleReg();
PanicAlert("Not so simple - %" PRIx64, preg); PanicAlert("Not so simple - %u", (unsigned int) preg);
return Gen::INVALID_REG; return Gen::INVALID_REG;
} }
virtual Gen::OpArg GetDefaultLocation(size_t reg) const = 0; virtual Gen::OpArg GetDefaultLocation(size_t reg) const = 0;

7
Source/Core/Core/PowerPC/Jit64IL/JitIL.cpp
View File

@ -496,9 +496,10 @@ void JitIL::Trace()
#endif #endif
DEBUG_LOG(DYNA_REC, "JITIL PC: %08x SRR0: %08x SRR1: %08x CRval: %016lx%016lx%016lx%016lx%016lx%016lx%016lx%016lx FPSCR: %08x MSR: %08x LR: %08x %s %s", DEBUG_LOG(DYNA_REC, "JITIL PC: %08x SRR0: %08x SRR1: %08x CRval: %016lx%016lx%016lx%016lx%016lx%016lx%016lx%016lx FPSCR: %08x MSR: %08x LR: %08x %s %s",
PC, SRR0, SRR1, PowerPC::ppcState.cr_val[0], PowerPC::ppcState.cr_val[1], PowerPC::ppcState.cr_val[2], PowerPC::ppcState.cr_val[3], PC, SRR0, SRR1, (unsigned long) PowerPC::ppcState.cr_val[0], (unsigned long) PowerPC::ppcState.cr_val[1], (unsigned long) PowerPC::ppcState.cr_val[2],
PowerPC::ppcState.cr_val[4], PowerPC::ppcState.cr_val[5], PowerPC::ppcState.cr_val[6], PowerPC::ppcState.cr_val[7], PowerPC::ppcState.fpscr, (unsigned long) PowerPC::ppcState.cr_val[3], (unsigned long) PowerPC::ppcState.cr_val[4], (unsigned long) PowerPC::ppcState.cr_val[5],
PowerPC::ppcState.msr, PowerPC::ppcState.spr[8], regs.c_str(), fregs.c_str()); (unsigned long) PowerPC::ppcState.cr_val[6], (unsigned long) PowerPC::ppcState.cr_val[7], PowerPC::ppcState.fpscr, PowerPC::ppcState.msr,
PowerPC::ppcState.spr[8], regs.c_str(), fregs.c_str());
} }
void STACKALIGN JitIL::Jit(u32 em_address) void STACKALIGN JitIL::Jit(u32 em_address)

2
Source/Core/DolphinWX/VideoConfigDiag.cpp
View File

@ -154,6 +154,7 @@ static wxString cache_efb_copies_desc = wxTRANSLATE("Slightly speeds up EFB to R
static wxString shader_errors_desc = wxTRANSLATE("Usually if shader compilation fails, an error message is displayed.\nHowever, one may skip the popups to allow interruption free gameplay by checking this option.\n\nIf unsure, leave this unchecked."); static wxString shader_errors_desc = wxTRANSLATE("Usually if shader compilation fails, an error message is displayed.\nHowever, one may skip the popups to allow interruption free gameplay by checking this option.\n\nIf unsure, leave this unchecked.");
#if !defined(__APPLE__)
// Search for available resolutions - TODO: Move to Common? // Search for available resolutions - TODO: Move to Common?
static wxArrayString GetListOfResolutions() static wxArrayString GetListOfResolutions()
{ {
@ -214,6 +215,7 @@ static wxArrayString GetListOfResolutions()
#endif #endif
return retlist; return retlist;
} }
#endif
VideoConfigDiag::VideoConfigDiag(wxWindow* parent, const std::string &title, const std::string& _ininame) VideoConfigDiag::VideoConfigDiag(wxWindow* parent, const std::string &title, const std::string& _ininame)
: wxDialog(parent, -1, : wxDialog(parent, -1,

19
Source/Core/VideoBackends/Software/SWCommandProcessor.cpp
View File

@ -60,25 +60,6 @@ void DoState(PointerWrap &p)
p.DoArray(g_pVideoData,writePos); p.DoArray(g_pVideoData,writePos);
} }
// does it matter that there is no synchronization between threads during writes?
static inline void WriteLow (u32& _reg, u16 lowbits)
{
_reg = (_reg & 0xFFFF0000) | lowbits;
}
static inline void WriteHigh(u32& _reg, u16 highbits)
{
_reg = (_reg & 0x0000FFFF) | ((u32)highbits << 16);
}
static inline u16 ReadLow(u32 _reg)
{
return (u16)(_reg & 0xFFFF);
}
static inline u16 ReadHigh(u32 _reg)
{
return (u16)(_reg >> 16);
}
static void UpdateInterrupts_Wrapper(u64 userdata, int cyclesLate) static void UpdateInterrupts_Wrapper(u64 userdata, int cyclesLate)
{ {
UpdateInterrupts(userdata); UpdateInterrupts(userdata);