commit
a7752f49be
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@ -901,12 +901,8 @@ else()
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endif()
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add_definitions(-DWXBUILDING)
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add_definitions(-Wno-deprecated-declarations)
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add_definitions(-Wno-shadow)
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add_definitions(-Wno-parentheses-equality)
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add_definitions(-Wno-self-assign)
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add_definitions(-Wno-null-conversion)
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add_definitions(-Wno-sign-compare)
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# wxWidgets warnings are not our problem.
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add_definitions(-w)
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set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=gnu++98")
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enable_precompiled_headers(include/wx/wxprec.h src/common/dummy.cpp SRCS)
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@ -115,9 +115,6 @@ std::string StopMessage(bool bMainThread, std::string Message)
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void DisplayMessage(const std::string& message, int time_in_ms)
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{
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SCoreStartupParameter& _CoreParameter =
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SConfig::GetInstance().m_LocalCoreStartupParameter;
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// Actually displaying non-ASCII could cause things to go pear-shaped
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for (const char& c : message)
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{
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@ -284,26 +284,26 @@ void DSPJitRegCache::flushRegs(DSPJitRegCache &cache, bool emit)
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{
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_assert_msg_(DSPLLE,
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xregs[i].guest_reg == cache.xregs[i].guest_reg,
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"cache and current xreg guest_reg mismatch for %" PRIx64, i);
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"cache and current xreg guest_reg mismatch for %u", (unsigned int) i);
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}
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for (i = 0; i <= DSP_REG_MAX_MEM_BACKED; i++)
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{
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_assert_msg_(DSPLLE,
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regs[i].loc.IsImm() == cache.regs[i].loc.IsImm(),
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"cache and current reg loc mismatch for %zi", i);
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"cache and current reg loc mismatch for %i", (unsigned int) i);
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_assert_msg_(DSPLLE,
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regs[i].loc.GetSimpleReg() == cache.regs[i].loc.GetSimpleReg(),
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"cache and current reg loc mismatch for %zi", i);
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"cache and current reg loc mismatch for %i", (unsigned int) i);
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_assert_msg_(DSPLLE,
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regs[i].dirty || !cache.regs[i].dirty,
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"cache and current reg dirty mismatch for %zi", i);
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"cache and current reg dirty mismatch for %i", (unsigned int) i);
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_assert_msg_(DSPLLE,
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regs[i].used == cache.regs[i].used,
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"cache and current reg used mismatch for %zi", i);
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"cache and current reg used mismatch for %i", (unsigned int) i);
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_assert_msg_(DSPLLE,
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regs[i].shift == cache.regs[i].shift,
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"cache and current reg shift mismatch for %zi", i);
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"cache and current reg shift mismatch for %i", (unsigned int) i);
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}
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use_ctr = cache.use_ctr;
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@ -560,11 +560,11 @@ X64Reg DSPJitRegCache::makeABICallSafe(X64Reg reg)
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void DSPJitRegCache::movToHostReg(size_t reg, X64Reg host_reg, bool load)
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{
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_assert_msg_(DSPLLE, reg <= DSP_REG_MAX_MEM_BACKED,
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"bad register name %" PRIx64, reg);
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"bad register name %u", (unsigned int) reg);
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_assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE,
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"register %" PRIx64 " is proxy for %d", reg, regs[reg].parentReg);
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"register %u is proxy for %d", (unsigned int) reg, regs[reg].parentReg);
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_assert_msg_(DSPLLE, !regs[reg].used,
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"moving to host reg in use guest reg %" PRIx64, reg);
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"moving to host reg in use guest reg %u", (unsigned int) reg);
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X64Reg old_reg = regs[reg].loc.GetSimpleReg();
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if (old_reg == host_reg)
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{
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@ -606,11 +606,11 @@ void DSPJitRegCache::movToHostReg(size_t reg, X64Reg host_reg, bool load)
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void DSPJitRegCache::movToHostReg(size_t reg, bool load)
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{
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_assert_msg_(DSPLLE, reg <= DSP_REG_MAX_MEM_BACKED,
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"bad register name %" PRIx64, reg);
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"bad register name %u", (unsigned int) reg);
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_assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE,
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"register %" PRIx64 " is proxy for %d", reg, regs[reg].parentReg);
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"register %u is proxy for %d", (unsigned int) reg, regs[reg].parentReg);
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_assert_msg_(DSPLLE, !regs[reg].used,
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"moving to host reg in use guest reg %" PRIx64, reg);
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"moving to host reg in use guest reg %u", (unsigned int) reg);
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if (regs[reg].loc.IsSimpleReg())
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{
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@ -638,13 +638,13 @@ void DSPJitRegCache::movToHostReg(size_t reg, bool load)
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void DSPJitRegCache::rotateHostReg(size_t reg, int shift, bool emit)
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{
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_assert_msg_(DSPLLE, reg <= DSP_REG_MAX_MEM_BACKED,
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"bad register name %" PRIx64, reg);
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"bad register name %u", (unsigned int) reg);
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_assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE,
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"register %" PRIx64 " is proxy for %d", reg, regs[reg].parentReg);
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"register %u is proxy for %d", (unsigned int) reg, regs[reg].parentReg);
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_assert_msg_(DSPLLE, regs[reg].loc.IsSimpleReg(),
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"register %" PRIx64 " is not a simple reg", reg);
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"register %u is not a simple reg", (unsigned int) reg);
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_assert_msg_(DSPLLE, !regs[reg].used,
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"rotating in use guest reg %" PRIx64, reg);
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"rotating in use guest reg %u", (unsigned int) reg);
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if (shift > regs[reg].shift && emit)
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{
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@ -682,11 +682,11 @@ void DSPJitRegCache::rotateHostReg(size_t reg, int shift, bool emit)
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void DSPJitRegCache::movToMemory(size_t reg)
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{
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_assert_msg_(DSPLLE, reg <= DSP_REG_MAX_MEM_BACKED,
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"bad register name %" PRIx64, reg);
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"bad register name %u", (unsigned int) reg);
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_assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE,
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"register %" PRIx64 " is proxy for %d", reg, regs[reg].parentReg);
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"register %u is proxy for %d", (unsigned int) reg, regs[reg].parentReg);
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_assert_msg_(DSPLLE, !regs[reg].used,
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"moving to memory in use guest reg %" PRIx64, reg);
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"moving to memory in use guest reg %u", (unsigned int) reg);
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if (regs[reg].used)
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{
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@ -82,7 +82,7 @@ static void Trace(UGeckoInstruction& instCode)
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}
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std::string ppc_inst = GekkoDisassembler::Disassemble(instCode.hex, PC);
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DEBUG_LOG(POWERPC, "INTER PC: %08x SRR0: %08x SRR1: %08x CRval: %016lx FPSCR: %08x MSR: %08x LR: %08x %s %08x %s", PC, SRR0, SRR1, PowerPC::ppcState.cr_val[0], PowerPC::ppcState.fpscr, PowerPC::ppcState.msr, PowerPC::ppcState.spr[8], regs.c_str(), instCode.hex, ppc_inst.c_str());
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DEBUG_LOG(POWERPC, "INTER PC: %08x SRR0: %08x SRR1: %08x CRval: %016lx FPSCR: %08x MSR: %08x LR: %08x %s %08x %s", PC, SRR0, SRR1, (unsigned long) PowerPC::ppcState.cr_val[0], PowerPC::ppcState.fpscr, PowerPC::ppcState.msr, PowerPC::ppcState.spr[8], regs.c_str(), instCode.hex, ppc_inst.c_str());
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}
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int Interpreter::SingleStepInner(void)
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@ -311,7 +311,7 @@ void FPURegCache::LoadRegister(size_t preg, X64Reg newLoc)
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{
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if (!regs[preg].location.IsImm() && (regs[preg].location.offset & 0xF))
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{
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PanicAlert("WARNING - misaligned fp register location %" PRIx64, preg);
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PanicAlert("WARNING - misaligned fp register location %u", (unsigned int) preg);
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}
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emit->MOVAPD(newLoc, regs[preg].location);
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}
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@ -323,17 +323,17 @@ void FPURegCache::StoreRegister(size_t preg, OpArg newLoc)
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void RegCache::Flush(FlushMode mode)
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{
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for (size_t i = 0; i < xregs.size(); i++)
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for (unsigned int i = 0; i < xregs.size(); i++)
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{
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if (xregs[i].locked)
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PanicAlert("Someone forgot to unlock X64 reg %" PRIx64, i);
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PanicAlert("Someone forgot to unlock X64 reg %u", i);
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}
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for (size_t i = 0; i < regs.size(); i++)
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for (unsigned int i = 0; i < regs.size(); i++)
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{
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if (regs[i].locked)
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{
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PanicAlert("Someone forgot to unlock PPC reg %" PRIx64 " (X64 reg %i).", i, RX(i));
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PanicAlert("Someone forgot to unlock PPC reg %u (X64 reg %i).", i, RX(i));
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}
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if (regs[i].away)
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@ -344,7 +344,7 @@ void RegCache::Flush(FlushMode mode)
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}
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else
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{
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_assert_msg_(DYNA_REC,0,"Jit64 - Flush unhandled case, reg %" PRIx64 " PC: %08x", i, PC);
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_assert_msg_(DYNA_REC,0,"Jit64 - Flush unhandled case, reg %u PC: %08x", i, PC);
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}
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}
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}
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@ -97,7 +97,7 @@ public:
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if (IsBound(preg))
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return regs[preg].location.GetSimpleReg();
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PanicAlert("Not so simple - %" PRIx64, preg);
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PanicAlert("Not so simple - %u", (unsigned int) preg);
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return Gen::INVALID_REG;
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}
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virtual Gen::OpArg GetDefaultLocation(size_t reg) const = 0;
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@ -496,9 +496,10 @@ void JitIL::Trace()
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#endif
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DEBUG_LOG(DYNA_REC, "JITIL PC: %08x SRR0: %08x SRR1: %08x CRval: %016lx%016lx%016lx%016lx%016lx%016lx%016lx%016lx FPSCR: %08x MSR: %08x LR: %08x %s %s",
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PC, SRR0, SRR1, PowerPC::ppcState.cr_val[0], PowerPC::ppcState.cr_val[1], PowerPC::ppcState.cr_val[2], PowerPC::ppcState.cr_val[3],
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PowerPC::ppcState.cr_val[4], PowerPC::ppcState.cr_val[5], PowerPC::ppcState.cr_val[6], PowerPC::ppcState.cr_val[7], PowerPC::ppcState.fpscr,
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PowerPC::ppcState.msr, PowerPC::ppcState.spr[8], regs.c_str(), fregs.c_str());
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PC, SRR0, SRR1, (unsigned long) PowerPC::ppcState.cr_val[0], (unsigned long) PowerPC::ppcState.cr_val[1], (unsigned long) PowerPC::ppcState.cr_val[2],
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(unsigned long) PowerPC::ppcState.cr_val[3], (unsigned long) PowerPC::ppcState.cr_val[4], (unsigned long) PowerPC::ppcState.cr_val[5],
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(unsigned long) PowerPC::ppcState.cr_val[6], (unsigned long) PowerPC::ppcState.cr_val[7], PowerPC::ppcState.fpscr, PowerPC::ppcState.msr,
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PowerPC::ppcState.spr[8], regs.c_str(), fregs.c_str());
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}
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void STACKALIGN JitIL::Jit(u32 em_address)
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@ -154,6 +154,7 @@ static wxString cache_efb_copies_desc = wxTRANSLATE("Slightly speeds up EFB to R
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static wxString shader_errors_desc = wxTRANSLATE("Usually if shader compilation fails, an error message is displayed.\nHowever, one may skip the popups to allow interruption free gameplay by checking this option.\n\nIf unsure, leave this unchecked.");
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#if !defined(__APPLE__)
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// Search for available resolutions - TODO: Move to Common?
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static wxArrayString GetListOfResolutions()
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{
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@ -214,6 +215,7 @@ static wxArrayString GetListOfResolutions()
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#endif
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return retlist;
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}
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#endif
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VideoConfigDiag::VideoConfigDiag(wxWindow* parent, const std::string &title, const std::string& _ininame)
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: wxDialog(parent, -1,
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@ -60,25 +60,6 @@ void DoState(PointerWrap &p)
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p.DoArray(g_pVideoData,writePos);
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}
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// does it matter that there is no synchronization between threads during writes?
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static inline void WriteLow (u32& _reg, u16 lowbits)
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{
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_reg = (_reg & 0xFFFF0000) | lowbits;
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}
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static inline void WriteHigh(u32& _reg, u16 highbits)
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{
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_reg = (_reg & 0x0000FFFF) | ((u32)highbits << 16);
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}
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static inline u16 ReadLow(u32 _reg)
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{
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return (u16)(_reg & 0xFFFF);
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}
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static inline u16 ReadHigh(u32 _reg)
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{
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return (u16)(_reg >> 16);
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}
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static void UpdateInterrupts_Wrapper(u64 userdata, int cyclesLate)
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{
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UpdateInterrupts(userdata);
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Loading…
Reference in New Issue