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JitArm64: Make WriteConditionalExceptionExit more flexible 

You can now specify an already allocated register for it to use as a
temporary register, and it also supports being called while in farcode.
This commit is contained in:
JosJuice 2021-06-28 18:23:57 +02:00
parent e5a4a86672
commit 8c905e152a
2 changed files with 22 additions and 9 deletions
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30
Source/Core/Core/PowerPC/JitArm64/Jit.cpp
View File

@ -501,21 +501,33 @@ void JitArm64::WriteExceptionExit(ARM64Reg dest, bool only_external, bool always
void JitArm64::WriteConditionalExceptionExit(int exception)
{
ARM64Reg WA = gpr.GetReg();
LDR(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(Exceptions));
FixupBranch noException = TBZ(WA, IntLog2(exception));
WriteConditionalExceptionExit(exception, WA);
gpr.Unlock(WA);
}
FixupBranch handleException = B();
SwitchToFarCode();
SetJumpTarget(handleException);
void JitArm64::WriteConditionalExceptionExit(int exception, ARM64Reg temp_reg)
{
LDR(IndexType::Unsigned, temp_reg, PPC_REG, PPCSTATE_OFF(Exceptions));
FixupBranch no_exception = TBZ(temp_reg, IntLog2(exception));
gpr.Flush(FlushMode::MaintainState, WA);
const bool switch_to_far_code = !IsInFarCode();
if (switch_to_far_code)
{
FixupBranch handle_exception = B();
SwitchToFarCode();
SetJumpTarget(handle_exception);
}
gpr.Flush(FlushMode::MaintainState, temp_reg);
fpr.Flush(FlushMode::MaintainState, ARM64Reg::INVALID_REG);
WriteExceptionExit(js.compilerPC, false, true);
SwitchToNearCode();
SetJumpTarget(noException);
gpr.Unlock(WA);
if (switch_to_far_code)
SwitchToNearCode();
SetJumpTarget(no_exception);
}
bool JitArm64::HandleFunctionHooking(u32 address)

1
Source/Core/Core/PowerPC/JitArm64/Jit.h
View File

@ -266,6 +266,7 @@ protected:
void WriteExceptionExit(Arm64Gen::ARM64Reg dest, bool only_external = false,
bool always_exception = false);
void WriteConditionalExceptionExit(int exception);
void WriteConditionalExceptionExit(int exception, Arm64Gen::ARM64Reg temp_reg);
void FakeLKExit(u32 exit_address_after_return);
void WriteBLRExit(Arm64Gen::ARM64Reg dest);