From 8c905e152adba4f446375ce05daeb8b901dcc361 Mon Sep 17 00:00:00 2001 From: JosJuice Date: Mon, 28 Jun 2021 18:23:57 +0200 Subject: [PATCH] JitArm64: Make WriteConditionalExceptionExit more flexible You can now specify an already allocated register for it to use as a temporary register, and it also supports being called while in farcode. --- Source/Core/Core/PowerPC/JitArm64/Jit.cpp | 30 ++++++++++++++++------- Source/Core/Core/PowerPC/JitArm64/Jit.h | 1 + 2 files changed, 22 insertions(+), 9 deletions(-) diff --git a/Source/Core/Core/PowerPC/JitArm64/Jit.cpp b/Source/Core/Core/PowerPC/JitArm64/Jit.cpp index bbba42c90f..3bd330040f 100644 --- a/Source/Core/Core/PowerPC/JitArm64/Jit.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/Jit.cpp @@ -501,21 +501,33 @@ void JitArm64::WriteExceptionExit(ARM64Reg dest, bool only_external, bool always void JitArm64::WriteConditionalExceptionExit(int exception) { ARM64Reg WA = gpr.GetReg(); - LDR(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(Exceptions)); - FixupBranch noException = TBZ(WA, IntLog2(exception)); + WriteConditionalExceptionExit(exception, WA); + gpr.Unlock(WA); +} - FixupBranch handleException = B(); - SwitchToFarCode(); - SetJumpTarget(handleException); +void JitArm64::WriteConditionalExceptionExit(int exception, ARM64Reg temp_reg) +{ + LDR(IndexType::Unsigned, temp_reg, PPC_REG, PPCSTATE_OFF(Exceptions)); + FixupBranch no_exception = TBZ(temp_reg, IntLog2(exception)); - gpr.Flush(FlushMode::MaintainState, WA); + const bool switch_to_far_code = !IsInFarCode(); + + if (switch_to_far_code) + { + FixupBranch handle_exception = B(); + SwitchToFarCode(); + SetJumpTarget(handle_exception); + } + + gpr.Flush(FlushMode::MaintainState, temp_reg); fpr.Flush(FlushMode::MaintainState, ARM64Reg::INVALID_REG); WriteExceptionExit(js.compilerPC, false, true); - SwitchToNearCode(); - SetJumpTarget(noException); - gpr.Unlock(WA); + if (switch_to_far_code) + SwitchToNearCode(); + + SetJumpTarget(no_exception); } bool JitArm64::HandleFunctionHooking(u32 address) diff --git a/Source/Core/Core/PowerPC/JitArm64/Jit.h b/Source/Core/Core/PowerPC/JitArm64/Jit.h index 8d9b140dd0..2d63743300 100644 --- a/Source/Core/Core/PowerPC/JitArm64/Jit.h +++ b/Source/Core/Core/PowerPC/JitArm64/Jit.h @@ -266,6 +266,7 @@ protected: void WriteExceptionExit(Arm64Gen::ARM64Reg dest, bool only_external = false, bool always_exception = false); void WriteConditionalExceptionExit(int exception); + void WriteConditionalExceptionExit(int exception, Arm64Gen::ARM64Reg temp_reg); void FakeLKExit(u32 exit_address_after_return); void WriteBLRExit(Arm64Gen::ARM64Reg dest);