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Added the corresponding change from r9e649ce79850 to JITIL.

This commit is contained in:
skidau 2012-03-03 15:41:55 +11:00
parent 9e649ce798
commit 874e17e504
2 changed files with 6 additions and 6 deletions
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9
Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp
View File

@ -580,16 +580,13 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
FixupBranch noExtException = J_CC(CC_Z);
TEST(32, M((void *)&ProcessorInterface::m_InterruptCause), Imm32(ProcessorInterface::INT_CAUSE_CP));
FixupBranch noCPInt = J_CC(CC_Z);
TEST(32, M((void *)&ProcessorInterface::m_InterruptCause),
Imm32(ProcessorInterface::INT_CAUSE_PE_TOKEN |
ProcessorInterface::INT_CAUSE_PE_FINISH |
ProcessorInterface::INT_CAUSE_DSP));
FixupBranch ClearInt = J_CC(CC_NZ);
TEST(32, M((void *)&ProcessorInterface::m_InterruptCause), Imm32(ProcessorInterface::INT_CAUSE_DSP));
FixupBranch clearInt = J_CC(CC_NZ);
MOV(32, M(&PC), Imm32(ops[i].address));
WriteExceptionExit();
SetJumpTarget(ClearInt);
SetJumpTarget(clearInt);
SetJumpTarget(noCPInt);
SetJumpTarget(noExtException);
}

3
Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp
View File

@ -1929,10 +1929,13 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, bool UseProfile, bool Mak
FixupBranch noExtException = Jit->J_CC(CC_Z);
Jit->TEST(32, M((void *)&ProcessorInterface::m_InterruptCause), Imm32(ProcessorInterface::INT_CAUSE_CP));
FixupBranch noCPInt = Jit->J_CC(CC_Z);
Jit->TEST(32, M((void *)&ProcessorInterface::m_InterruptCause), Imm32(ProcessorInterface::INT_CAUSE_DSP));
FixupBranch clearInt = Jit->J_CC(CC_NZ);
Jit->MOV(32, M(&PC), Imm32(InstLoc));
Jit->WriteExceptionExit();
Jit->SetJumpTarget(clearInt);
Jit->SetJumpTarget(noCPInt);
Jit->SetJumpTarget(noExtException);
break;