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Merge pull request #9787 from JosJuice/jitarm64-slwx-top 

JitArm64: Discard top 32 bits in slwx result
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Tilka 2021-06-06 08:46:16 +01:00 committed by GitHub
parent 5470aceb63 86de3df072
commit 8139967768
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1 changed files with 3 additions and 10 deletions
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13
Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
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@ -1451,15 +1451,12 @@ void JitArm64::slwx(UGeckoInstruction inst)
{ {
gpr.BindToRegister(a, a == b || a == s); gpr.BindToRegister(a, a == b || a == s);
// PowerPC any shift in the 32-63 register range results in zero // On PowerPC, shifting a 32-bit register by an amount from 32 to 63 results in 0.
// Since it has 32bit registers // We emulate this by using a 64-bit operation and then discarding the top 32 bits.
// AArch64 it will use a mask of the register size for determining what shift amount
// So if we use a 64bit so the bits will end up in the high 32bits, and
// Later instructions will just eat high 32bits since it'll run 32bit operations for everything.
LSLV(EncodeRegTo64(gpr.R(a)), EncodeRegTo64(gpr.R(s)), EncodeRegTo64(gpr.R(b))); LSLV(EncodeRegTo64(gpr.R(a)), EncodeRegTo64(gpr.R(s)), EncodeRegTo64(gpr.R(b)));
if (inst.Rc) if (inst.Rc)
ComputeRC0(gpr.R(a)); ComputeRC0(gpr.R(a));
MOV(gpr.R(a), gpr.R(a));
} }
} }
@ -1499,10 +1496,6 @@ void JitArm64::srwx(UGeckoInstruction inst)
{ {
gpr.BindToRegister(a, a == b || a == s); gpr.BindToRegister(a, a == b || a == s);
// wipe upper bits. TODO: get rid of it, but then no instruction is allowed to emit some higher
// bits.
MOV(gpr.R(s), gpr.R(s));
LSRV(EncodeRegTo64(gpr.R(a)), EncodeRegTo64(gpr.R(s)), EncodeRegTo64(gpr.R(b))); LSRV(EncodeRegTo64(gpr.R(a)), EncodeRegTo64(gpr.R(s)), EncodeRegTo64(gpr.R(b)));
if (inst.Rc) if (inst.Rc)