Merge pull request #9977 from JosJuice/jitarm64-mtfsfx
JitArm64: Implement mtfsfx
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commit
7c365349ee
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@ -3008,6 +3008,14 @@ void ARM64FloatEmitter::BIC(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm)
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{
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{
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EmitThreeSame(0, 1, 3, Rd, Rn, Rm);
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EmitThreeSame(0, 1, 3, Rd, Rn, Rm);
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}
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}
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void ARM64FloatEmitter::BIF(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm)
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{
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EmitThreeSame(1, 3, 3, Rd, Rn, Rm);
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}
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void ARM64FloatEmitter::BIT(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm)
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{
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EmitThreeSame(1, 2, 3, Rd, Rn, Rm);
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}
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void ARM64FloatEmitter::BSL(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm)
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void ARM64FloatEmitter::BSL(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm)
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{
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{
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EmitThreeSame(1, 1, 3, Rd, Rn, Rm);
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EmitThreeSame(1, 1, 3, Rd, Rn, Rm);
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@ -1248,6 +1248,8 @@ public:
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void ADD(u8 size, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void ADD(u8 size, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void AND(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void AND(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void BIC(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void BIC(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void BIF(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void BIT(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void BSL(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void BSL(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void DUP(u8 size, ARM64Reg Rd, ARM64Reg Rn, u8 index);
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void DUP(u8 size, ARM64Reg Rd, ARM64Reg Rn, u8 index);
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void FABS(u8 size, ARM64Reg Rd, ARM64Reg Rn);
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void FABS(u8 size, ARM64Reg Rd, ARM64Reg Rn);
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@ -122,6 +122,7 @@ public:
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void mtfsb0x(UGeckoInstruction inst);
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void mtfsb0x(UGeckoInstruction inst);
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void mtfsb1x(UGeckoInstruction inst);
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void mtfsb1x(UGeckoInstruction inst);
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void mtfsfix(UGeckoInstruction inst);
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void mtfsfix(UGeckoInstruction inst);
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void mtfsfx(UGeckoInstruction inst);
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// LoadStore
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// LoadStore
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void lXX(UGeckoInstruction inst);
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void lXX(UGeckoInstruction inst);
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@ -852,3 +852,44 @@ void JitArm64::mtfsfix(UGeckoInstruction inst)
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if (inst.CRFD == 7)
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if (inst.CRFD == 7)
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UpdateRoundingMode();
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UpdateRoundingMode();
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}
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}
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void JitArm64::mtfsfx(UGeckoInstruction inst)
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{
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INSTRUCTION_START
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JITDISABLE(bJITSystemRegistersOff);
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FALLBACK_IF(inst.Rc);
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u32 mask = 0;
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for (int i = 0; i < 8; i++)
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{
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if (inst.FM & (1 << i))
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mask |= 0xFU << (4 * i);
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}
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if (mask == 0xFFFFFFFF)
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{
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ARM64Reg VB = fpr.R(inst.FB, RegType::LowerPair);
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m_float_emit.STR(32, IndexType::Unsigned, VB, PPC_REG, PPCSTATE_OFF(fpscr));
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}
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else if (mask != 0)
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{
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ARM64Reg VB = fpr.R(inst.FB, RegType::LowerPair);
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ARM64Reg V0 = fpr.GetReg();
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ARM64Reg V1 = fpr.GetReg();
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ARM64Reg WA = gpr.GetReg();
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m_float_emit.LDR(32, IndexType::Unsigned, V0, PPC_REG, PPCSTATE_OFF(fpscr));
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MOVI2R(WA, mask);
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m_float_emit.FMOV(EncodeRegToSingle(V1), WA);
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m_float_emit.BIT(EncodeRegToDouble(V0), EncodeRegToDouble(VB), EncodeRegToDouble(V1));
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m_float_emit.STR(32, IndexType::Unsigned, V0, PPC_REG, PPCSTATE_OFF(fpscr));
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fpr.Unlock(V0, V1);
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gpr.Unlock(WA);
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}
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if (inst.FM & 1)
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UpdateRoundingMode();
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}
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@ -319,7 +319,7 @@ constexpr std::array<GekkoOPTemplate, 15> table63{{
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{70, &JitArm64::mtfsb0x}, // mtfsb0x
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{70, &JitArm64::mtfsb0x}, // mtfsb0x
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{38, &JitArm64::mtfsb1x}, // mtfsb1x
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{38, &JitArm64::mtfsb1x}, // mtfsb1x
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{134, &JitArm64::mtfsfix}, // mtfsfix
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{134, &JitArm64::mtfsfix}, // mtfsfix
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{711, &JitArm64::FallBackToInterpreter}, // mtfsfx
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{711, &JitArm64::mtfsfx}, // mtfsfx
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}};
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}};
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constexpr std::array<GekkoOPTemplate, 10> table63_2{{
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constexpr std::array<GekkoOPTemplate, 10> table63_2{{
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