Merge pull request #4548 from stenzek/gcc-sse
Support SSSE3 texture decoders and CRC32 hashing on non-native builds (gcc)
This commit is contained in:
commit
7b19475911
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@ -12,10 +12,6 @@
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#include "Common/Swap.h"
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#include "Core/ConfigManager.h"
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#if _M_SSE >= 0x301 && !(defined __GNUC__ && !defined __SSSE3__)
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#include <tmmintrin.h>
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#endif
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CMixer::CMixer(unsigned int BackendSampleRate) : m_sampleRate(BackendSampleRate)
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{
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INFO_LOG(AUDIO_INTERFACE, "Mixer is initialized");
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@ -238,9 +238,11 @@ u64 GetMurmurHash3(const u8* src, u32 len, u32 samples)
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}
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// CRC32 hash using the SSE4.2 instruction
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#if defined(_M_X86_64)
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FUNCTION_TARGET_SSE42
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u64 GetCRC32(const u8* src, u32 len, u32 samples)
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{
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#if _M_SSE >= 0x402 || defined(_M_ARM_64)
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u64 h[4] = {len, 0, 0, 0};
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u32 Step = (len / 8);
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const u64* data = (const u64*)src;
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@ -250,9 +252,7 @@ u64 GetCRC32(const u8* src, u32 len, u32 samples)
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Step = Step / samples;
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if (Step < 1)
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Step = 1;
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#endif
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#if _M_SSE >= 0x402
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while (data < end - Step * 3)
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{
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h[0] = _mm_crc32_u64(h[0], data[Step * 0]);
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@ -274,7 +274,25 @@ u64 GetCRC32(const u8* src, u32 len, u32 samples)
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memcpy(&temp, end, len & 7);
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h[0] = _mm_crc32_u64(h[0], temp);
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}
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// FIXME: is there a better way to combine these partial hashes?
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return h[0] + (h[1] << 10) + (h[2] << 21) + (h[3] << 32);
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}
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#elif defined(_M_ARM_64)
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u64 GetCRC32(const u8* src, u32 len, u32 samples)
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{
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u64 h[4] = {len, 0, 0, 0};
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u32 Step = (len / 8);
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const u64* data = (const u64*)src;
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const u64* end = data + Step;
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if (samples == 0)
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samples = std::max(Step, 1u);
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Step = Step / samples;
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if (Step < 1)
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Step = 1;
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// We should be able to use intrinsics for this
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// Too bad the intrinsics for this instruction was added in GCC 4.9.1
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// The Android NDK (as of r10e) only has GCC 4.9
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@ -317,16 +335,20 @@ u64 GetCRC32(const u8* src, u32 len, u32 samples)
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: [res] "=r"(h[0])
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: [two] "r"(h[0]), [three] "r"(temp));
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}
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#endif
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#if _M_SSE >= 0x402 || defined(_M_ARM_64)
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// FIXME: is there a better way to combine these partial hashes?
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return h[0] + (h[1] << 10) + (h[2] << 21) + (h[3] << 32);
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#else
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return 0;
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#endif
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}
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#else
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u64 GetCRC32(const u8* src, u32 len, u32 samples)
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{
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return 0;
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}
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#endif
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/*
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* NOTE: This hash function is used for custom texture loading/dumping, so
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* it should not be changed, which would require all custom textures to be
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@ -386,10 +408,13 @@ u64 GetHashHiresTexture(const u8* src, u32 len, u32 samples)
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return h;
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}
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#else
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// CRC32 hash using the SSE4.2 instruction
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#if defined(_M_X86)
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FUNCTION_TARGET_SSE42
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u64 GetCRC32(const u8* src, u32 len, u32 samples)
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{
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#if _M_SSE >= 0x402
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u32 h = len;
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u32 Step = (len / 4);
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const u32* data = (const u32*)src;
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@ -407,11 +432,17 @@ u64 GetCRC32(const u8* src, u32 len, u32 samples)
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const u8* data2 = (const u8*)end;
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return (u64)_mm_crc32_u32(h, u32(data2[0]));
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#else
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return 0;
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#endif
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}
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#else
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u64 GetCRC32(const u8* src, u32 len, u32 samples)
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{
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return 0;
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}
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#endif
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//-----------------------------------------------------------------------------
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// Block read - if your platform needs to do endian-swapping or can only
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// handle aligned reads, do the conversion here
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@ -606,7 +637,7 @@ u64 GetHash64(const u8* src, u32 len, u32 samples)
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// sets the hash function used for the texture cache
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void SetHash64Function()
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{
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#if _M_SSE >= 0x402
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#if defined(_M_X86_64) || defined(_M_X86)
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if (cpu_info.bSSE4_2) // sse crc32 version
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{
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ptrHashFunction = &GetCRC32;
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@ -4,28 +4,69 @@
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#pragma once
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#ifdef _M_X86
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#if defined(_M_X86)
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/**
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* It is assumed that all compilers used to build Dolphin support intrinsics up to and including
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* SSE 4.2 on x86/x64.
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*/
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#if defined(__GNUC__) || defined(__clang__)
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/**
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* Due to limitations in GCC, SSE intrinsics are only available when compiling with the
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* corresponding instruction set enabled. However, using the target attribute, we can compile
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* single functions with a different target instruction set, while still creating a generic build.
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*
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* Since this instruction set is enabled per-function, any callers should verify that the
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* instruction set is supported at runtime before calling it, and provide a fallback implementation
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* when not supported.
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*
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* When building with -march=native, or enabling the instruction sets in the compile flags, permit
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* usage of the instrinsics without any function attributes. If the command-line architecture does
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* not support this instruction set, enable it via function targeting.
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*/
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#ifdef _MSC_VER
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#include <intrin.h>
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#else
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#include <x86intrin.h>
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#ifndef __SSE4_2__
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#define FUNCTION_TARGET_SSE42 [[gnu::target("sse4.2")]]
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#endif
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#ifndef __SSE4_1__
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#define FUNCTION_TARGET_SSR41 [[gnu::target("sse4.1")]]
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#endif
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#ifndef __SSSE3__
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#define FUNCTION_TARGET_SSSE3 [[gnu::target("ssse3")]]
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#endif
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#ifndef __SSE3__
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#define FUNCTION_TARGET_SSE3 [[gnu::target("sse3")]]
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#endif
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#if defined _M_GENERIC
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#define _M_SSE 0
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#elif _MSC_VER || __INTEL_COMPILER
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#define _M_SSE 0x402
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#elif defined __GNUC__
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#if defined __SSE4_2__
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#define _M_SSE 0x402
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#elif defined __SSE4_1__
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#define _M_SSE 0x401
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#elif defined __SSSE3__
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#define _M_SSE 0x301
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#elif defined __SSE3__
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#define _M_SSE 0x300
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#endif
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#endif
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#elif defined(_MSC_VER) || defined(__INTEL_COMPILER)
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/**
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* MSVC and ICC support intrinsics for any instruction set without any function attributes.
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*/
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#include <intrin.h>
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#endif // defined(_MSC_VER) || defined(__INTEL_COMPILER)
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#endif // _M_X86
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/**
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* Define the FUNCTION_TARGET macros to nothing if they are not needed, or not on an X86 platform.
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* This way when a function is defined with FUNCTION_TARGET you don't need to define a second
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* version without the macro around a #ifdef guard. Be careful when using intrinsics, as all use
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* should still be placed around a #ifdef _M_X86 if the file is compiled on all architectures.
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*/
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#ifndef FUNCTION_TARGET_SSE42
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#define FUNCTION_TARGET_SSE42
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#endif
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#ifndef FUNCTION_TARGET_SSR41
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#define FUNCTION_TARGET_SSR41
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#endif
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#ifndef FUNCTION_TARGET_SSSE3
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#define FUNCTION_TARGET_SSSE3
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#endif
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#ifndef FUNCTION_TARGET_SSE3
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#define FUNCTION_TARGET_SSE3
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#endif
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@ -253,25 +253,41 @@ static const u8* gdsp_idma_out(u16 dsp_addr, u32 addr, u32 size)
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return nullptr;
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}
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#if _M_SSE >= 0x301
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#if defined(_M_X86) || defined(_M_X86_64)
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static const __m128i s_mask = _mm_set_epi32(0x0E0F0C0DL, 0x0A0B0809L, 0x06070405L, 0x02030001L);
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FUNCTION_TARGET_SSSE3
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static void gdsp_ddma_in_SSSE3(u16 dsp_addr, u32 addr, u32 size, u8* dst)
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{
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for (u32 i = 0; i < size; i += 16)
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{
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_mm_storeu_si128(
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(__m128i*)&dst[dsp_addr + i],
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_mm_shuffle_epi8(_mm_loadu_si128((__m128i*)&g_dsp.cpu_ram[(addr + i) & 0x7FFFFFFF]),
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s_mask));
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}
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}
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FUNCTION_TARGET_SSSE3
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static void gdsp_ddma_out_SSSE3(u16 dsp_addr, u32 addr, u32 size, const u8* src)
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{
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for (u32 i = 0; i < size; i += 16)
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{
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_mm_storeu_si128((__m128i*)&g_dsp.cpu_ram[(addr + i) & 0x7FFFFFFF],
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_mm_shuffle_epi8(_mm_loadu_si128((__m128i*)&src[dsp_addr + i]), s_mask));
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}
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}
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#endif
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// TODO: These should eat clock cycles.
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static const u8* gdsp_ddma_in(u16 dsp_addr, u32 addr, u32 size)
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{
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u8* dst = ((u8*)g_dsp.dram);
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u8* dst = reinterpret_cast<u8*>(g_dsp.dram);
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#if _M_SSE >= 0x301
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#if defined(_M_X86) || defined(_M_X86_64)
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if (cpu_info.bSSSE3 && !(size % 16))
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{
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for (u32 i = 0; i < size; i += 16)
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{
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_mm_storeu_si128(
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(__m128i*)&dst[dsp_addr + i],
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_mm_shuffle_epi8(_mm_loadu_si128((__m128i*)&g_dsp.cpu_ram[(addr + i) & 0x7FFFFFFF]),
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s_mask));
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}
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gdsp_ddma_in_SSSE3(dsp_addr, addr, size, dst);
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}
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else
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#endif
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@ -290,16 +306,12 @@ static const u8* gdsp_ddma_in(u16 dsp_addr, u32 addr, u32 size)
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static const u8* gdsp_ddma_out(u16 dsp_addr, u32 addr, u32 size)
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{
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const u8* src = ((const u8*)g_dsp.dram);
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const u8* src = reinterpret_cast<const u8*>(g_dsp.dram);
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#if _M_SSE >= 0x301
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#ifdef _M_X86
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if (cpu_info.bSSSE3 && !(size % 16))
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{
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for (u32 i = 0; i < size; i += 16)
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{
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_mm_storeu_si128((__m128i*)&g_dsp.cpu_ram[(addr + i) & 0x7FFFFFFF],
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_mm_shuffle_epi8(_mm_loadu_si128((__m128i*)&src[dsp_addr + i]), s_mask));
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}
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gdsp_ddma_out_SSSE3(dsp_addr, addr, size, src);
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}
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else
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#endif
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@ -249,11 +249,11 @@ static void TexDecoder_DecodeImpl_C4(u32* dst, const u8* src, int width, int hei
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}
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}
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FUNCTION_TARGET_SSSE3
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static void TexDecoder_DecodeImpl_I4_SSSE3(u32* dst, const u8* src, int width, int height,
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int texformat, const u8* tlut, TlutFormat tlutfmt,
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int Wsteps4, int Wsteps8)
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{
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#if _M_SSE >= 0x301
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const __m128i kMask_x0f = _mm_set1_epi32(0x0f0f0f0fL);
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const __m128i kMask_xf0 = _mm_set1_epi32(0xf0f0f0f0L);
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@ -296,7 +296,6 @@ static void TexDecoder_DecodeImpl_I4_SSSE3(u32* dst, const u8* src, int width, i
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}
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}
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}
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#endif
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}
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static void TexDecoder_DecodeImpl_I4(u32* dst, const u8* src, int width, int height, int texformat,
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@ -389,11 +388,11 @@ static void TexDecoder_DecodeImpl_I4(u32* dst, const u8* src, int width, int hei
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}
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}
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FUNCTION_TARGET_SSSE3
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static void TexDecoder_DecodeImpl_I8_SSSE3(u32* dst, const u8* src, int width, int height,
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int texformat, const u8* tlut, TlutFormat tlutfmt,
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int Wsteps4, int Wsteps8)
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{
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#if _M_SSE >= 0x301
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// xsacha optimized with SSSE3 intrinsics
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// Produces a ~10% speed improvement over SSE2 implementation
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for (int y = 0; y < height; y += 4)
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@ -418,7 +417,6 @@ static void TexDecoder_DecodeImpl_I8_SSSE3(u32* dst, const u8* src, int width, i
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}
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}
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}
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#endif
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}
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static void TexDecoder_DecodeImpl_I8(u32* dst, const u8* src, int width, int height, int texformat,
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@ -572,11 +570,11 @@ static void TexDecoder_DecodeImpl_IA4(u32* dst, const u8* src, int width, int he
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}
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}
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FUNCTION_TARGET_SSSE3
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static void TexDecoder_DecodeImpl_IA8_SSSE3(u32* dst, const u8* src, int width, int height,
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int texformat, const u8* tlut, TlutFormat tlutfmt,
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int Wsteps4, int Wsteps8)
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{
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#if _M_SSE >= 0x301
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// xsacha optimized with SSSE3 intrinsics.
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// Produces an ~50% speed improvement over SSE2 implementation.
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for (int y = 0; y < height; y += 4)
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@ -595,7 +593,6 @@ static void TexDecoder_DecodeImpl_IA8_SSSE3(u32* dst, const u8* src, int width,
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}
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}
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}
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#endif
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}
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static void TexDecoder_DecodeImpl_IA8(u32* dst, const u8* src, int width, int height, int texformat,
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@ -767,11 +764,11 @@ static void TexDecoder_DecodeImpl_RGB565(u32* dst, const u8* src, int width, int
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}
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}
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FUNCTION_TARGET_SSSE3
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static void TexDecoder_DecodeImpl_RGB5A3_SSSE3(u32* dst, const u8* src, int width, int height,
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int texformat, const u8* tlut, TlutFormat tlutfmt,
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int Wsteps4, int Wsteps8)
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{
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#if _M_SSE >= 0x301
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const __m128i kMask_x1f = _mm_set1_epi32(0x0000001fL);
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const __m128i kMask_x0f = _mm_set1_epi32(0x0000000fL);
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const __m128i kMask_x07 = _mm_set1_epi32(0x00000007L);
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|
@ -872,7 +869,6 @@ static void TexDecoder_DecodeImpl_RGB5A3_SSSE3(u32* dst, const u8* src, int widt
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}
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}
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}
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#endif
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}
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static void TexDecoder_DecodeImpl_RGB5A3(u32* dst, const u8* src, int width, int height,
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@ -995,11 +991,11 @@ static void TexDecoder_DecodeImpl_RGB5A3(u32* dst, const u8* src, int width, int
|
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}
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}
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FUNCTION_TARGET_SSSE3
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static void TexDecoder_DecodeImpl_RGBA8_SSSE3(u32* dst, const u8* src, int width, int height,
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int texformat, const u8* tlut, TlutFormat tlutfmt,
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int Wsteps4, int Wsteps8)
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{
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#if _M_SSE >= 0x301
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// xsacha optimized with SSSE3 instrinsics
|
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// Produces a ~30% speed improvement over SSE2 implementation
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for (int y = 0; y < height; y += 4)
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@ -1028,7 +1024,6 @@ static void TexDecoder_DecodeImpl_RGBA8_SSSE3(u32* dst, const u8* src, int width
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_mm_storeu_si128(dst128, rgba11);
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}
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}
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#endif
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}
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static void TexDecoder_DecodeImpl_RGBA8(u32* dst, const u8* src, int width, int height,
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@ -1414,14 +1409,6 @@ void _TexDecoder_DecodeImpl(u32* dst, const u8* src, int width, int height, int
|
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int Wsteps4 = (width + 3) / 4;
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int Wsteps8 = (width + 7) / 8;
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// If the binary was not compiled with SSSE3 support, the functions turn into no-ops.
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// Therefore, we shouldn't call them based on what the CPU reports at runtime alone.
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#if _M_SSE >= 0x301
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bool has_SSSE3 = cpu_info.bSSSE3;
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#else
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bool has_SSSE3 = false;
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#endif
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switch (texformat)
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{
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case GX_TF_C4:
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|
@ -1429,7 +1416,7 @@ void _TexDecoder_DecodeImpl(u32* dst, const u8* src, int width, int height, int
|
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break;
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case GX_TF_I4:
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if (has_SSSE3)
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if (cpu_info.bSSSE3)
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TexDecoder_DecodeImpl_I4_SSSE3(dst, src, width, height, texformat, tlut, tlutfmt, Wsteps4,
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||||
Wsteps8);
|
||||
else
|
||||
|
@ -1437,7 +1424,7 @@ void _TexDecoder_DecodeImpl(u32* dst, const u8* src, int width, int height, int
|
|||
break;
|
||||
|
||||
case GX_TF_I8:
|
||||
if (has_SSSE3)
|
||||
if (cpu_info.bSSSE3)
|
||||
TexDecoder_DecodeImpl_I8_SSSE3(dst, src, width, height, texformat, tlut, tlutfmt, Wsteps4,
|
||||
Wsteps8);
|
||||
else
|
||||
|
@ -1453,7 +1440,7 @@ void _TexDecoder_DecodeImpl(u32* dst, const u8* src, int width, int height, int
|
|||
break;
|
||||
|
||||
case GX_TF_IA8:
|
||||
if (has_SSSE3)
|
||||
if (cpu_info.bSSSE3)
|
||||
TexDecoder_DecodeImpl_IA8_SSSE3(dst, src, width, height, texformat, tlut, tlutfmt, Wsteps4,
|
||||
Wsteps8);
|
||||
else
|
||||
|
@ -1472,7 +1459,7 @@ void _TexDecoder_DecodeImpl(u32* dst, const u8* src, int width, int height, int
|
|||
break;
|
||||
|
||||
case GX_TF_RGB5A3:
|
||||
if (has_SSSE3)
|
||||
if (cpu_info.bSSSE3)
|
||||
TexDecoder_DecodeImpl_RGB5A3_SSSE3(dst, src, width, height, texformat, tlut, tlutfmt, Wsteps4,
|
||||
Wsteps8);
|
||||
else
|
||||
|
@ -1481,7 +1468,7 @@ void _TexDecoder_DecodeImpl(u32* dst, const u8* src, int width, int height, int
|
|||
break;
|
||||
|
||||
case GX_TF_RGBA8:
|
||||
if (has_SSSE3)
|
||||
if (cpu_info.bSSSE3)
|
||||
TexDecoder_DecodeImpl_RGBA8_SSSE3(dst, src, width, height, texformat, tlut, tlutfmt, Wsteps4,
|
||||
Wsteps8);
|
||||
else
|
||||
|
|
Loading…
Reference in New Issue