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Common/MathUtil: Move IntLog2 into MathUtil namespace 

Gets this out of the global namespace.
This commit is contained in:
Lioncash 2023-04-15 03:27:35 -04:00
parent 5e0c20f8a5
commit 784a216927
14 changed files with 36 additions and 36 deletions
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2
Source/Core/Common/Arm64Emitter.cpp
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@ -3092,7 +3092,7 @@ void ARM64FloatEmitter::FMOV(ARM64Reg Rd, uint8_t imm8)
// Vector
void ARM64FloatEmitter::ADD(u8 size, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm)
{
EmitThreeSame(0, IntLog2(size) - 3, 0b10000, Rd, Rn, Rm);
EmitThreeSame(0, MathUtil::IntLog2(size) - 3, 0b10000, Rd, Rn, Rm);
}
void ARM64FloatEmitter::AND(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm)
{

3
Source/Core/Common/MathUtil.h
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@ -185,10 +185,9 @@ private:
T m_variance{};
};
} // namespace MathUtil
// Rounds down. 0 -> undefined
constexpr int IntLog2(u64 val)
{
return 63 - std::countl_zero(val);
}
} // namespace MathUtil

4
Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp
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@ -1223,7 +1223,7 @@ void Jit64::MultiplyImmediate(u32 imm, int a, int d, bool overflow)
// power of 2; just a shift
if (MathUtil::IsPow2(imm))
{
u32 shift = IntLog2(imm);
u32 shift = MathUtil::IntLog2(imm);
// use LEA if it saves an op
if (d != a && shift <= 3 && shift >= 1 && Ra.IsSimpleReg())
{
@ -1731,7 +1731,7 @@ void Jit64::divwx(UGeckoInstruction inst)
TEST(32, R(dividend), R(dividend));
LEA(32, sum, MDisp(dividend, abs_val - 1));
CMOVcc(32, Rd, R(src), cond);
SAR(32, Rd, Imm8(IntLog2(abs_val)));
SAR(32, Rd, Imm8(MathUtil::IntLog2(abs_val)));
if (divisor < 0)
NEG(32, Rd);

4
Source/Core/Core/PowerPC/Jit64/Jit_SystemRegisters.cpp
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@ -198,7 +198,7 @@ void Jit64::UpdateFPExceptionSummary(X64Reg fpscr, X64Reg tmp1, X64Reg tmp2)
// fpscr.VX = (fpscr & FPSCR_VX_ANY) != 0
TEST(32, R(fpscr), Imm32(FPSCR_VX_ANY));
SETcc(CC_NZ, R(tmp1));
SHL(32, R(tmp1), Imm8(IntLog2(FPSCR_VX)));
SHL(32, R(tmp1), Imm8(MathUtil::IntLog2(FPSCR_VX)));
AND(32, R(fpscr), Imm32(~(FPSCR_VX | FPSCR_FEX)));
OR(32, R(fpscr), R(tmp1));
@ -212,7 +212,7 @@ void Jit64::UpdateFPExceptionSummary(X64Reg fpscr, X64Reg tmp1, X64Reg tmp2)
// the TEST, and we can't use XOR right after the TEST since that would overwrite flags. However,
// there is no false dependency, since SETcc depends on TEST's flags and TEST depends on tmp1.
SETcc(CC_NZ, R(tmp1));
SHL(32, R(tmp1), Imm8(IntLog2(FPSCR_FEX)));
SHL(32, R(tmp1), Imm8(MathUtil::IntLog2(FPSCR_FEX)));
OR(32, R(fpscr), R(tmp1));
}

2
Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp
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@ -97,7 +97,7 @@ FixupBranch EmuCodeBlock::BATAddressLookup(X64Reg addr, X64Reg tmp, const void*
MOV(64, R(tmp), ImmPtr(bat_table));
SHR(32, R(addr), Imm8(PowerPC::BAT_INDEX_SHIFT));
MOV(32, R(addr), MComplex(tmp, addr, SCALE_4, 0));
BT(32, R(addr), Imm8(IntLog2(PowerPC::BAT_MAPPED_BIT)));
BT(32, R(addr), Imm8(MathUtil::IntLog2(PowerPC::BAT_MAPPED_BIT)));
return J_CC(CC_NC, m_far_code.Enabled());
}

6
Source/Core/Core/PowerPC/JitArm64/Jit.cpp
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@ -544,7 +544,7 @@ void JitArm64::WriteConditionalExceptionExit(int exception, ARM64Reg temp_gpr, A
u64 increment_sp_on_exit)
{
LDR(IndexType::Unsigned, temp_gpr, PPC_REG, PPCSTATE_OFF(Exceptions));
FixupBranch no_exception = TBZ(temp_gpr, IntLog2(exception));
FixupBranch no_exception = TBZ(temp_gpr, MathUtil::IntLog2(exception));
const bool switch_to_far_code = !IsInFarCode();
@ -938,7 +938,7 @@ bool JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
// Inline exception check
LDR(IndexType::Unsigned, ARM64Reg::W30, PPC_REG, PPCSTATE_OFF(Exceptions));
FixupBranch no_ext_exception = TBZ(ARM64Reg::W30, IntLog2(EXCEPTION_EXTERNAL_INT));
FixupBranch no_ext_exception = TBZ(ARM64Reg::W30, MathUtil::IntLog2(EXCEPTION_EXTERNAL_INT));
FixupBranch exception = B();
SwitchToFarCode();
const u8* done_here = GetCodePtr();
@ -974,7 +974,7 @@ bool JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
ARM64Reg XA = EncodeRegTo64(WA);
LDR(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(Exceptions));
FixupBranch no_ext_exception = TBZ(WA, IntLog2(EXCEPTION_EXTERNAL_INT));
FixupBranch no_ext_exception = TBZ(WA, MathUtil::IntLog2(EXCEPTION_EXTERNAL_INT));
FixupBranch exception = B();
SwitchToFarCode();
const u8* done_here = GetCodePtr();

12
Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
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@ -909,7 +909,7 @@ bool JitArm64::MultiplyImmediate(u32 imm, int a, int d, bool rc)
else if (MathUtil::IsPow2(imm))
{
// Multiplication by a power of two (2^n).
const int shift = IntLog2(imm);
const int shift = MathUtil::IntLog2(imm);
gpr.BindToRegister(d, d == a);
LSL(gpr.R(d), gpr.R(a), shift);
@ -919,7 +919,7 @@ bool JitArm64::MultiplyImmediate(u32 imm, int a, int d, bool rc)
else if (MathUtil::IsPow2(imm - 1))
{
// Multiplication by a power of two plus one (2^n + 1).
const int shift = IntLog2(imm - 1);
const int shift = MathUtil::IntLog2(imm - 1);
gpr.BindToRegister(d, d == a);
ADD(gpr.R(d), gpr.R(a), gpr.R(a), ArithOption(gpr.R(a), ShiftType::LSL, shift));
@ -929,7 +929,7 @@ bool JitArm64::MultiplyImmediate(u32 imm, int a, int d, bool rc)
else if (MathUtil::IsPow2(~imm + 1))
{
// Multiplication by a negative power of two (-(2^n)).
const int shift = IntLog2(~imm + 1);
const int shift = MathUtil::IntLog2(~imm + 1);
gpr.BindToRegister(d, d == a);
NEG(gpr.R(d), gpr.R(a), ArithOption(gpr.R(a), ShiftType::LSL, shift));
@ -939,7 +939,7 @@ bool JitArm64::MultiplyImmediate(u32 imm, int a, int d, bool rc)
else if (MathUtil::IsPow2(~imm + 2))
{
// Multiplication by a negative power of two plus one (-(2^n) + 1).
const int shift = IntLog2(~imm + 2);
const int shift = MathUtil::IntLog2(~imm + 2);
gpr.BindToRegister(d, d == a);
SUB(gpr.R(d), gpr.R(a), gpr.R(a), ArithOption(gpr.R(a), ShiftType::LSL, shift));
@ -1603,9 +1603,9 @@ void JitArm64::divwx(UGeckoInstruction inst)
CSEL(WA, RA, WA, CCFlags::CC_PL);
if (divisor < 0)
NEG(RD, WA, ArithOption(WA, ShiftType::ASR, IntLog2(abs_val)));
NEG(RD, WA, ArithOption(WA, ShiftType::ASR, MathUtil::IntLog2(abs_val)));
else
ASR(RD, WA, IntLog2(abs_val));
ASR(RD, WA, MathUtil::IntLog2(abs_val));
if (allocate_reg)
gpr.Unlock(WA);

4
Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp
View File

@ -347,7 +347,7 @@ FixupBranch JitArm64::BATAddressLookup(ARM64Reg addr_out, ARM64Reg addr_in, ARM6
MOVP2R(tmp, bat_table);
LSR(addr_out, addr_in, PowerPC::BAT_INDEX_SHIFT);
LDR(addr_out, tmp, ArithOption(addr_out, true));
FixupBranch pass = TBNZ(addr_out, IntLog2(PowerPC::BAT_MAPPED_BIT));
FixupBranch pass = TBNZ(addr_out, MathUtil::IntLog2(PowerPC::BAT_MAPPED_BIT));
FixupBranch fail = B();
SetJumpTarget(pass);
return fail;
@ -361,7 +361,7 @@ FixupBranch JitArm64::CheckIfSafeAddress(Arm64Gen::ARM64Reg addr, Arm64Gen::ARM6
MOVP2R(tmp2, m_mmu.GetDBATTable().data());
LSR(tmp1, addr, PowerPC::BAT_INDEX_SHIFT);
LDR(tmp1, tmp2, ArithOption(tmp1, true));
FixupBranch pass = TBNZ(tmp1, IntLog2(PowerPC::BAT_PHYSICAL_BIT));
FixupBranch pass = TBNZ(tmp1, MathUtil::IntLog2(PowerPC::BAT_PHYSICAL_BIT));
FixupBranch fail = B();
SetJumpTarget(pass);
return fail;

4
Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp
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@ -60,13 +60,13 @@ void JitArm64::UpdateFPExceptionSummary(ARM64Reg fpscr)
MOVI2R(WA, FPSCR_VX_ANY);
TST(WA, fpscr);
CSET(WA, CCFlags::CC_NEQ);
BFI(fpscr, WA, IntLog2(FPSCR_VX), 1);
BFI(fpscr, WA, MathUtil::IntLog2(FPSCR_VX), 1);
// fpscr.FEX = ((fpscr >> 22) & (fpscr & FPSCR_ANY_E)) != 0
AND(WA, fpscr, LogicalImm(FPSCR_ANY_E, 32));
TST(WA, fpscr, ArithOption(fpscr, ShiftType::LSR, 22));
CSET(WA, CCFlags::CC_NEQ);
BFI(fpscr, WA, IntLog2(FPSCR_FEX), 1);
BFI(fpscr, WA, MathUtil::IntLog2(FPSCR_FEX), 1);
gpr.Unlock(WA);
}

2
Source/Core/UICommon/UICommon.cpp
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@ -547,7 +547,7 @@ std::string FormatSize(u64 bytes, int decimals)
// div 10 to get largest named unit less than size
// 10 == log2(1024) (number of B in a KiB, KiB in a MiB, etc)
// Max value is 63 / 10 = 6
const int unit = IntLog2(std::max<u64>(bytes, 1)) / 10;
const int unit = MathUtil::IntLog2(std::max<u64>(bytes, 1)) / 10;
// Don't need exact values, only 5 most significant digits
const double unit_size = std::pow(2, unit * 10);

2
Source/Core/VideoBackends/OGL/OGLStreamBuffer.cpp
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@ -25,7 +25,7 @@ static u32 GenBuffer()
StreamBuffer::StreamBuffer(u32 type, u32 size)
: m_buffer(GenBuffer()), m_buffertype(type), m_size(MathUtil::NextPowerOf2(size)),
m_bit_per_slot(IntLog2(MathUtil::NextPowerOf2(size) / SYNC_POINTS))
m_bit_per_slot(MathUtil::IntLog2(MathUtil::NextPowerOf2(size) / SYNC_POINTS))
{
m_iterator = 0;
m_used_iterator = 0;

11
Source/Core/VideoCommon/TextureConversionShader.cpp
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@ -202,9 +202,9 @@ static void WriteSwizzler(ShaderCode& code, const EFBCopyParams& params, APIType
const int blkH = TexDecoder_GetEFBCopyBlockHeightInTexels(params.copy_format);
int samples = GetEncodedSampleCount(params.copy_format);
code.Write(" int x_block_position = (uv1.x >> {}) << {};\n", IntLog2(blkH * blkW / samples),
IntLog2(blkW));
code.Write(" int y_block_position = uv1.y << {};\n", IntLog2(blkH));
code.Write(" int x_block_position = (uv1.x >> {}) << {};\n",
MathUtil::IntLog2(blkH * blkW / samples), MathUtil::IntLog2(blkW));
code.Write(" int y_block_position = uv1.y << {};\n", MathUtil::IntLog2(blkH));
if (samples == 1)
{
// With samples == 1, we write out pairs of blocks; one A8R8, one G8B8.
@ -212,9 +212,10 @@ static void WriteSwizzler(ShaderCode& code, const EFBCopyParams& params, APIType
samples = 2;
}
code.Write(" int offset_in_block = uv1.x & {};\n", (blkH * blkW / samples) - 1);
code.Write(" int y_offset_in_block = offset_in_block >> {};\n", IntLog2(blkW / samples));
code.Write(" int y_offset_in_block = offset_in_block >> {};\n",
MathUtil::IntLog2(blkW / samples));
code.Write(" int x_offset_in_block = (offset_in_block & {}) << {};\n", (blkW / samples) - 1,
IntLog2(samples));
MathUtil::IntLog2(samples));
code.Write(" sampleUv.x = x_block_position + x_offset_in_block;\n"
" sampleUv.y = y_block_position + y_offset_in_block;\n");

2
Source/Core/VideoCommon/TextureInfo.cpp
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@ -83,7 +83,7 @@ TextureInfo::TextureInfo(u32 stage, const u8* ptr, const u8* tlut_ptr, u32 addre
// e.g. 64x64 with 7 LODs would have the mipmap chain 64x64,32x32,16x16,8x8,4x4,2x2,1x1,0x0, so
// we limit the mipmap count to 6 there
const u32 limited_mip_count =
std::min<u32>(IntLog2(std::max(width, height)) + 1, raw_mip_count + 1) - 1;
std::min<u32>(MathUtil::IntLog2(std::max(width, height)) + 1, raw_mip_count + 1) - 1;
// load mips
const u8* src_data = m_ptr + GetTextureSize();

14
Source/UnitTests/Common/MathUtilTest.cpp
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@ -7,15 +7,15 @@
TEST(MathUtil, IntLog2)
{
EXPECT_EQ(0, IntLog2(1));
EXPECT_EQ(1, IntLog2(2));
EXPECT_EQ(2, IntLog2(4));
EXPECT_EQ(3, IntLog2(8));
EXPECT_EQ(63, IntLog2(0x8000000000000000ull));
EXPECT_EQ(0, MathUtil::IntLog2(1));
EXPECT_EQ(1, MathUtil::IntLog2(2));
EXPECT_EQ(2, MathUtil::IntLog2(4));
EXPECT_EQ(3, MathUtil::IntLog2(8));
EXPECT_EQ(63, MathUtil::IntLog2(0x8000000000000000ull));
// Rounding behavior.
EXPECT_EQ(3, IntLog2(15));
EXPECT_EQ(63, IntLog2(0xFFFFFFFFFFFFFFFFull));
EXPECT_EQ(3, MathUtil::IntLog2(15));
EXPECT_EQ(63, MathUtil::IntLog2(0xFFFFFFFFFFFFFFFFull));
}
TEST(MathUtil, NextPowerOf2)