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Merge pull request #5268 from MerryMage/gpfifo3 

JitArm64: Fix bugs introduced by #5257
This commit is contained in:
Markus Wick 2017-04-15 11:00:04 +02:00 committed by GitHub
parent 2a91b2a4dd 03d07c36ae
commit 6b32c17d1b
2 changed files with 5 additions and 5 deletions
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6
Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp
View File

@ -141,7 +141,7 @@ void JitArm64::SafeLoadToReg(u32 dest, s32 addr, s32 offsetReg, u32 flags, s32 o
void JitArm64::SafeStoreFromReg(s32 dest, u32 value, s32 regOffset, u32 flags, s32 offset)
{
// We want to make sure to not get LR as a temp register
gpr.Lock(W0, W1);
gpr.Lock(W0, W1, W30);
ARM64Reg RS = gpr.R(value);
@ -256,7 +256,7 @@ void JitArm64::SafeStoreFromReg(s32 dest, u32 value, s32 regOffset, u32 flags, s
}
else
{
STRB(INDEX_POST, WA, X0, 1);
STRB(INDEX_POST, RS, X0, 1);
}
STR(INDEX_UNSIGNED, X0, X1, 0);
js.fifoBytesSinceCheck += accessSize >> 3;
@ -282,7 +282,7 @@ void JitArm64::SafeStoreFromReg(s32 dest, u32 value, s32 regOffset, u32 flags, s
EmitBackpatchRoutine(flags, jo.fastmem, jo.fastmem, RS, XA, regs_in_use, fprs_in_use);
}
gpr.Unlock(W0, W1);
gpr.Unlock(W0, W1, W30);
}
void JitArm64::lXX(UGeckoInstruction inst)

4
Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStoreFloating.cpp
View File

@ -241,7 +241,7 @@ void JitArm64::stfXX(UGeckoInstruction inst)
u32 imm_addr = 0;
bool is_immediate = false;
gpr.Lock(W0, W1);
gpr.Lock(W0, W1, W30);
fpr.Lock(Q0);
bool single = (flags & BackPatchInfo::FLAG_SIZE_F32) && fpr.IsSingle(inst.FS, true);
@ -398,6 +398,6 @@ void JitArm64::stfXX(UGeckoInstruction inst)
{
EmitBackpatchRoutine(flags, jo.fastmem, jo.fastmem, V0, XA, regs_in_use, fprs_in_use);
}
gpr.Unlock(W0, W1);
gpr.Unlock(W0, W1, W30);
fpr.Unlock(Q0);
}