Merge pull request #12488 from JosJuice/jitarm64-psq-stxx-w0
JitArm64: Remove unnecessary locking of W0 in psq_stXX
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commit
6aacbc4c35
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@ -27,9 +27,9 @@ void JitArm64::psq_lXX(UGeckoInstruction inst)
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!(m_ppc_state.feature_flags & FEATURE_FLAG_MSR_DR));
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!(m_ppc_state.feature_flags & FEATURE_FLAG_MSR_DR));
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// X30 is LR
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// X30 is LR
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// X0 is the address
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// X0 is a temporary
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// X1 contains the scale
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// X1 is the address
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// X2 is a temporary
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// X2 is the scale
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// Q0 is the return register
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// Q0 is the return register
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// Q1 is a temporary
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// Q1 is a temporary
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const s32 offset = inst.SIMM_12;
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const s32 offset = inst.SIMM_12;
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@ -156,8 +156,9 @@ void JitArm64::psq_stXX(UGeckoInstruction inst)
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!(m_ppc_state.feature_flags & FEATURE_FLAG_MSR_DR));
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!(m_ppc_state.feature_flags & FEATURE_FLAG_MSR_DR));
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// X30 is LR
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// X30 is LR
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// X0 contains the scale
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// X0 is a temporary
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// X1 is the address
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// X1 is the scale
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// X2 is the address
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// Q0 is the store register
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// Q0 is the store register
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const s32 offset = inst.SIMM_12;
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const s32 offset = inst.SIMM_12;
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@ -204,7 +205,7 @@ void JitArm64::psq_stXX(UGeckoInstruction inst)
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}
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}
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gpr.Lock(ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W30);
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gpr.Lock(ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W30);
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if (!js.assumeNoPairedQuantize || jo.memcheck || !jo.fastmem)
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if (!js.assumeNoPairedQuantize || !jo.fastmem)
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gpr.Lock(ARM64Reg::W0);
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gpr.Lock(ARM64Reg::W0);
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if (!js.assumeNoPairedQuantize && !jo.fastmem)
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if (!js.assumeNoPairedQuantize && !jo.fastmem)
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gpr.Lock(ARM64Reg::W3);
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gpr.Lock(ARM64Reg::W3);
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@ -283,7 +284,7 @@ void JitArm64::psq_stXX(UGeckoInstruction inst)
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gpr.Unlock(ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W30);
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gpr.Unlock(ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W30);
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fpr.Unlock(ARM64Reg::Q0);
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fpr.Unlock(ARM64Reg::Q0);
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if (!js.assumeNoPairedQuantize || jo.memcheck || !jo.fastmem)
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if (!js.assumeNoPairedQuantize || !jo.fastmem)
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gpr.Unlock(ARM64Reg::W0);
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gpr.Unlock(ARM64Reg::W0);
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if (!js.assumeNoPairedQuantize && !jo.fastmem)
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if (!js.assumeNoPairedQuantize && !jo.fastmem)
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gpr.Unlock(ARM64Reg::W3);
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gpr.Unlock(ARM64Reg::W3);
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