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Merge pull request #5120 from lioncash/const 

JitBase: Make MergeAllowedNextInstructions a const member function
This commit is contained in:
Markus Wick 2017-03-21 20:16:26 +01:00 committed by GitHub
parent f03fa54bcb 0d1bc53e55
commit 5854047e3a
10 changed files with 17 additions and 17 deletions
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2
Source/Core/Core/PowerPC/Jit64/Jit_FloatingPoint.cpp
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@ -492,7 +492,7 @@ void Jit64::FloatCompare(UGeckoInstruction inst, bool upper)
// Merge neighboring fcmp and cror (the primary use of cror). // Merge neighboring fcmp and cror (the primary use of cror).
UGeckoInstruction next = js.op[1].inst; UGeckoInstruction next = js.op[1].inst;
if (analyzer.HasOption(PPCAnalyst::PPCAnalyzer::OPTION_CROR_MERGE) && if (analyzer.HasOption(PPCAnalyst::PPCAnalyzer::OPTION_CROR_MERGE) &&
MergeAllowedNextInstructions(1) && next.OPCD == 19 && next.SUBOP10 == 449 && CanMergeNextInstructions(1) && next.OPCD == 19 && next.SUBOP10 == 449 &&
(next.CRBA >> 2) == crf && (next.CRBB >> 2) == crf && (next.CRBD >> 2) == crf) (next.CRBA >> 2) == crf && (next.CRBB >> 2) == crf && (next.CRBD >> 2) == crf)
{ {
js.skipInstructions = 1; js.skipInstructions = 1;

6
Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp
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@ -66,7 +66,7 @@ void Jit64::FinalizeCarry(CCFlags cond)
{ {
// Not actually merging instructions, but the effect is equivalent (we can't have // Not actually merging instructions, but the effect is equivalent (we can't have
// breakpoints/etc in between). // breakpoints/etc in between).
if (MergeAllowedNextInstructions(1) && js.op[1].wantsCAInFlags) if (CanMergeNextInstructions(1) && js.op[1].wantsCAInFlags)
{ {
if (cond == CC_C || cond == CC_NC) if (cond == CC_C || cond == CC_NC)
{ {
@ -95,7 +95,7 @@ void Jit64::FinalizeCarry(bool ca)
js.carryFlagInverted = false; js.carryFlagInverted = false;
if (js.op->wantsCA) if (js.op->wantsCA)
{ {
if (MergeAllowedNextInstructions(1) && js.op[1].wantsCAInFlags) if (CanMergeNextInstructions(1) && js.op[1].wantsCAInFlags)
{ {
if (ca) if (ca)
STC(); STC();
@ -343,7 +343,7 @@ bool Jit64::CheckMergedBranch(int crf)
if (!analyzer.HasOption(PPCAnalyst::PPCAnalyzer::OPTION_BRANCH_MERGE)) if (!analyzer.HasOption(PPCAnalyst::PPCAnalyzer::OPTION_BRANCH_MERGE))
return false; return false;
if (!MergeAllowedNextInstructions(1)) if (!CanMergeNextInstructions(1))
return false; return false;
const UGeckoInstruction& next = js.op[1].inst; const UGeckoInstruction& next = js.op[1].inst;

6
Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp
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@ -110,7 +110,7 @@ void Jit64::lXXx(UGeckoInstruction inst)
// PowerPC has no 8-bit sign extended load, but x86 does, so merge extsb with the load if we find // PowerPC has no 8-bit sign extended load, but x86 does, so merge extsb with the load if we find
// it. // it.
if (MergeAllowedNextInstructions(1) && accessSize == 8 && js.op[1].inst.OPCD == 31 && if (CanMergeNextInstructions(1) && accessSize == 8 && js.op[1].inst.OPCD == 31 &&
js.op[1].inst.SUBOP10 == 954 && js.op[1].inst.RS == inst.RD && js.op[1].inst.RA == inst.RD && js.op[1].inst.SUBOP10 == 954 && js.op[1].inst.RS == inst.RD && js.op[1].inst.RA == inst.RD &&
!js.op[1].inst.Rc) !js.op[1].inst.Rc)
{ {
@ -119,7 +119,7 @@ void Jit64::lXXx(UGeckoInstruction inst)
signExtend = true; signExtend = true;
} }
if (CPU::GetState() != CPU::CPU_STEPPING && inst.OPCD == 32 && MergeAllowedNextInstructions(2) && if (CPU::GetState() != CPU::CPU_STEPPING && inst.OPCD == 32 && CanMergeNextInstructions(2) &&
(inst.hex & 0xFFFF0000) == 0x800D0000 && (inst.hex & 0xFFFF0000) == 0x800D0000 &&
(js.op[1].inst.hex == 0x28000000 || (js.op[1].inst.hex == 0x28000000 ||
(SConfig::GetInstance().bWii && js.op[1].inst.hex == 0x2C000000)) && (SConfig::GetInstance().bWii && js.op[1].inst.hex == 0x2C000000)) &&
@ -318,7 +318,7 @@ void Jit64::dcbt(UGeckoInstruction inst)
// This is important because invalidating the block cache when we don't // This is important because invalidating the block cache when we don't
// need to is terrible for performance. // need to is terrible for performance.
// (Invalidating the jit block cache on dcbst is a heuristic.) // (Invalidating the jit block cache on dcbst is a heuristic.)
if (MergeAllowedNextInstructions(1) && js.op[1].inst.OPCD == 31 && js.op[1].inst.SUBOP10 == 54 && if (CanMergeNextInstructions(1) && js.op[1].inst.OPCD == 31 && js.op[1].inst.SUBOP10 == 54 &&
js.op[1].inst.RA == inst.RA && js.op[1].inst.RB == inst.RB) js.op[1].inst.RA == inst.RA && js.op[1].inst.RB == inst.RB)
{ {
js.skipInstructions = 1; js.skipInstructions = 1;

2
Source/Core/Core/PowerPC/Jit64/Jit_SystemRegisters.cpp
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@ -314,7 +314,7 @@ void Jit64::mfspr(UGeckoInstruction inst)
ADD(64, R(RAX), R(RDX)); ADD(64, R(RAX), R(RDX));
MOV(64, PPCSTATE(spr[SPR_TL]), R(RAX)); MOV(64, PPCSTATE(spr[SPR_TL]), R(RAX));
if (MergeAllowedNextInstructions(1)) if (CanMergeNextInstructions(1))
{ {
const UGeckoInstruction& next = js.op[1].inst; const UGeckoInstruction& next = js.op[1].inst;
// Two calls of TU/TL next to each other are extremely common in typical usage, so merge them // Two calls of TU/TL next to each other are extremely common in typical usage, so merge them

2
Source/Core/Core/PowerPC/JitArm64/Jit.cpp
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@ -834,7 +834,7 @@ void JitArm64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer* code_buf, JitBlock*
} }
CompileInstruction(ops[i]); CompileInstruction(ops[i]);
if (!MergeAllowedNextInstructions(1) || js.op[1].opinfo->type != OPTYPE_INTEGER) if (!CanMergeNextInstructions(1) || js.op[1].opinfo->type != OPTYPE_INTEGER)
FlushCarry(); FlushCarry();
// If we have a register that will never be used again, flush it. // If we have a register that will never be used again, flush it.

6
Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
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@ -73,7 +73,7 @@ void JitArm64::ComputeCarry()
return; return;
js.carryFlagSet = true; js.carryFlagSet = true;
if (MergeAllowedNextInstructions(1) && js.op[1].opinfo->type == OPTYPE_INTEGER) if (CanMergeNextInstructions(1) && js.op[1].opinfo->type == OPTYPE_INTEGER)
{ {
return; return;
} }
@ -575,7 +575,7 @@ void JitArm64::srawix(UGeckoInstruction inst)
int a = inst.RA; int a = inst.RA;
int s = inst.RS; int s = inst.RS;
int amount = inst.SH; int amount = inst.SH;
bool inplace_carry = MergeAllowedNextInstructions(1) && js.op[1].wantsCAInFlags; bool inplace_carry = CanMergeNextInstructions(1) && js.op[1].wantsCAInFlags;
if (gpr.IsImm(s)) if (gpr.IsImm(s))
{ {
@ -1286,7 +1286,7 @@ void JitArm64::srawx(UGeckoInstruction inst)
JITDISABLE(bJITIntegerOff); JITDISABLE(bJITIntegerOff);
int a = inst.RA, b = inst.RB, s = inst.RS; int a = inst.RA, b = inst.RB, s = inst.RS;
bool inplace_carry = MergeAllowedNextInstructions(1) && js.op[1].wantsCAInFlags; bool inplace_carry = CanMergeNextInstructions(1) && js.op[1].wantsCAInFlags;
if (gpr.IsImm(b) && gpr.IsImm(s)) if (gpr.IsImm(b) && gpr.IsImm(s))
{ {

4
Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp
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@ -374,7 +374,7 @@ void JitArm64::lXX(UGeckoInstruction inst)
SafeLoadToReg(d, update ? a : (a ? a : -1), offsetReg, flags, offset, update); SafeLoadToReg(d, update ? a : (a ? a : -1), offsetReg, flags, offset, update);
// LWZ idle skipping // LWZ idle skipping
if (inst.OPCD == 32 && MergeAllowedNextInstructions(2) && if (inst.OPCD == 32 && CanMergeNextInstructions(2) &&
(inst.hex & 0xFFFF0000) == 0x800D0000 && // lwz r0, XXXX(r13) (inst.hex & 0xFFFF0000) == 0x800D0000 && // lwz r0, XXXX(r13)
(js.op[1].inst.hex == 0x28000000 || (js.op[1].inst.hex == 0x28000000 ||
(SConfig::GetInstance().bWii && js.op[1].inst.hex == 0x2C000000)) && // cmpXwi r0,0 (SConfig::GetInstance().bWii && js.op[1].inst.hex == 0x2C000000)) && // cmpXwi r0,0
@ -645,7 +645,7 @@ void JitArm64::dcbt(UGeckoInstruction inst)
// This is important because invalidating the block cache when we don't // This is important because invalidating the block cache when we don't
// need to is terrible for performance. // need to is terrible for performance.
// (Invalidating the jit block cache on dcbst is a heuristic.) // (Invalidating the jit block cache on dcbst is a heuristic.)
if (MergeAllowedNextInstructions(1) && js.op[1].inst.OPCD == 31 && js.op[1].inst.SUBOP10 == 54 && if (CanMergeNextInstructions(1) && js.op[1].inst.OPCD == 31 && js.op[1].inst.SUBOP10 == 54 &&
js.op[1].inst.RA == inst.RA && js.op[1].inst.RB == inst.RB) js.op[1].inst.RA == inst.RA && js.op[1].inst.RB == inst.RB)
{ {
js.skipInstructions = 1; js.skipInstructions = 1;

2
Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp
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@ -283,7 +283,7 @@ void JitArm64::mfspr(UGeckoInstruction inst)
ADD(XA, XB, XA, ArithOption(XA, ST_LSR, 3)); ADD(XA, XB, XA, ArithOption(XA, ST_LSR, 3));
STR(INDEX_UNSIGNED, XA, PPC_REG, PPCSTATE_OFF(spr[SPR_TL])); STR(INDEX_UNSIGNED, XA, PPC_REG, PPCSTATE_OFF(spr[SPR_TL]));
if (MergeAllowedNextInstructions(1)) if (CanMergeNextInstructions(1))
{ {
const UGeckoInstruction& next = js.op[1].inst; const UGeckoInstruction& next = js.op[1].inst;
// Two calls of TU/TL next to each other are extremely common in typical usage, so merge them // Two calls of TU/TL next to each other are extremely common in typical usage, so merge them

2
Source/Core/Core/PowerPC/JitCommon/JitBase.cpp
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@ -27,7 +27,7 @@ JitBase::JitBase() = default;
JitBase::~JitBase() = default; JitBase::~JitBase() = default;
bool JitBase::MergeAllowedNextInstructions(int count) bool JitBase::CanMergeNextInstructions(int count) const
{ {
if (CPU::GetState() == CPU::CPU_STEPPING || js.instructionsLeft < count) if (CPU::GetState() == CPU::CPU_STEPPING || js.instructionsLeft < count)
return false; return false;

2
Source/Core/Core/PowerPC/JitCommon/JitBase.h
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@ -104,7 +104,7 @@ protected:
PPCAnalyst::CodeBlock code_block; PPCAnalyst::CodeBlock code_block;
PPCAnalyst::PPCAnalyzer analyzer; PPCAnalyst::PPCAnalyzer analyzer;
bool MergeAllowedNextInstructions(int count); bool CanMergeNextInstructions(int count) const;
void UpdateMemoryOptions(); void UpdateMemoryOptions();