JitBase: Rename MergeAllowedNextInstructions to CanMergeNextInstructions
This is more indicative that it's checking for something
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@ -492,7 +492,7 @@ void Jit64::FloatCompare(UGeckoInstruction inst, bool upper)
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// Merge neighboring fcmp and cror (the primary use of cror).
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UGeckoInstruction next = js.op[1].inst;
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if (analyzer.HasOption(PPCAnalyst::PPCAnalyzer::OPTION_CROR_MERGE) &&
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MergeAllowedNextInstructions(1) && next.OPCD == 19 && next.SUBOP10 == 449 &&
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CanMergeNextInstructions(1) && next.OPCD == 19 && next.SUBOP10 == 449 &&
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(next.CRBA >> 2) == crf && (next.CRBB >> 2) == crf && (next.CRBD >> 2) == crf)
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{
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js.skipInstructions = 1;
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@ -66,7 +66,7 @@ void Jit64::FinalizeCarry(CCFlags cond)
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{
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// Not actually merging instructions, but the effect is equivalent (we can't have
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// breakpoints/etc in between).
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if (MergeAllowedNextInstructions(1) && js.op[1].wantsCAInFlags)
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if (CanMergeNextInstructions(1) && js.op[1].wantsCAInFlags)
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{
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if (cond == CC_C || cond == CC_NC)
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{
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@ -95,7 +95,7 @@ void Jit64::FinalizeCarry(bool ca)
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js.carryFlagInverted = false;
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if (js.op->wantsCA)
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{
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if (MergeAllowedNextInstructions(1) && js.op[1].wantsCAInFlags)
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if (CanMergeNextInstructions(1) && js.op[1].wantsCAInFlags)
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{
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if (ca)
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STC();
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@ -343,7 +343,7 @@ bool Jit64::CheckMergedBranch(int crf)
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if (!analyzer.HasOption(PPCAnalyst::PPCAnalyzer::OPTION_BRANCH_MERGE))
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return false;
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if (!MergeAllowedNextInstructions(1))
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if (!CanMergeNextInstructions(1))
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return false;
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const UGeckoInstruction& next = js.op[1].inst;
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@ -110,7 +110,7 @@ void Jit64::lXXx(UGeckoInstruction inst)
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// PowerPC has no 8-bit sign extended load, but x86 does, so merge extsb with the load if we find
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// it.
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if (MergeAllowedNextInstructions(1) && accessSize == 8 && js.op[1].inst.OPCD == 31 &&
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if (CanMergeNextInstructions(1) && accessSize == 8 && js.op[1].inst.OPCD == 31 &&
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js.op[1].inst.SUBOP10 == 954 && js.op[1].inst.RS == inst.RD && js.op[1].inst.RA == inst.RD &&
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!js.op[1].inst.Rc)
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{
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@ -119,7 +119,7 @@ void Jit64::lXXx(UGeckoInstruction inst)
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signExtend = true;
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}
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if (CPU::GetState() != CPU::CPU_STEPPING && inst.OPCD == 32 && MergeAllowedNextInstructions(2) &&
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if (CPU::GetState() != CPU::CPU_STEPPING && inst.OPCD == 32 && CanMergeNextInstructions(2) &&
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(inst.hex & 0xFFFF0000) == 0x800D0000 &&
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(js.op[1].inst.hex == 0x28000000 ||
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(SConfig::GetInstance().bWii && js.op[1].inst.hex == 0x2C000000)) &&
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@ -318,7 +318,7 @@ void Jit64::dcbt(UGeckoInstruction inst)
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// This is important because invalidating the block cache when we don't
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// need to is terrible for performance.
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// (Invalidating the jit block cache on dcbst is a heuristic.)
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if (MergeAllowedNextInstructions(1) && js.op[1].inst.OPCD == 31 && js.op[1].inst.SUBOP10 == 54 &&
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if (CanMergeNextInstructions(1) && js.op[1].inst.OPCD == 31 && js.op[1].inst.SUBOP10 == 54 &&
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js.op[1].inst.RA == inst.RA && js.op[1].inst.RB == inst.RB)
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{
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js.skipInstructions = 1;
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@ -314,7 +314,7 @@ void Jit64::mfspr(UGeckoInstruction inst)
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ADD(64, R(RAX), R(RDX));
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MOV(64, PPCSTATE(spr[SPR_TL]), R(RAX));
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if (MergeAllowedNextInstructions(1))
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if (CanMergeNextInstructions(1))
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{
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const UGeckoInstruction& next = js.op[1].inst;
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// Two calls of TU/TL next to each other are extremely common in typical usage, so merge them
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@ -834,7 +834,7 @@ void JitArm64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer* code_buf, JitBlock*
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}
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CompileInstruction(ops[i]);
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if (!MergeAllowedNextInstructions(1) || js.op[1].opinfo->type != OPTYPE_INTEGER)
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if (!CanMergeNextInstructions(1) || js.op[1].opinfo->type != OPTYPE_INTEGER)
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FlushCarry();
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// If we have a register that will never be used again, flush it.
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@ -73,7 +73,7 @@ void JitArm64::ComputeCarry()
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return;
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js.carryFlagSet = true;
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if (MergeAllowedNextInstructions(1) && js.op[1].opinfo->type == OPTYPE_INTEGER)
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if (CanMergeNextInstructions(1) && js.op[1].opinfo->type == OPTYPE_INTEGER)
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{
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return;
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}
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@ -575,7 +575,7 @@ void JitArm64::srawix(UGeckoInstruction inst)
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int a = inst.RA;
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int s = inst.RS;
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int amount = inst.SH;
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bool inplace_carry = MergeAllowedNextInstructions(1) && js.op[1].wantsCAInFlags;
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bool inplace_carry = CanMergeNextInstructions(1) && js.op[1].wantsCAInFlags;
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if (gpr.IsImm(s))
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{
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@ -1286,7 +1286,7 @@ void JitArm64::srawx(UGeckoInstruction inst)
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JITDISABLE(bJITIntegerOff);
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int a = inst.RA, b = inst.RB, s = inst.RS;
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bool inplace_carry = MergeAllowedNextInstructions(1) && js.op[1].wantsCAInFlags;
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bool inplace_carry = CanMergeNextInstructions(1) && js.op[1].wantsCAInFlags;
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if (gpr.IsImm(b) && gpr.IsImm(s))
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{
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@ -374,7 +374,7 @@ void JitArm64::lXX(UGeckoInstruction inst)
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SafeLoadToReg(d, update ? a : (a ? a : -1), offsetReg, flags, offset, update);
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// LWZ idle skipping
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if (inst.OPCD == 32 && MergeAllowedNextInstructions(2) &&
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if (inst.OPCD == 32 && CanMergeNextInstructions(2) &&
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(inst.hex & 0xFFFF0000) == 0x800D0000 && // lwz r0, XXXX(r13)
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(js.op[1].inst.hex == 0x28000000 ||
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(SConfig::GetInstance().bWii && js.op[1].inst.hex == 0x2C000000)) && // cmpXwi r0,0
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@ -645,7 +645,7 @@ void JitArm64::dcbt(UGeckoInstruction inst)
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// This is important because invalidating the block cache when we don't
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// need to is terrible for performance.
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// (Invalidating the jit block cache on dcbst is a heuristic.)
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if (MergeAllowedNextInstructions(1) && js.op[1].inst.OPCD == 31 && js.op[1].inst.SUBOP10 == 54 &&
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if (CanMergeNextInstructions(1) && js.op[1].inst.OPCD == 31 && js.op[1].inst.SUBOP10 == 54 &&
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js.op[1].inst.RA == inst.RA && js.op[1].inst.RB == inst.RB)
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{
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js.skipInstructions = 1;
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@ -283,7 +283,7 @@ void JitArm64::mfspr(UGeckoInstruction inst)
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ADD(XA, XB, XA, ArithOption(XA, ST_LSR, 3));
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STR(INDEX_UNSIGNED, XA, PPC_REG, PPCSTATE_OFF(spr[SPR_TL]));
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if (MergeAllowedNextInstructions(1))
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if (CanMergeNextInstructions(1))
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{
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const UGeckoInstruction& next = js.op[1].inst;
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// Two calls of TU/TL next to each other are extremely common in typical usage, so merge them
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@ -27,7 +27,7 @@ JitBase::JitBase() = default;
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JitBase::~JitBase() = default;
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bool JitBase::MergeAllowedNextInstructions(int count) const
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bool JitBase::CanMergeNextInstructions(int count) const
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{
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if (CPU::GetState() == CPU::CPU_STEPPING || js.instructionsLeft < count)
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return false;
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@ -104,7 +104,7 @@ protected:
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PPCAnalyst::CodeBlock code_block;
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PPCAnalyst::PPCAnalyzer analyzer;
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bool MergeAllowedNextInstructions(int count) const;
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bool CanMergeNextInstructions(int count) const;
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void UpdateMemoryOptions();
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