dsp: small disasm fix
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@2983 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -272,7 +272,7 @@ void mrr(const UDSPInstruction& opc)
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// LRR $D, @$S
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// 0001 1000 0ssd dddd
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// Move value from data memory pointed by addressing register $S toregister $D.
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// Move value from data memory pointed by addressing register $S to register $D.
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// FIXME: Perform additional operation depending on destination register.
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void lrr(const UDSPInstruction& opc)
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{
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@ -935,7 +935,7 @@ void andi(const UDSPInstruction& opc)
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// Logic OR of accumulator mid part $acD.m with immediate value I.
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void ori(const UDSPInstruction& opc)
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{
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u8 reg = 0x1e + ((opc.hex >> 8) & 0x1);
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u8 reg = DSP_REG_ACM0 + ((opc.hex >> 8) & 0x1);
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u16 imm = dsp_fetch_code();
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g_dsp.r[reg] |= imm;
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@ -1423,7 +1423,7 @@ void sbclr(const UDSPInstruction& opc)
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}
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// SBSET #I
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// 0001 0010 0000 0iiii
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// 0001 0010 0000 0iii
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// Set bit of status register $sr. Bit number is calculated by adding 6 to
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// immediate value I.
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void sbset(const UDSPInstruction& opc)
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@ -209,7 +209,7 @@ const DSPOPCTemplate opcodes[] =
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{"LOOPI", 0x1000, 0xff00, DSPInterpreter::loopi, nop, 1, 1, {{P_IMM, 1, 0, 0, 0x00ff}}, NULL, NULL},
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{"BLOOPI", 0x1100, 0xff00, DSPInterpreter::bloopi, nop, 2, 2, {{P_IMM, 1, 0, 0, 0x00ff}, {P_VAL, 2, 1, 0, 0xffff}}, NULL, NULL},
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{"ADDARN", 0x0010, 0xfff0, DSPInterpreter::addarn, nop, 2, 2, {{P_REG, 1, 0, 0, 0x00c0}, {P_REG, 2, 1, 0, 0x0003}}, NULL, NULL},
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{"ADDARN", 0x0010, 0xfff0, DSPInterpreter::addarn, nop, 2, 2, {{P_REG, 1, 0, 0, 0x00c0}, {P_REG04, 2, 1, 0, 0x0003}}, NULL, NULL},
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// opcodes that can be extended
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@ -37,7 +37,8 @@ enum partype_t
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P_MEM = 0x0003,
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P_STR = 0x0004,
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P_REG = 0x8000,
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P_REG08 = P_REG | 0x0800,
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P_REG04 = P_REG | 0x0400, // IX
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P_REG08 = P_REG | 0x0800,
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P_REG18 = P_REG | 0x1800,
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P_REGM18 = P_REG | 0x1810, // used in multiply instructions
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P_REG19 = P_REG | 0x1900,
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