From 508b32b94f043330fbcf06ae3d7a75ecfd69ff93 Mon Sep 17 00:00:00 2001
From: nakeee <nakeee@gmail.com>
Date: Thu, 16 Apr 2009 16:02:54 +0000
Subject: [PATCH] dsp: small disasm fix

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@2983 8ced0084-cf51-0410-be5f-012b33b47a6e
---
 Source/Core/DSPCore/Src/DSPInterpreter.cpp | 6 +++---
 Source/Core/DSPCore/Src/DSPTables.cpp      | 2 +-
 Source/Core/DSPCore/Src/DSPTables.h        | 3 ++-
 3 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/Source/Core/DSPCore/Src/DSPInterpreter.cpp b/Source/Core/DSPCore/Src/DSPInterpreter.cpp
index b0623d2aa3..e9499c23a2 100644
--- a/Source/Core/DSPCore/Src/DSPInterpreter.cpp
+++ b/Source/Core/DSPCore/Src/DSPInterpreter.cpp
@@ -272,7 +272,7 @@ void mrr(const UDSPInstruction& opc)
 
 // LRR $D, @$S
 // 0001 1000 0ssd dddd
-// Move value from data memory pointed by addressing register $S toregister $D.
+// Move value from data memory pointed by addressing register $S to register $D.
 // FIXME: Perform additional operation depending on destination register.
 void lrr(const UDSPInstruction& opc)
 {
@@ -935,7 +935,7 @@ void andi(const UDSPInstruction& opc)
 // Logic OR of accumulator mid part $acD.m with immediate value I.
 void ori(const UDSPInstruction& opc)
 {
-	u8 reg  = 0x1e + ((opc.hex >> 8) & 0x1);
+	u8 reg  = DSP_REG_ACM0 + ((opc.hex >> 8) & 0x1);
 	u16 imm = dsp_fetch_code();
 	g_dsp.r[reg] |= imm;
 
@@ -1423,7 +1423,7 @@ void sbclr(const UDSPInstruction& opc)
 }
 
 // SBSET #I
-// 0001 0010 0000 0iiii
+// 0001 0010 0000 0iii
 // Set bit of status register $sr. Bit number is calculated by adding 6 to
 // immediate value I.
 void sbset(const UDSPInstruction& opc)
diff --git a/Source/Core/DSPCore/Src/DSPTables.cpp b/Source/Core/DSPCore/Src/DSPTables.cpp
index 5437ae9edc..d3f015921d 100644
--- a/Source/Core/DSPCore/Src/DSPTables.cpp
+++ b/Source/Core/DSPCore/Src/DSPTables.cpp
@@ -209,7 +209,7 @@ const DSPOPCTemplate opcodes[] =
 	{"LOOPI",   0x1000, 0xff00, DSPInterpreter::loopi,  nop, 1, 1, {{P_IMM, 1, 0, 0, 0x00ff}}, NULL, NULL},
 	{"BLOOPI",  0x1100, 0xff00, DSPInterpreter::bloopi, nop, 2, 2, {{P_IMM, 1, 0, 0, 0x00ff}, {P_VAL, 2, 1, 0, 0xffff}}, NULL, NULL},
 
-	{"ADDARN",  0x0010, 0xfff0, DSPInterpreter::addarn, nop, 2, 2, {{P_REG, 1, 0, 0, 0x00c0}, {P_REG, 2, 1, 0, 0x0003}}, NULL, NULL},
+	{"ADDARN",  0x0010, 0xfff0, DSPInterpreter::addarn, nop, 2, 2, {{P_REG, 1, 0, 0, 0x00c0}, {P_REG04, 2, 1, 0, 0x0003}}, NULL, NULL},
 	
 
 	// opcodes that can be extended
diff --git a/Source/Core/DSPCore/Src/DSPTables.h b/Source/Core/DSPCore/Src/DSPTables.h
index 42dae8841a..4a5990a53e 100644
--- a/Source/Core/DSPCore/Src/DSPTables.h
+++ b/Source/Core/DSPCore/Src/DSPTables.h
@@ -37,7 +37,8 @@ enum partype_t
 	P_MEM		= 0x0003,
 	P_STR		= 0x0004,
 	P_REG		= 0x8000,
-	P_REG08		= P_REG | 0x0800,
+	P_REG04     = P_REG | 0x0400, // IX
+	P_REG08		= P_REG | 0x0800, 
 	P_REG18		= P_REG | 0x1800,
 	P_REGM18	= P_REG | 0x1810, // used in multiply instructions
 	P_REG19		= P_REG | 0x1900,