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Merge pull request #8852 from Tilka/dsp2 

DSP: fix typos and improve docs
This commit is contained in:
Pierre Bourdon 2020-06-08 04:56:10 +02:00 committed by GitHub
parent 94f317010e 48f96491e8
commit 4c64e18b24
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 54 additions and 55 deletions
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3
Source/Core/Core/HW/DSPLLE/DSPSymbols.cpp
View File

@ -20,7 +20,6 @@ DSPSymbolDB g_dsp_symbol_db;
static std::map<u16, int> addr_to_line; static std::map<u16, int> addr_to_line;
static std::map<int, u16> line_to_addr; static std::map<int, u16> line_to_addr;
static std::map<int, const char*> line_to_symbol;
static std::vector<std::string> lines; static std::vector<std::string> lines;
static int line_counter = 0; static int line_counter = 0;
@ -44,7 +43,7 @@ int Line2Addr(int line) // -1 for not found
const char* GetLineText(int line) const char* GetLineText(int line)
{ {
if (line > 0 && line < (int)lines.size()) if (line >= 0 && line < (int)lines.size())
{ {
return lines[line].c_str(); return lines[line].c_str();
} }

106
docs/DSP/GameCube_DSP_Users_Manual/GameCube_DSP_Users_Manual.tex
View File

@ -1944,16 +1944,16 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\end{DSPOpcodeBytefield} \end{DSPOpcodeBytefield}
\begin{DSPOpcodeFormat} \begin{DSPOpcodeFormat}
LRR $D, @$S LRR $D, @$arS
\end{DSPOpcodeFormat} \end{DSPOpcodeFormat}
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Move value from data memory pointed by addressing register \Register{\$S} to register \Register{\$D}. \item Move value from data memory pointed by addressing register \Register{\$arS} to register \Register{\$D}.
Perform an additional operation depending on destination register. Perform an additional operation depending on destination register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
$D = MEM[$S] $D = MEM[$arS]
$pc++ $pc++
\end{DSPOpcodeOperation} \end{DSPOpcodeOperation}
\end{DSPOpcode} \end{DSPOpcode}
@ -1964,18 +1964,18 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\end{DSPOpcodeBytefield} \end{DSPOpcodeBytefield}
\begin{DSPOpcodeFormat} \begin{DSPOpcodeFormat}
LRRD $D, @$S LRRD $D, @$arS
\end{DSPOpcodeFormat} \end{DSPOpcodeFormat}
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Move value from data memory pointed by addressing register \Register{\$S} to register \Register{\$D}. \item Move value from data memory pointed by addressing register \Register{\$arS} to register \Register{\$D}.
Decrements register \Register{\$S}. Decrements register \Register{\$arS}.
Perform additional operation depending on destination register. Perform additional operation depending on destination register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
$D = MEM[$S] $D = MEM[$arS]
$S-- $arS--
$pc++ $pc++
\end{DSPOpcodeOperation} \end{DSPOpcodeOperation}
\end{DSPOpcode} \end{DSPOpcode}
@ -1986,18 +1986,18 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\end{DSPOpcodeBytefield} \end{DSPOpcodeBytefield}
\begin{DSPOpcodeFormat} \begin{DSPOpcodeFormat}
LRRI $D, @$S LRRI $D, @$arS
\end{DSPOpcodeFormat} \end{DSPOpcodeFormat}
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Move value from data memory pointed by addressing register \Register{\$S} to register \Register{\$D}. \item Move value from data memory pointed by addressing register \Register{\$arS} to register \Register{\$D}.
Increments register \Register{\$S}. Increments register \Register{\$arS}.
Perform additional operation depending on destination register. Perform additional operation depending on destination register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
$D = MEM[$S] $D = MEM[$arS]
$S++ $arS++
$pc++ $pc++
\end{DSPOpcodeOperation} \end{DSPOpcodeOperation}
\end{DSPOpcode} \end{DSPOpcode}
@ -2008,18 +2008,18 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\end{DSPOpcodeBytefield} \end{DSPOpcodeBytefield}
\begin{DSPOpcodeFormat} \begin{DSPOpcodeFormat}
LRRN $D, @$S LRRN $D, @$arS
\end{DSPOpcodeFormat} \end{DSPOpcodeFormat}
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Move value from data memory pointed by addressing register \Register{\$S} to register \Register{\$D}. \item Move value from data memory pointed by addressing register \Register{\$arS} to register \Register{\$D}.
Add indexing register \Register{\$(0x4+S)} to register \Register{\$S}. Add indexing register \Register{\$ixS} to register \Register{\$arS}.
Perform additional operation depending on destination register. Perform additional operation depending on destination register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
$D = MEM[$S] $D = MEM[$arS]
$S += $(4+S) $arS += $ixS
$pc++ $pc++
\end{DSPOpcodeOperation} \end{DSPOpcodeOperation}
\end{DSPOpcode} \end{DSPOpcode}
@ -2995,16 +2995,16 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\end{DSPOpcodeBytefield} \end{DSPOpcodeBytefield}
\begin{DSPOpcodeFormat} \begin{DSPOpcodeFormat}
SRR @$D, $S SRR @$arD, $S
\end{DSPOpcodeFormat} \end{DSPOpcodeFormat}
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Store value from source register \Register{\$S} to a memory location pointed by addressing \item Store value from source register \Register{\$S} to a memory location pointed by addressing
register \Register{\$D}. Perform additional operation depending on source register. register \Register{\$arD}. Perform additional operation depending on source register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
MEM[$D] = $S MEM[$arD] = $S
$pc++ $pc++
\end{DSPOpcodeOperation} \end{DSPOpcodeOperation}
\end{DSPOpcode} \end{DSPOpcode}
@ -3015,17 +3015,17 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\end{DSPOpcodeBytefield} \end{DSPOpcodeBytefield}
\begin{DSPOpcodeFormat} \begin{DSPOpcodeFormat}
SRRD @$D, $S SRRD @$arD, $S
\end{DSPOpcodeFormat} \end{DSPOpcodeFormat}
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Store value from source register \Register{\$S} to a memory location pointed by addressing \item Store value from source register \Register{\$S} to a memory location pointed by addressing
register \Register{\$D}. Decrement register \Register{\$D}. Perform additional operation depending on source register. register \Register{\$arD}. Decrement register \Register{\$arD}. Perform additional operation depending on source register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
MEM[$D] = $S MEM[$arD] = $S
$D-- $arD--
$pc++ $pc++
\end{DSPOpcodeOperation} \end{DSPOpcodeOperation}
\end{DSPOpcode} \end{DSPOpcode}
@ -3036,17 +3036,17 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\end{DSPOpcodeBytefield} \end{DSPOpcodeBytefield}
\begin{DSPOpcodeFormat} \begin{DSPOpcodeFormat}
SRRI @$D, $S SRRI @$arD, $S
\end{DSPOpcodeFormat} \end{DSPOpcodeFormat}
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Store value from source register \Register{\$S} to a memory location pointed by addressing \item Store value from source register \Register{\$S} to a memory location pointed by addressing
register \Register{\$D}. Increment register \Register{\$D}. Perform additional operation depending on source register. register \Register{\$arD}. Increment register \Register{\$arD}. Perform additional operation depending on source register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
MEM[$D] = $S MEM[$arD] = $S
$D++ $arD++
$pc++ $pc++
\end{DSPOpcodeOperation} \end{DSPOpcodeOperation}
\end{DSPOpcode} \end{DSPOpcode}
@ -3057,18 +3057,18 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\end{DSPOpcodeBytefield} \end{DSPOpcodeBytefield}
\begin{DSPOpcodeFormat} \begin{DSPOpcodeFormat}
SRRN @$D, $S SRRN @$arD, $S
\end{DSPOpcodeFormat} \end{DSPOpcodeFormat}
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Store value from source register \Register{\$S} to a memory location pointed by addressing \item Store value from source register \Register{\$S} to a memory location pointed by addressing
register \Register{\$D}. Add indexing register \Register{\$(0x4+D)} to register \Register{\$D}. register \Register{\$arD}. Add indexing register \Register{\$ixD} to register \Register{\$arD}.
Perform additional operation depending on source register. Perform additional operation depending on source register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
MEM[$D] = $S MEM[$arD] = $S
$D += $(4+D) $arD += $ixD
$pc++ $pc++
\end{DSPOpcodeOperation} \end{DSPOpcodeOperation}
\end{DSPOpcode} \end{DSPOpcode}
@ -3305,17 +3305,17 @@ allow extending (8 lower bits of opcode not used by opcode). Extended opcodes do
\end{DSPOpcodeBytefield} \end{DSPOpcodeBytefield}
\begin{DSPOpcodeFormat} \begin{DSPOpcodeFormat}
'L $(0x18+D), @$S 'L $(0x18+D), @$arS
\end{DSPOpcodeFormat} \end{DSPOpcodeFormat}
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Load register \Register{\$(0x18+D)} with value from memory pointed by register \Register{\$S}. \item Load register \Register{\$(0x18+D)} with value from memory pointed by register \Register{\$arS}.
Post increment register \Register{\$S}. Post increment register \Register{\$arS}.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
$(0x18+D) = MEM[$S] $(0x18+D) = MEM[$arS]
$S++ $arS++
\end{DSPOpcodeOperation} \end{DSPOpcodeOperation}
\end{DSPOpcode} \end{DSPOpcode}
@ -3325,17 +3325,17 @@ allow extending (8 lower bits of opcode not used by opcode). Extended opcodes do
\end{DSPOpcodeBytefield} \end{DSPOpcodeBytefield}
\begin{DSPOpcodeFormat} \begin{DSPOpcodeFormat}
'LN $(0x18+D), @$S 'LN $(0x18+D), @$arS
\end{DSPOpcodeFormat} \end{DSPOpcodeFormat}
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Load register \Register{\$(0x18+D)} with value from memory pointed by register \Register{\$S}. \item Load register \Register{\$(0x18+D)} with value from memory pointed by register \Register{\$arS}.
Add indexing register register \Register{\$(0x04+S)} to register \Register{\$S}. Add indexing register \Register{\$ixS} to register \Register{\$arS}.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
$(0x18+D) = MEM[$S] $(0x18+D) = MEM[$arS]
$S += $(0x04+S) $arS += $ixS
\end{DSPOpcodeOperation} \end{DSPOpcodeOperation}
\end{DSPOpcode} \end{DSPOpcode}
@ -3474,17 +3474,17 @@ allow extending (8 lower bits of opcode not used by opcode). Extended opcodes do
\end{DSPOpcodeBytefield} \end{DSPOpcodeBytefield}
\begin{DSPOpcodeFormat} \begin{DSPOpcodeFormat}
'S @$D, $(0x1c+D) 'S @$D, $(0x1c+S)
\end{DSPOpcodeFormat} \end{DSPOpcodeFormat}
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Store value of register \Register{\$(0x1c+S)} in the memory pointed by register \Register{\$D}. \item Store value of register \Register{\$(0x1c+S)} in the memory pointed by register \Register{\$arD}.
Post increment register \Register{\$D}. Post increment register \Register{\$arD}.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
MEM[$D] = $(0x1c+D) MEM[$arD] = $(0x1c+S)
$S++ $arD++
\end{DSPOpcodeOperation} \end{DSPOpcodeOperation}
\end{DSPOpcode} \end{DSPOpcode}
@ -3587,17 +3587,17 @@ allow extending (8 lower bits of opcode not used by opcode). Extended opcodes do
\end{DSPOpcodeBytefield} \end{DSPOpcodeBytefield}
\begin{DSPOpcodeFormat} \begin{DSPOpcodeFormat}
'SN @$D, $(0x1c+D) 'SN @$arD, $(0x1c+S)
\end{DSPOpcodeFormat} \end{DSPOpcodeFormat}
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Store value of register \Register{\$(0x1c+S)} in the memory pointed by register \Register{\$D}. \item Store value of register \Register{\$(0x1c+S)} in the memory pointed by register \Register{\$arD}.
Add indexing register register \Register{\$(0x04+D)} to register \Register{\$D}. Add indexing register \Register{\$ixD} to register \Register{\$arD}.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
MEM[$D] = $(0x1c+D) MEM[$arD] = $(0x1c+S)
$D += $(0x04+D) $arD += $ixD
\end{DSPOpcodeOperation} \end{DSPOpcodeOperation}
\end{DSPOpcode} \end{DSPOpcode}