docs/DSP: fix typos in 'S and 'SN and improve readability
This commit is contained in:
Tillmann Karras
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d5c00b8909
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48f96491e8
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@ -1944,16 +1944,16 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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\end{DSPOpcodeBytefield}
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\begin{DSPOpcodeFormat}
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LRR $D, @$S
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LRR $D, @$arS
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\end{DSPOpcodeFormat}
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\begin{DSPOpcodeDescription}
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\item Move value from data memory pointed by addressing register \Register{\$S} to register \Register{\$D}.
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\item Move value from data memory pointed by addressing register \Register{\$arS} to register \Register{\$D}.
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Perform an additional operation depending on destination register.
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\end{DSPOpcodeDescription}
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\begin{DSPOpcodeOperation}
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$D = MEM[$S]
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$D = MEM[$arS]
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$pc++
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -1964,18 +1964,18 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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\end{DSPOpcodeBytefield}
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\begin{DSPOpcodeFormat}
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LRRD $D, @$S
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LRRD $D, @$arS
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\end{DSPOpcodeFormat}
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\begin{DSPOpcodeDescription}
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\item Move value from data memory pointed by addressing register \Register{\$S} to register \Register{\$D}.
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Decrements register \Register{\$S}.
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\item Move value from data memory pointed by addressing register \Register{\$arS} to register \Register{\$D}.
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Decrements register \Register{\$arS}.
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Perform additional operation depending on destination register.
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\end{DSPOpcodeDescription}
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\begin{DSPOpcodeOperation}
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$D = MEM[$S]
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$S--
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$D = MEM[$arS]
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$arS--
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$pc++
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -1986,18 +1986,18 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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\end{DSPOpcodeBytefield}
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\begin{DSPOpcodeFormat}
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LRRI $D, @$S
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LRRI $D, @$arS
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\end{DSPOpcodeFormat}
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\begin{DSPOpcodeDescription}
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\item Move value from data memory pointed by addressing register \Register{\$S} to register \Register{\$D}.
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Increments register \Register{\$S}.
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\item Move value from data memory pointed by addressing register \Register{\$arS} to register \Register{\$D}.
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Increments register \Register{\$arS}.
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Perform additional operation depending on destination register.
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\end{DSPOpcodeDescription}
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\begin{DSPOpcodeOperation}
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$D = MEM[$S]
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$S++
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$D = MEM[$arS]
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$arS++
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$pc++
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -2008,18 +2008,18 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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\end{DSPOpcodeBytefield}
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\begin{DSPOpcodeFormat}
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LRRN $D, @$S
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LRRN $D, @$arS
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\end{DSPOpcodeFormat}
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\begin{DSPOpcodeDescription}
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\item Move value from data memory pointed by addressing register \Register{\$S} to register \Register{\$D}.
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Add indexing register \Register{\$(0x4+S)} to register \Register{\$S}.
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\item Move value from data memory pointed by addressing register \Register{\$arS} to register \Register{\$D}.
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Add indexing register \Register{\$ixS} to register \Register{\$arS}.
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Perform additional operation depending on destination register.
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\end{DSPOpcodeDescription}
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\begin{DSPOpcodeOperation}
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$D = MEM[$S]
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$S += $(4+S)
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$D = MEM[$arS]
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$arS += $ixS
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$pc++
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -2995,16 +2995,16 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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\end{DSPOpcodeBytefield}
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\begin{DSPOpcodeFormat}
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SRR @$D, $S
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SRR @$arD, $S
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\end{DSPOpcodeFormat}
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\begin{DSPOpcodeDescription}
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\item Store value from source register \Register{\$S} to a memory location pointed by addressing
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register \Register{\$D}. Perform additional operation depending on source register.
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register \Register{\$arD}. Perform additional operation depending on source register.
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\end{DSPOpcodeDescription}
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\begin{DSPOpcodeOperation}
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MEM[$D] = $S
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MEM[$arD] = $S
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$pc++
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -3015,17 +3015,17 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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\end{DSPOpcodeBytefield}
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\begin{DSPOpcodeFormat}
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SRRD @$D, $S
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SRRD @$arD, $S
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\end{DSPOpcodeFormat}
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\begin{DSPOpcodeDescription}
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\item Store value from source register \Register{\$S} to a memory location pointed by addressing
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register \Register{\$D}. Decrement register \Register{\$D}. Perform additional operation depending on source register.
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register \Register{\$arD}. Decrement register \Register{\$arD}. Perform additional operation depending on source register.
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\end{DSPOpcodeDescription}
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\begin{DSPOpcodeOperation}
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MEM[$D] = $S
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$D--
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MEM[$arD] = $S
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$arD--
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$pc++
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -3036,17 +3036,17 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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\end{DSPOpcodeBytefield}
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\begin{DSPOpcodeFormat}
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SRRI @$D, $S
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SRRI @$arD, $S
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\end{DSPOpcodeFormat}
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\begin{DSPOpcodeDescription}
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\item Store value from source register \Register{\$S} to a memory location pointed by addressing
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register \Register{\$D}. Increment register \Register{\$D}. Perform additional operation depending on source register.
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register \Register{\$arD}. Increment register \Register{\$arD}. Perform additional operation depending on source register.
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\end{DSPOpcodeDescription}
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\begin{DSPOpcodeOperation}
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MEM[$D] = $S
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$D++
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MEM[$arD] = $S
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$arD++
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$pc++
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -3057,18 +3057,18 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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\end{DSPOpcodeBytefield}
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\begin{DSPOpcodeFormat}
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SRRN @$D, $S
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SRRN @$arD, $S
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\end{DSPOpcodeFormat}
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\begin{DSPOpcodeDescription}
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\item Store value from source register \Register{\$S} to a memory location pointed by addressing
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register \Register{\$D}. Add indexing register \Register{\$(0x4+D)} to register \Register{\$D}.
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register \Register{\$arD}. Add indexing register \Register{\$ixD} to register \Register{\$arD}.
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Perform additional operation depending on source register.
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\end{DSPOpcodeDescription}
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\begin{DSPOpcodeOperation}
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MEM[$D] = $S
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$D += $(4+D)
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MEM[$arD] = $S
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$arD += $ixD
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$pc++
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -3305,17 +3305,17 @@ allow extending (8 lower bits of opcode not used by opcode). Extended opcodes do
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\end{DSPOpcodeBytefield}
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\begin{DSPOpcodeFormat}
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'L $(0x18+D), @$S
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'L $(0x18+D), @$arS
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\end{DSPOpcodeFormat}
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\begin{DSPOpcodeDescription}
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\item Load register \Register{\$(0x18+D)} with value from memory pointed by register \Register{\$S}.
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Post increment register \Register{\$S}.
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\item Load register \Register{\$(0x18+D)} with value from memory pointed by register \Register{\$arS}.
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Post increment register \Register{\$arS}.
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\end{DSPOpcodeDescription}
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\begin{DSPOpcodeOperation}
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$(0x18+D) = MEM[$S]
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$S++
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$(0x18+D) = MEM[$arS]
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$arS++
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -3325,17 +3325,17 @@ allow extending (8 lower bits of opcode not used by opcode). Extended opcodes do
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\end{DSPOpcodeBytefield}
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\begin{DSPOpcodeFormat}
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'LN $(0x18+D), @$S
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'LN $(0x18+D), @$arS
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\end{DSPOpcodeFormat}
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\begin{DSPOpcodeDescription}
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\item Load register \Register{\$(0x18+D)} with value from memory pointed by register \Register{\$S}.
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Add indexing register register \Register{\$(0x04+S)} to register \Register{\$S}.
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\item Load register \Register{\$(0x18+D)} with value from memory pointed by register \Register{\$arS}.
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Add indexing register \Register{\$ixS} to register \Register{\$arS}.
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\end{DSPOpcodeDescription}
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\begin{DSPOpcodeOperation}
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$(0x18+D) = MEM[$S]
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$S += $(0x04+S)
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$(0x18+D) = MEM[$arS]
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$arS += $ixS
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -3474,17 +3474,17 @@ allow extending (8 lower bits of opcode not used by opcode). Extended opcodes do
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\end{DSPOpcodeBytefield}
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\begin{DSPOpcodeFormat}
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'S @$D, $(0x1c+D)
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'S @$D, $(0x1c+S)
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\end{DSPOpcodeFormat}
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\begin{DSPOpcodeDescription}
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\item Store value of register \Register{\$(0x1c+S)} in the memory pointed by register \Register{\$D}.
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Post increment register \Register{\$D}.
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\item Store value of register \Register{\$(0x1c+S)} in the memory pointed by register \Register{\$arD}.
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Post increment register \Register{\$arD}.
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\end{DSPOpcodeDescription}
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\begin{DSPOpcodeOperation}
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MEM[$D] = $(0x1c+D)
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$S++
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MEM[$arD] = $(0x1c+S)
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$arD++
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -3587,17 +3587,17 @@ allow extending (8 lower bits of opcode not used by opcode). Extended opcodes do
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\end{DSPOpcodeBytefield}
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\begin{DSPOpcodeFormat}
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'SN @$D, $(0x1c+D)
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'SN @$arD, $(0x1c+S)
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\end{DSPOpcodeFormat}
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\begin{DSPOpcodeDescription}
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\item Store value of register \Register{\$(0x1c+S)} in the memory pointed by register \Register{\$D}.
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Add indexing register register \Register{\$(0x04+D)} to register \Register{\$D}.
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\item Store value of register \Register{\$(0x1c+S)} in the memory pointed by register \Register{\$arD}.
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Add indexing register \Register{\$ixD} to register \Register{\$arD}.
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\end{DSPOpcodeDescription}
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\begin{DSPOpcodeOperation}
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MEM[$D] = $(0x1c+D)
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$D += $(0x04+D)
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MEM[$arD] = $(0x1c+S)
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$arD += $ixD
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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