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Merge pull request #10031 from Pokechu22/dsp-int-less 

DSPInterpreter: Fix IsLess
This commit is contained in:
Mai M 2021-08-15 22:50:02 -04:00 committed by GitHub
parent 4c179fe448 14119c86a4
commit 35c64d1f57
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 17 additions and 4 deletions
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5
Source/Core/Core/DSP/Interpreter/DSPInterpreter.cpp
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@ -250,10 +250,7 @@ bool Interpreter::CheckCondition(u8 condition) const
const auto IsCarry = [this] { return IsSRFlagSet(SR_CARRY); }; const auto IsCarry = [this] { return IsSRFlagSet(SR_CARRY); };
const auto IsOverflow = [this] { return IsSRFlagSet(SR_OVERFLOW); }; const auto IsOverflow = [this] { return IsSRFlagSet(SR_OVERFLOW); };
const auto IsOverS32 = [this] { return IsSRFlagSet(SR_OVER_S32); }; const auto IsOverS32 = [this] { return IsSRFlagSet(SR_OVER_S32); };
const auto IsLess = [this] { const auto IsLess = [this] { return IsSRFlagSet(SR_OVERFLOW) != IsSRFlagSet(SR_SIGN); };
const auto& state = m_dsp_core.DSPState();
return (state.r.sr & SR_OVERFLOW) != (state.r.sr & SR_SIGN);
};
const auto IsZero = [this] { return IsSRFlagSet(SR_ARITH_ZERO); }; const auto IsZero = [this] { return IsSRFlagSet(SR_ARITH_ZERO); };
const auto IsLogicZero = [this] { return IsSRFlagSet(SR_LOGIC_ZERO); }; const auto IsLogicZero = [this] { return IsSRFlagSet(SR_LOGIC_ZERO); };
const auto IsConditionA = [this] { const auto IsConditionA = [this] {

16
Source/DSPSpy/tests/less_test.ds Normal file
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@ -0,0 +1,16 @@
incdir "tests"
include "dsp_base.inc"
CLR $acc0
CLR $acc1
LRI $ac0.h, #0x0050
LRI $ac1.h, #0x0050
ADD $acc0, $acc1 ; Causes acc0 to overflow, and thus also become negative
LRI $AX0.L, #0x0000
IFL
LRI $AX0.L, #0x0001
CALL send_back
; We're done, DO NOT DELETE THIS LINE
JMP end_of_test