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Minor DSP JIT optimizations

This commit is contained in:
Sintendo 2015-01-21 01:18:39 +01:00
parent 235fa05171
commit 34afe08de9
1 changed files with 17 additions and 21 deletions
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38
Source/Core/Core/DSP/Jit/DSPJitCCUtil.cpp
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@ -17,14 +17,14 @@ void DSPEmitter::Update_SR_Register(Gen::X64Reg val)
gpr.getReg(DSP_REG_SR,sr_reg); gpr.getReg(DSP_REG_SR,sr_reg);
// // 0x04 // // 0x04
// if (_Value == 0) g_dsp.r[DSP_REG_SR] |= SR_ARITH_ZERO; // if (_Value == 0) g_dsp.r[DSP_REG_SR] |= SR_ARITH_ZERO;
CMP(64, R(val), Imm8(0)); TEST(64, R(val), R(val));
FixupBranch notZero = J_CC(CC_NZ); FixupBranch notZero = J_CC(CC_NZ);
OR(16, sr_reg, Imm16(SR_ARITH_ZERO)); OR(16, sr_reg, Imm16(SR_ARITH_ZERO | SR_TOP2BITS));
FixupBranch end = J();
SetJumpTarget(notZero); SetJumpTarget(notZero);
// // 0x08 // // 0x08
// if (_Value < 0) g_dsp.r[DSP_REG_SR] |= SR_SIGN; // if (_Value < 0) g_dsp.r[DSP_REG_SR] |= SR_SIGN;
CMP(64, R(val), Imm8(0));
FixupBranch greaterThanEqual = J_CC(CC_GE); FixupBranch greaterThanEqual = J_CC(CC_GE);
OR(16, sr_reg, Imm16(SR_SIGN)); OR(16, sr_reg, Imm16(SR_SIGN));
SetJumpTarget(greaterThanEqual); SetJumpTarget(greaterThanEqual);
@ -39,15 +39,16 @@ void DSPEmitter::Update_SR_Register(Gen::X64Reg val)
// // 0x20 - Checks if top bits of m are equal // // 0x20 - Checks if top bits of m are equal
// if (((_Value & 0xc0000000) == 0) || ((_Value & 0xc0000000) == 0xc0000000)) // if (((_Value & 0xc0000000) == 0) || ((_Value & 0xc0000000) == 0xc0000000))
AND(32, R(val), Imm32(0xc0000000)); MOV(32, R(RDX), Imm32(0xc0000000));
CMP(32, R(val), Imm32(0)); AND(32, R(val), R(RDX));
FixupBranch zeroC = J_CC(CC_E); FixupBranch zeroC = J_CC(CC_Z);
CMP(32, R(val), Imm32(0xc0000000)); CMP(32, R(val), R(RDX));
FixupBranch cC = J_CC(CC_NE); FixupBranch cC = J_CC(CC_NE);
SetJumpTarget(zeroC); SetJumpTarget(zeroC);
// g_dsp.r[DSP_REG_SR] |= SR_TOP2BITS; // g_dsp.r[DSP_REG_SR] |= SR_TOP2BITS;
OR(16, sr_reg, Imm16(SR_TOP2BITS)); OR(16, sr_reg, Imm16(SR_TOP2BITS));
SetJumpTarget(cC); SetJumpTarget(cC);
SetJumpTarget(end);
gpr.putReg(DSP_REG_SR); gpr.putReg(DSP_REG_SR);
} }
@ -88,8 +89,7 @@ void DSPEmitter::Update_SR_Register64_Carry(X64Reg val, X64Reg carry_ovfl)
// Overflow = ((acc ^ res) & (ax ^ res)) < 0 // Overflow = ((acc ^ res) & (ax ^ res)) < 0
XOR(64, R(carry_ovfl), R(val)); XOR(64, R(carry_ovfl), R(val));
XOR(64, R(RDX), R(val)); XOR(64, R(RDX), R(val));
AND(64, R(carry_ovfl), R(RDX)); TEST(64, R(carry_ovfl), R(RDX));
CMP(64, R(carry_ovfl), Imm8(0));
FixupBranch noOverflow = J_CC(CC_GE); FixupBranch noOverflow = J_CC(CC_GE);
OR(16, sr_reg, Imm16(SR_OVERFLOW | SR_OVERFLOW_STICKY)); OR(16, sr_reg, Imm16(SR_OVERFLOW | SR_OVERFLOW_STICKY));
SetJumpTarget(noOverflow); SetJumpTarget(noOverflow);
@ -123,8 +123,7 @@ void DSPEmitter::Update_SR_Register64_Carry2(X64Reg val, X64Reg carry_ovfl)
// Overflow = ((acc ^ res) & (ax ^ res)) < 0 // Overflow = ((acc ^ res) & (ax ^ res)) < 0
XOR(64, R(carry_ovfl), R(val)); XOR(64, R(carry_ovfl), R(val));
XOR(64, R(RDX), R(val)); XOR(64, R(RDX), R(val));
AND(64, R(carry_ovfl), R(RDX)); TEST(64, R(carry_ovfl), R(RDX));
CMP(64, R(carry_ovfl), Imm8(0));
FixupBranch noOverflow = J_CC(CC_GE); FixupBranch noOverflow = J_CC(CC_GE);
OR(16, sr_reg, Imm16(SR_OVERFLOW | SR_OVERFLOW_STICKY)); OR(16, sr_reg, Imm16(SR_OVERFLOW | SR_OVERFLOW_STICKY));
SetJumpTarget(noOverflow); SetJumpTarget(noOverflow);
@ -143,33 +142,30 @@ void DSPEmitter::Update_SR_Register16(X64Reg val)
// // 0x04 // // 0x04
// if (_Value == 0) g_dsp.r[DSP_REG_SR] |= SR_ARITH_ZERO; // if (_Value == 0) g_dsp.r[DSP_REG_SR] |= SR_ARITH_ZERO;
CMP(64, R(val), Imm8(0)); TEST(64, R(val), R(val));
FixupBranch notZero = J_CC(CC_NZ); FixupBranch notZero = J_CC(CC_NZ);
OR(16, sr_reg, Imm16(SR_ARITH_ZERO)); OR(16, sr_reg, Imm16(SR_ARITH_ZERO | SR_TOP2BITS));
FixupBranch end = J();
SetJumpTarget(notZero); SetJumpTarget(notZero);
// // 0x08 // // 0x08
// if (_Value < 0) g_dsp.r[DSP_REG_SR] |= SR_SIGN; // if (_Value < 0) g_dsp.r[DSP_REG_SR] |= SR_SIGN;
CMP(64, R(val), Imm8(0));
FixupBranch greaterThanEqual = J_CC(CC_GE); FixupBranch greaterThanEqual = J_CC(CC_GE);
OR(16, sr_reg, Imm16(SR_SIGN)); OR(16, sr_reg, Imm16(SR_SIGN));
SetJumpTarget(greaterThanEqual); SetJumpTarget(greaterThanEqual);
// // 0x20 - Checks if top bits of m are equal // // 0x20 - Checks if top bits of m are equal
// if ((((u16)_Value >> 14) == 0) || (((u16)_Value >> 14) == 3)) // if ((((u16)_Value >> 14) == 0) || (((u16)_Value >> 14) == 3))
//AND(32, R(val), Imm32(0xc0000000));
SHR(16, R(val), Imm8(14)); SHR(16, R(val), Imm8(14));
CMP(16, R(val), Imm16(0)); TEST(16, R(val), R(val));
FixupBranch nZero = J_CC(CC_NE); FixupBranch isZero = J_CC(CC_Z);
OR(16, sr_reg, Imm16(SR_TOP2BITS));
FixupBranch cC = J();
SetJumpTarget(nZero);
CMP(16, R(val), Imm16(3)); CMP(16, R(val), Imm16(3));
FixupBranch notThree = J_CC(CC_NE); FixupBranch notThree = J_CC(CC_NE);
SetJumpTarget(isZero);
// g_dsp.r[DSP_REG_SR] |= SR_TOP2BITS; // g_dsp.r[DSP_REG_SR] |= SR_TOP2BITS;
OR(16, sr_reg, Imm16(SR_TOP2BITS)); OR(16, sr_reg, Imm16(SR_TOP2BITS));
SetJumpTarget(notThree); SetJumpTarget(notThree);
SetJumpTarget(cC); SetJumpTarget(end);
gpr.putReg(DSP_REG_SR); gpr.putReg(DSP_REG_SR);
} }