From 34afe08de93e42994033093399da9d8994433c42 Mon Sep 17 00:00:00 2001 From: Sintendo Date: Wed, 21 Jan 2015 01:18:39 +0100 Subject: [PATCH] Minor DSP JIT optimizations --- Source/Core/Core/DSP/Jit/DSPJitCCUtil.cpp | 38 ++++++++++------------- 1 file changed, 17 insertions(+), 21 deletions(-) diff --git a/Source/Core/Core/DSP/Jit/DSPJitCCUtil.cpp b/Source/Core/Core/DSP/Jit/DSPJitCCUtil.cpp index 8e9d86aed8..933babb736 100644 --- a/Source/Core/Core/DSP/Jit/DSPJitCCUtil.cpp +++ b/Source/Core/Core/DSP/Jit/DSPJitCCUtil.cpp @@ -17,14 +17,14 @@ void DSPEmitter::Update_SR_Register(Gen::X64Reg val) gpr.getReg(DSP_REG_SR,sr_reg); // // 0x04 // if (_Value == 0) g_dsp.r[DSP_REG_SR] |= SR_ARITH_ZERO; - CMP(64, R(val), Imm8(0)); + TEST(64, R(val), R(val)); FixupBranch notZero = J_CC(CC_NZ); - OR(16, sr_reg, Imm16(SR_ARITH_ZERO)); + OR(16, sr_reg, Imm16(SR_ARITH_ZERO | SR_TOP2BITS)); + FixupBranch end = J(); SetJumpTarget(notZero); // // 0x08 // if (_Value < 0) g_dsp.r[DSP_REG_SR] |= SR_SIGN; - CMP(64, R(val), Imm8(0)); FixupBranch greaterThanEqual = J_CC(CC_GE); OR(16, sr_reg, Imm16(SR_SIGN)); SetJumpTarget(greaterThanEqual); @@ -39,15 +39,16 @@ void DSPEmitter::Update_SR_Register(Gen::X64Reg val) // // 0x20 - Checks if top bits of m are equal // if (((_Value & 0xc0000000) == 0) || ((_Value & 0xc0000000) == 0xc0000000)) - AND(32, R(val), Imm32(0xc0000000)); - CMP(32, R(val), Imm32(0)); - FixupBranch zeroC = J_CC(CC_E); - CMP(32, R(val), Imm32(0xc0000000)); + MOV(32, R(RDX), Imm32(0xc0000000)); + AND(32, R(val), R(RDX)); + FixupBranch zeroC = J_CC(CC_Z); + CMP(32, R(val), R(RDX)); FixupBranch cC = J_CC(CC_NE); SetJumpTarget(zeroC); // g_dsp.r[DSP_REG_SR] |= SR_TOP2BITS; OR(16, sr_reg, Imm16(SR_TOP2BITS)); SetJumpTarget(cC); + SetJumpTarget(end); gpr.putReg(DSP_REG_SR); } @@ -88,8 +89,7 @@ void DSPEmitter::Update_SR_Register64_Carry(X64Reg val, X64Reg carry_ovfl) // Overflow = ((acc ^ res) & (ax ^ res)) < 0 XOR(64, R(carry_ovfl), R(val)); XOR(64, R(RDX), R(val)); - AND(64, R(carry_ovfl), R(RDX)); - CMP(64, R(carry_ovfl), Imm8(0)); + TEST(64, R(carry_ovfl), R(RDX)); FixupBranch noOverflow = J_CC(CC_GE); OR(16, sr_reg, Imm16(SR_OVERFLOW | SR_OVERFLOW_STICKY)); SetJumpTarget(noOverflow); @@ -123,8 +123,7 @@ void DSPEmitter::Update_SR_Register64_Carry2(X64Reg val, X64Reg carry_ovfl) // Overflow = ((acc ^ res) & (ax ^ res)) < 0 XOR(64, R(carry_ovfl), R(val)); XOR(64, R(RDX), R(val)); - AND(64, R(carry_ovfl), R(RDX)); - CMP(64, R(carry_ovfl), Imm8(0)); + TEST(64, R(carry_ovfl), R(RDX)); FixupBranch noOverflow = J_CC(CC_GE); OR(16, sr_reg, Imm16(SR_OVERFLOW | SR_OVERFLOW_STICKY)); SetJumpTarget(noOverflow); @@ -143,33 +142,30 @@ void DSPEmitter::Update_SR_Register16(X64Reg val) // // 0x04 // if (_Value == 0) g_dsp.r[DSP_REG_SR] |= SR_ARITH_ZERO; - CMP(64, R(val), Imm8(0)); + TEST(64, R(val), R(val)); FixupBranch notZero = J_CC(CC_NZ); - OR(16, sr_reg, Imm16(SR_ARITH_ZERO)); + OR(16, sr_reg, Imm16(SR_ARITH_ZERO | SR_TOP2BITS)); + FixupBranch end = J(); SetJumpTarget(notZero); // // 0x08 // if (_Value < 0) g_dsp.r[DSP_REG_SR] |= SR_SIGN; - CMP(64, R(val), Imm8(0)); FixupBranch greaterThanEqual = J_CC(CC_GE); OR(16, sr_reg, Imm16(SR_SIGN)); SetJumpTarget(greaterThanEqual); // // 0x20 - Checks if top bits of m are equal // if ((((u16)_Value >> 14) == 0) || (((u16)_Value >> 14) == 3)) - //AND(32, R(val), Imm32(0xc0000000)); SHR(16, R(val), Imm8(14)); - CMP(16, R(val), Imm16(0)); - FixupBranch nZero = J_CC(CC_NE); - OR(16, sr_reg, Imm16(SR_TOP2BITS)); - FixupBranch cC = J(); - SetJumpTarget(nZero); + TEST(16, R(val), R(val)); + FixupBranch isZero = J_CC(CC_Z); CMP(16, R(val), Imm16(3)); FixupBranch notThree = J_CC(CC_NE); + SetJumpTarget(isZero); // g_dsp.r[DSP_REG_SR] |= SR_TOP2BITS; OR(16, sr_reg, Imm16(SR_TOP2BITS)); SetJumpTarget(notThree); - SetJumpTarget(cC); + SetJumpTarget(end); gpr.putReg(DSP_REG_SR); }