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PowerPC: Remove NPC macro.

This commit is contained in:
Admiral H. Curtiss 2023-01-09 21:57:09 +01:00
parent be8d0b76ca
commit 2f3187eba9
No known key found for this signature in database
GPG Key ID: F051B4C4044F33FB
11 changed files with 35 additions and 36 deletions
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2
Source/Core/Core/GeckoCode.cpp
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@ -282,7 +282,7 @@ void RunCodeHandler()
"PC = {:#010x}, SP = {:#010x}, SFP = {:#010x}", "PC = {:#010x}, SP = {:#010x}, SFP = {:#010x}",
PowerPC::ppcState.pc, SP, SFP); PowerPC::ppcState.pc, SP, SFP);
LR = HLE_TRAMPOLINE_ADDRESS; LR = HLE_TRAMPOLINE_ADDRESS;
PowerPC::ppcState.pc = NPC = ENTRY_POINT; PowerPC::ppcState.pc = PowerPC::ppcState.npc = ENTRY_POINT;
} }
} // namespace Gecko } // namespace Gecko

4
Source/Core/Core/HLE/HLE_Misc.cpp
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@ -17,7 +17,7 @@ namespace HLE_Misc
// According to the PPC ABI, the return value is always in r3. // According to the PPC ABI, the return value is always in r3.
void UnimplementedFunction() void UnimplementedFunction()
{ {
NPC = LR; PowerPC::ppcState.npc = LR;
} }
void HBReload() void HBReload()
@ -58,7 +58,7 @@ void GeckoReturnTrampoline()
// Stack frame is built in GeckoCode.cpp, Gecko::RunCodeHandler. // Stack frame is built in GeckoCode.cpp, Gecko::RunCodeHandler.
u32 SP = GPR(1); u32 SP = GPR(1);
GPR(1) = PowerPC::HostRead_U32(SP + 8); GPR(1) = PowerPC::HostRead_U32(SP + 8);
NPC = PowerPC::HostRead_U32(SP + 12); PowerPC::ppcState.npc = PowerPC::HostRead_U32(SP + 12);
LR = PowerPC::HostRead_U32(SP + 16); LR = PowerPC::HostRead_U32(SP + 16);
PowerPC::ppcState.cr.Set(PowerPC::HostRead_U32(SP + 20)); PowerPC::ppcState.cr.Set(PowerPC::HostRead_U32(SP + 20));
for (int i = 0; i < 14; ++i) for (int i = 0; i < 14; ++i)

2
Source/Core/Core/HLE/HLE_OS.cpp
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@ -40,7 +40,7 @@ void HLE_OSPanic()
ERROR_LOG_FMT(OSREPORT_HLE, "{:08x}->{:08x}| OSPanic: {}: {}", LR, PowerPC::ppcState.pc, error, ERROR_LOG_FMT(OSREPORT_HLE, "{:08x}->{:08x}| OSPanic: {}: {}", LR, PowerPC::ppcState.pc, error,
msg); msg);
NPC = LR; PowerPC::ppcState.npc = LR;
} }
// Generalized function for printing formatted string. // Generalized function for printing formatted string.

8
Source/Core/Core/PowerPC/CachedInterpreter/CachedInterpreter.cpp
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@ -136,7 +136,7 @@ void CachedInterpreter::SingleStep()
static void EndBlock(UGeckoInstruction data) static void EndBlock(UGeckoInstruction data)
{ {
PowerPC::ppcState.pc = NPC; PowerPC::ppcState.pc = PowerPC::ppcState.npc;
PowerPC::ppcState.downcount -= data.hex; PowerPC::ppcState.downcount -= data.hex;
PowerPC::UpdatePerformanceMonitor(data.hex, 0, 0); PowerPC::UpdatePerformanceMonitor(data.hex, 0, 0);
} }
@ -154,12 +154,12 @@ static void UpdateNumFloatingPointInstructions(UGeckoInstruction data)
static void WritePC(UGeckoInstruction data) static void WritePC(UGeckoInstruction data)
{ {
PowerPC::ppcState.pc = data.hex; PowerPC::ppcState.pc = data.hex;
NPC = data.hex + 4; PowerPC::ppcState.npc = data.hex + 4;
} }
static void WriteBrokenBlockNPC(UGeckoInstruction data) static void WriteBrokenBlockNPC(UGeckoInstruction data)
{ {
NPC = data.hex; PowerPC::ppcState.npc = data.hex;
} }
static bool CheckFPU(u32 data) static bool CheckFPU(u32 data)
@ -244,7 +244,7 @@ void CachedInterpreter::Jit(u32 address)
if (code_block.m_memory_exception) if (code_block.m_memory_exception)
{ {
// Address of instruction could not be translated // Address of instruction could not be translated
NPC = nextPC; PowerPC::ppcState.npc = nextPC;
PowerPC::ppcState.Exceptions |= EXCEPTION_ISI; PowerPC::ppcState.Exceptions |= EXCEPTION_ISI;
PowerPC::CheckExceptions(); PowerPC::CheckExceptions();
WARN_LOG_FMT(POWERPC, "ISI exception at {:#010x}", nextPC); WARN_LOG_FMT(POWERPC, "ISI exception at {:#010x}", nextPC);

6
Source/Core/Core/PowerPC/Interpreter/Interpreter.cpp
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@ -74,7 +74,7 @@ bool IsInvalidPairedSingleExecution(UGeckoInstruction inst)
void UpdatePC() void UpdatePC()
{ {
last_pc = PowerPC::ppcState.pc; last_pc = PowerPC::ppcState.pc;
PowerPC::ppcState.pc = NPC; PowerPC::ppcState.pc = PowerPC::ppcState.npc;
} }
} // Anonymous namespace } // Anonymous namespace
@ -151,7 +151,7 @@ int Interpreter::SingleStepInner()
return PPCTables::GetOpInfo(m_prev_inst)->numCycles; return PPCTables::GetOpInfo(m_prev_inst)->numCycles;
} }
NPC = PowerPC::ppcState.pc + sizeof(UGeckoInstruction); PowerPC::ppcState.npc = PowerPC::ppcState.pc + sizeof(UGeckoInstruction);
m_prev_inst.hex = PowerPC::Read_Opcode(PowerPC::ppcState.pc); m_prev_inst.hex = PowerPC::Read_Opcode(PowerPC::ppcState.pc);
// Uncomment to trace the interpreter // Uncomment to trace the interpreter
@ -234,7 +234,7 @@ void Interpreter::SingleStep()
if (PowerPC::ppcState.Exceptions != 0) if (PowerPC::ppcState.Exceptions != 0)
{ {
PowerPC::CheckExceptions(); PowerPC::CheckExceptions();
PowerPC::ppcState.pc = NPC; PowerPC::ppcState.pc = PowerPC::ppcState.npc;
} }
} }

14
Source/Core/Core/PowerPC/Interpreter/Interpreter_Branch.cpp
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@ -18,9 +18,9 @@ void Interpreter::bx(UGeckoInstruction inst)
const auto address = u32(SignExt26(inst.LI << 2)); const auto address = u32(SignExt26(inst.LI << 2));
if (inst.AA) if (inst.AA)
NPC = address; PowerPC::ppcState.npc = address;
else else
NPC = PowerPC::ppcState.pc + address; PowerPC::ppcState.npc = PowerPC::ppcState.pc + address;
m_end_block = true; m_end_block = true;
} }
@ -47,9 +47,9 @@ void Interpreter::bcx(UGeckoInstruction inst)
const auto address = u32(SignExt16(s16(inst.BD << 2))); const auto address = u32(SignExt16(s16(inst.BD << 2)));
if (inst.AA) if (inst.AA)
NPC = address; PowerPC::ppcState.npc = address;
else else
NPC = PowerPC::ppcState.pc + address; PowerPC::ppcState.npc = PowerPC::ppcState.pc + address;
} }
m_end_block = true; m_end_block = true;
@ -65,7 +65,7 @@ void Interpreter::bcctrx(UGeckoInstruction inst)
if (condition != 0) if (condition != 0)
{ {
NPC = CTR & (~3); PowerPC::ppcState.npc = CTR & (~3);
if (inst.LK_3) if (inst.LK_3)
LR = PowerPC::ppcState.pc + 4; LR = PowerPC::ppcState.pc + 4;
} }
@ -84,7 +84,7 @@ void Interpreter::bclrx(UGeckoInstruction inst)
if ((counter & condition) != 0) if ((counter & condition) != 0)
{ {
NPC = LR & (~3); PowerPC::ppcState.npc = LR & (~3);
if (inst.LK_3) if (inst.LK_3)
LR = PowerPC::ppcState.pc + 4; LR = PowerPC::ppcState.pc + 4;
} }
@ -118,7 +118,7 @@ void Interpreter::rfi(UGeckoInstruction inst)
// PowerPC::CheckExceptions(); // PowerPC::CheckExceptions();
// else // else
// set NPC to saved offset and resume // set NPC to saved offset and resume
NPC = SRR0; PowerPC::ppcState.npc = SRR0;
m_end_block = true; m_end_block = true;
} }

2
Source/Core/Core/PowerPC/Jit64/Jit.cpp
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@ -830,7 +830,7 @@ void Jit64::Jit(u32 em_address, bool clear_cache_and_retry_on_failure)
if (code_block.m_memory_exception) if (code_block.m_memory_exception)
{ {
// Address of instruction could not be translated // Address of instruction could not be translated
NPC = nextPC; PowerPC::ppcState.npc = nextPC;
PowerPC::ppcState.Exceptions |= EXCEPTION_ISI; PowerPC::ppcState.Exceptions |= EXCEPTION_ISI;
PowerPC::CheckExceptions(); PowerPC::CheckExceptions();
WARN_LOG_FMT(POWERPC, "ISI exception at {:#010x}", nextPC); WARN_LOG_FMT(POWERPC, "ISI exception at {:#010x}", nextPC);

2
Source/Core/Core/PowerPC/JitArm64/Jit.cpp
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@ -780,7 +780,7 @@ void JitArm64::Jit(u32 em_address, bool clear_cache_and_retry_on_failure)
if (code_block.m_memory_exception) if (code_block.m_memory_exception)
{ {
// Address of instruction could not be translated // Address of instruction could not be translated
NPC = nextPC; PowerPC::ppcState.npc = nextPC;
PowerPC::ppcState.Exceptions |= EXCEPTION_ISI; PowerPC::ppcState.Exceptions |= EXCEPTION_ISI;
PowerPC::CheckExceptions(); PowerPC::CheckExceptions();
WARN_LOG_FMT(POWERPC, "ISI exception at {:#010x}", nextPC); WARN_LOG_FMT(POWERPC, "ISI exception at {:#010x}", nextPC);

2
Source/Core/Core/PowerPC/MMU.cpp
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@ -1390,7 +1390,7 @@ static void GenerateDSIException(u32 effective_address, bool write)
static void GenerateISIException(u32 effective_address) static void GenerateISIException(u32 effective_address)
{ {
// Address of instruction could not be translated // Address of instruction could not be translated
NPC = effective_address; PowerPC::ppcState.npc = effective_address;
PowerPC::ppcState.Exceptions |= EXCEPTION_ISI; PowerPC::ppcState.Exceptions |= EXCEPTION_ISI;
WARN_LOG_FMT(POWERPC, "ISI exception at {:#010x}", PowerPC::ppcState.pc); WARN_LOG_FMT(POWERPC, "ISI exception at {:#010x}", PowerPC::ppcState.pc);

28
Source/Core/Core/PowerPC/PowerPC.cpp
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@ -489,12 +489,12 @@ void CheckExceptions()
if (exceptions & EXCEPTION_ISI) if (exceptions & EXCEPTION_ISI)
{ {
SRR0 = NPC; SRR0 = PowerPC::ppcState.npc;
// Page fault occurred // Page fault occurred
SRR1 = (MSR.Hex & 0x87C0FFFF) | (1 << 30); SRR1 = (MSR.Hex & 0x87C0FFFF) | (1 << 30);
MSR.LE = MSR.ILE; MSR.LE = MSR.ILE;
MSR.Hex &= ~0x04EF36; MSR.Hex &= ~0x04EF36;
PowerPC::ppcState.pc = NPC = 0x00000400; PowerPC::ppcState.pc = PowerPC::ppcState.npc = 0x00000400;
DEBUG_LOG_FMT(POWERPC, "EXCEPTION_ISI"); DEBUG_LOG_FMT(POWERPC, "EXCEPTION_ISI");
ppcState.Exceptions &= ~EXCEPTION_ISI; ppcState.Exceptions &= ~EXCEPTION_ISI;
@ -506,18 +506,18 @@ void CheckExceptions()
SRR1 |= MSR.Hex & 0x87C0FFFF; SRR1 |= MSR.Hex & 0x87C0FFFF;
MSR.LE = MSR.ILE; MSR.LE = MSR.ILE;
MSR.Hex &= ~0x04EF36; MSR.Hex &= ~0x04EF36;
PowerPC::ppcState.pc = NPC = 0x00000700; PowerPC::ppcState.pc = PowerPC::ppcState.npc = 0x00000700;
DEBUG_LOG_FMT(POWERPC, "EXCEPTION_PROGRAM"); DEBUG_LOG_FMT(POWERPC, "EXCEPTION_PROGRAM");
ppcState.Exceptions &= ~EXCEPTION_PROGRAM; ppcState.Exceptions &= ~EXCEPTION_PROGRAM;
} }
else if (exceptions & EXCEPTION_SYSCALL) else if (exceptions & EXCEPTION_SYSCALL)
{ {
SRR0 = NPC; SRR0 = PowerPC::ppcState.npc;
SRR1 = MSR.Hex & 0x87C0FFFF; SRR1 = MSR.Hex & 0x87C0FFFF;
MSR.LE = MSR.ILE; MSR.LE = MSR.ILE;
MSR.Hex &= ~0x04EF36; MSR.Hex &= ~0x04EF36;
PowerPC::ppcState.pc = NPC = 0x00000C00; PowerPC::ppcState.pc = PowerPC::ppcState.npc = 0x00000C00;
DEBUG_LOG_FMT(POWERPC, "EXCEPTION_SYSCALL (PC={:08x})", PowerPC::ppcState.pc); DEBUG_LOG_FMT(POWERPC, "EXCEPTION_SYSCALL (PC={:08x})", PowerPC::ppcState.pc);
ppcState.Exceptions &= ~EXCEPTION_SYSCALL; ppcState.Exceptions &= ~EXCEPTION_SYSCALL;
@ -529,7 +529,7 @@ void CheckExceptions()
SRR1 = MSR.Hex & 0x87C0FFFF; SRR1 = MSR.Hex & 0x87C0FFFF;
MSR.LE = MSR.ILE; MSR.LE = MSR.ILE;
MSR.Hex &= ~0x04EF36; MSR.Hex &= ~0x04EF36;
PowerPC::ppcState.pc = NPC = 0x00000800; PowerPC::ppcState.pc = PowerPC::ppcState.npc = 0x00000800;
DEBUG_LOG_FMT(POWERPC, "EXCEPTION_FPU_UNAVAILABLE"); DEBUG_LOG_FMT(POWERPC, "EXCEPTION_FPU_UNAVAILABLE");
ppcState.Exceptions &= ~EXCEPTION_FPU_UNAVAILABLE; ppcState.Exceptions &= ~EXCEPTION_FPU_UNAVAILABLE;
@ -544,7 +544,7 @@ void CheckExceptions()
SRR1 = MSR.Hex & 0x87C0FFFF; SRR1 = MSR.Hex & 0x87C0FFFF;
MSR.LE = MSR.ILE; MSR.LE = MSR.ILE;
MSR.Hex &= ~0x04EF36; MSR.Hex &= ~0x04EF36;
PowerPC::ppcState.pc = NPC = 0x00000300; PowerPC::ppcState.pc = PowerPC::ppcState.npc = 0x00000300;
// DSISR and DAR regs are changed in GenerateDSIException() // DSISR and DAR regs are changed in GenerateDSIException()
DEBUG_LOG_FMT(POWERPC, "EXCEPTION_DSI"); DEBUG_LOG_FMT(POWERPC, "EXCEPTION_DSI");
@ -556,7 +556,7 @@ void CheckExceptions()
SRR1 = MSR.Hex & 0x87C0FFFF; SRR1 = MSR.Hex & 0x87C0FFFF;
MSR.LE = MSR.ILE; MSR.LE = MSR.ILE;
MSR.Hex &= ~0x04EF36; MSR.Hex &= ~0x04EF36;
PowerPC::ppcState.pc = NPC = 0x00000600; PowerPC::ppcState.pc = PowerPC::ppcState.npc = 0x00000600;
// TODO crazy amount of DSISR options to check out // TODO crazy amount of DSISR options to check out
@ -582,11 +582,11 @@ void CheckExternalExceptions()
if (exceptions & EXCEPTION_EXTERNAL_INT) if (exceptions & EXCEPTION_EXTERNAL_INT)
{ {
// Pokemon gets this "too early", it hasn't a handler yet // Pokemon gets this "too early", it hasn't a handler yet
SRR0 = NPC; SRR0 = PowerPC::ppcState.npc;
SRR1 = MSR.Hex & 0x87C0FFFF; SRR1 = MSR.Hex & 0x87C0FFFF;
MSR.LE = MSR.ILE; MSR.LE = MSR.ILE;
MSR.Hex &= ~0x04EF36; MSR.Hex &= ~0x04EF36;
PowerPC::ppcState.pc = NPC = 0x00000500; PowerPC::ppcState.pc = PowerPC::ppcState.npc = 0x00000500;
DEBUG_LOG_FMT(POWERPC, "EXCEPTION_EXTERNAL_INT"); DEBUG_LOG_FMT(POWERPC, "EXCEPTION_EXTERNAL_INT");
ppcState.Exceptions &= ~EXCEPTION_EXTERNAL_INT; ppcState.Exceptions &= ~EXCEPTION_EXTERNAL_INT;
@ -595,22 +595,22 @@ void CheckExternalExceptions()
} }
else if (exceptions & EXCEPTION_PERFORMANCE_MONITOR) else if (exceptions & EXCEPTION_PERFORMANCE_MONITOR)
{ {
SRR0 = NPC; SRR0 = PowerPC::ppcState.npc;
SRR1 = MSR.Hex & 0x87C0FFFF; SRR1 = MSR.Hex & 0x87C0FFFF;
MSR.LE = MSR.ILE; MSR.LE = MSR.ILE;
MSR.Hex &= ~0x04EF36; MSR.Hex &= ~0x04EF36;
PowerPC::ppcState.pc = NPC = 0x00000F00; PowerPC::ppcState.pc = PowerPC::ppcState.npc = 0x00000F00;
DEBUG_LOG_FMT(POWERPC, "EXCEPTION_PERFORMANCE_MONITOR"); DEBUG_LOG_FMT(POWERPC, "EXCEPTION_PERFORMANCE_MONITOR");
ppcState.Exceptions &= ~EXCEPTION_PERFORMANCE_MONITOR; ppcState.Exceptions &= ~EXCEPTION_PERFORMANCE_MONITOR;
} }
else if (exceptions & EXCEPTION_DECREMENTER) else if (exceptions & EXCEPTION_DECREMENTER)
{ {
SRR0 = NPC; SRR0 = PowerPC::ppcState.npc;
SRR1 = MSR.Hex & 0x87C0FFFF; SRR1 = MSR.Hex & 0x87C0FFFF;
MSR.LE = MSR.ILE; MSR.LE = MSR.ILE;
MSR.Hex &= ~0x04EF36; MSR.Hex &= ~0x04EF36;
PowerPC::ppcState.pc = NPC = 0x00000900; PowerPC::ppcState.pc = PowerPC::ppcState.npc = 0x00000900;
DEBUG_LOG_FMT(POWERPC, "EXCEPTION_DECREMENTER"); DEBUG_LOG_FMT(POWERPC, "EXCEPTION_DECREMENTER");
ppcState.Exceptions &= ~EXCEPTION_DECREMENTER; ppcState.Exceptions &= ~EXCEPTION_DECREMENTER;

1
Source/Core/Core/PowerPC/PowerPC.h
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@ -245,7 +245,6 @@ void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst);
#define THRM1(ppc_state) ((UReg_THRM12&)(ppc_state).spr[SPR_THRM1]) #define THRM1(ppc_state) ((UReg_THRM12&)(ppc_state).spr[SPR_THRM1])
#define THRM2(ppc_state) ((UReg_THRM12&)(ppc_state).spr[SPR_THRM2]) #define THRM2(ppc_state) ((UReg_THRM12&)(ppc_state).spr[SPR_THRM2])
#define THRM3(ppc_state) ((UReg_THRM3&)(ppc_state).spr[SPR_THRM3]) #define THRM3(ppc_state) ((UReg_THRM3&)(ppc_state).spr[SPR_THRM3])
#define NPC PowerPC::ppcState.npc
#define FPSCR PowerPC::ppcState.fpscr #define FPSCR PowerPC::ppcState.fpscr
#define MSR PowerPC::ppcState.msr #define MSR PowerPC::ppcState.msr
#define GPR(n) PowerPC::ppcState.gpr[n] #define GPR(n) PowerPC::ppcState.gpr[n]