PowerPC: Remove PC macro.

This commit is contained in:
Admiral H. Curtiss 2023-01-09 21:49:50 +01:00
parent 82f3170876
commit be8d0b76ca
No known key found for this signature in database
GPG Key ID: F051B4C4044F33FB
30 changed files with 151 additions and 127 deletions

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@ -60,7 +60,7 @@ InstructionAttributes CodeTrace::GetInstructionAttributes(const TraceOutput& ins
// decision has to be made, otherwise used afterwards on a log file.
InstructionAttributes tmp_attributes;
tmp_attributes.instruction = instruction.instruction;
tmp_attributes.address = PC;
tmp_attributes.address = PowerPC::ppcState.pc;
std::string instr = instruction.instruction;
std::smatch match;
@ -108,9 +108,9 @@ TraceOutput CodeTrace::SaveCurrentInstruction() const
{
// Quickly save instruction and memory target for fast logging.
TraceOutput output;
const std::string instr = PowerPC::debug_interface.Disassemble(PC);
const std::string instr = PowerPC::debug_interface.Disassemble(PowerPC::ppcState.pc);
output.instruction = instr;
output.address = PC;
output.address = PowerPC::ppcState.pc;
if (IsInstructionLoadStore(output.instruction))
output.memory_target = PowerPC::debug_interface.GetMemoryAddressFromInstruction(instr);

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@ -473,7 +473,7 @@ bool CBoot::Load_BS2(Core::System& system, const std::string& boot_rom_filename)
PowerPC::ppcState.spr[SPR_DBAT3L] = 0xfff00001;
SetupBAT(/*is_wii*/ false);
PC = 0x81200150;
PowerPC::ppcState.pc = 0x81200150;
return true;
}
@ -572,7 +572,7 @@ bool CBoot::BootUp(Core::System& system, std::unique_ptr<BootParameters> boot)
SConfig::OnNewTitleLoad();
PC = executable.reader->GetEntryPoint();
PowerPC::ppcState.pc = executable.reader->GetEntryPoint();
if (executable.reader->LoadSymbols())
{

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@ -57,10 +57,10 @@ void PresetTimeBaseTicks()
void CBoot::RunFunction(u32 address)
{
PC = address;
PowerPC::ppcState.pc = address;
LR = 0x00;
while (PC != 0x00)
while (PowerPC::ppcState.pc != 0x00)
PowerPC::SingleStep();
}
@ -206,7 +206,7 @@ bool CBoot::RunApploader(bool is_wii, const DiscIO::VolumeDisc& volume,
HLE::UnPatch("AppLoaderReport");
// return
PC = PowerPC::ppcState.gpr[3];
PowerPC::ppcState.pc = PowerPC::ppcState.gpr[3];
return true;
}

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@ -106,7 +106,7 @@ void PrintCallstack(Common::Log::LogType type, Common::Log::LogLevel level)
GENERIC_LOG_FMT(type, level, " LR = 0 - this is bad");
}
if (g_symbolDB.GetDescription(PC) != g_symbolDB.GetDescription(LR))
if (g_symbolDB.GetDescription(PowerPC::ppcState.pc) != g_symbolDB.GetDescription(LR))
{
GENERIC_LOG_FMT(type, level, " * {} [ LR = {:08x} ]", g_symbolDB.GetDescription(LR), LR);
}

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@ -268,7 +268,7 @@ void RunCodeHandler()
PowerPC::HostWrite_U32(SP + 8, SP);
// SP + 4 is reserved for the codehandler to save LR to the stack.
PowerPC::HostWrite_U32(SFP, SP + 8); // Real stack frame
PowerPC::HostWrite_U32(PC, SP + 12);
PowerPC::HostWrite_U32(PowerPC::ppcState.pc, SP + 12);
PowerPC::HostWrite_U32(LR, SP + 16);
PowerPC::HostWrite_U32(PowerPC::ppcState.cr.Get(), SP + 20);
// Registers FPR0->13 are volatile
@ -280,9 +280,9 @@ void RunCodeHandler()
DEBUG_LOG_FMT(ACTIONREPLAY,
"GeckoCodes: Initiating phantom branch-and-link. "
"PC = {:#010x}, SP = {:#010x}, SFP = {:#010x}",
PC, SP, SFP);
PowerPC::ppcState.pc, SP, SFP);
LR = HLE_TRAMPOLINE_ADDRESS;
PC = NPC = ENTRY_POINT;
PowerPC::ppcState.pc = NPC = ENTRY_POINT;
}
} // namespace Gecko

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@ -37,7 +37,8 @@ void HLE_OSPanic()
StringPopBackIf(&msg, '\n');
PanicAlertFmt("OSPanic: {}: {}", error, msg);
ERROR_LOG_FMT(OSREPORT_HLE, "{:08x}->{:08x}| OSPanic: {}: {}", LR, PC, error, msg);
ERROR_LOG_FMT(OSREPORT_HLE, "{:08x}->{:08x}| OSPanic: {}: {}", LR, PowerPC::ppcState.pc, error,
msg);
NPC = LR;
}
@ -79,7 +80,8 @@ void HLE_GeneralDebugPrint(ParameterType parameter_type)
StringPopBackIf(&report_message, '\n');
NOTICE_LOG_FMT(OSREPORT_HLE, "{:08x}->{:08x}| {}", LR, PC, SHIFTJISToUTF8(report_message));
NOTICE_LOG_FMT(OSREPORT_HLE, "{:08x}->{:08x}| {}", LR, PowerPC::ppcState.pc,
SHIFTJISToUTF8(report_message));
}
// Generalized function for printing formatted string using parameter list.
@ -115,7 +117,8 @@ void HLE_write_console()
StringPopBackIf(&report_message, '\n');
NOTICE_LOG_FMT(OSREPORT_HLE, "{:08x}->{:08x}| {}", LR, PC, SHIFTJISToUTF8(report_message));
NOTICE_LOG_FMT(OSREPORT_HLE, "{:08x}->{:08x}| {}", LR, PowerPC::ppcState.pc,
SHIFTJISToUTF8(report_message));
}
// Log (v)dprintf message if fd is 1 (stdout) or 2 (stderr)
@ -126,7 +129,8 @@ void HLE_LogDPrint(ParameterType parameter_type)
std::string report_message = GetStringVA(4, parameter_type);
StringPopBackIf(&report_message, '\n');
NOTICE_LOG_FMT(OSREPORT_HLE, "{:08x}->{:08x}| {}", LR, PC, SHIFTJISToUTF8(report_message));
NOTICE_LOG_FMT(OSREPORT_HLE, "{:08x}->{:08x}| {}", LR, PowerPC::ppcState.pc,
SHIFTJISToUTF8(report_message));
}
// Log dprintf message
@ -164,7 +168,8 @@ void HLE_LogFPrint(ParameterType parameter_type)
std::string report_message = GetStringVA(4, parameter_type);
StringPopBackIf(&report_message, '\n');
NOTICE_LOG_FMT(OSREPORT_HLE, "{:08x}->{:08x}| {}", LR, PC, SHIFTJISToUTF8(report_message));
NOTICE_LOG_FMT(OSREPORT_HLE, "{:08x}->{:08x}| {}", LR, PowerPC::ppcState.pc,
SHIFTJISToUTF8(report_message));
}
// Log fprintf message

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@ -111,7 +111,8 @@ void Run()
// If watchpoints are enabled, any instruction could be a breakpoint.
if (PowerPC::GetMode() != PowerPC::CoreMode::Interpreter)
{
if (PowerPC::breakpoints.IsAddressBreakPoint(PC) || PowerPC::memchecks.HasAny())
if (PowerPC::breakpoints.IsAddressBreakPoint(PowerPC::ppcState.pc) ||
PowerPC::memchecks.HasAny())
{
s_state = State::Stepping;
PowerPC::CoreMode old_mode = PowerPC::GetMode();

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@ -572,7 +572,8 @@ static void Do_ARAM_DMA()
{
// ARAM -> MRAM
DEBUG_LOG_FMT(DSPINTERFACE, "DMA {:08x} bytes from ARAM {:08x} to MRAM {:08x} PC: {:08x}",
state.aram_dma.Cnt.count, state.aram_dma.ARAddr, state.aram_dma.MMAddr, PC);
state.aram_dma.Cnt.count, state.aram_dma.ARAddr, state.aram_dma.MMAddr,
PowerPC::ppcState.pc);
// Outgoing data from ARAM is mirrored every 64MB (verified on real HW)
state.aram_dma.ARAddr &= 0x3ffffff;
@ -620,7 +621,8 @@ static void Do_ARAM_DMA()
{
// MRAM -> ARAM
DEBUG_LOG_FMT(DSPINTERFACE, "DMA {:08x} bytes from MRAM {:08x} to ARAM {:08x} PC: {:08x}",
state.aram_dma.Cnt.count, state.aram_dma.MMAddr, state.aram_dma.ARAddr, PC);
state.aram_dma.Cnt.count, state.aram_dma.MMAddr, state.aram_dma.ARAddr,
PowerPC::ppcState.pc);
// Incoming data into ARAM is mirrored every 64MB (verified on real HW)
state.aram_dma.ARAddr &= 0x3ffffff;

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@ -482,7 +482,8 @@ u8* MemoryManager::GetPointer(u32 address) const
return m_exram + (address & GetExRamMask());
}
PanicAlertFmt("Unknown Pointer {:#010x} PC {:#010x} LR {:#010x}", address, PC, LR);
PanicAlertFmt("Unknown Pointer {:#010x} PC {:#010x} LR {:#010x}", address, PowerPC::ppcState.pc,
LR);
return nullptr;
}

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@ -200,7 +200,7 @@ static void ResetAndPausePPC()
auto& memory = system.GetMemory();
memory.Write_U32(0x48000000, 0x00000000); // b 0x0
PowerPC::Reset();
PC = 0;
PowerPC::ppcState.pc = 0;
}
static void ReleasePPC()
@ -212,7 +212,7 @@ static void ReleasePPC()
// NAND titles start with address translation off at 0x3400 (via the PPC bootstub)
// The state of other CPU registers (like the BAT registers) doesn't matter much
// because the realmode code at 0x3400 initializes everything itself anyway.
PC = 0x3400;
PowerPC::ppcState.pc = 0x3400;
}
static void ReleasePPCAncast()
@ -223,7 +223,7 @@ static void ReleasePPCAncast()
// On a real console the Espresso verifies and decrypts the Ancast image,
// then jumps to the decrypted ancast body.
// The Ancast loader already did this, so just jump to the decrypted body.
PC = ESPRESSO_ANCAST_LOCATION_VIRT + sizeof(EspressoAncastHeader);
PowerPC::ppcState.pc = ESPRESSO_ANCAST_LOCATION_VIRT + sizeof(EspressoAncastHeader);
}
void RAMOverrideForIOSMemoryValues(MemorySetupType setup_type)

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@ -79,7 +79,7 @@ bool Load()
const PowerPC::CoreMode core_mode = PowerPC::GetMode();
PowerPC::SetMode(PowerPC::CoreMode::Interpreter);
MSR.Hex = 0;
PC = 0x3400;
PowerPC::ppcState.pc = 0x3400;
NOTICE_LOG_FMT(IOS, "Loaded MIOS and bootstrapped PPC.");
// IOS writes 0 to 0x30f8 before bootstrapping the PPC. Once started, the IPL eventually writes

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@ -320,7 +320,7 @@ bool ApplyFramePatches()
DEBUG_LOG_FMT(ACTIONREPLAY,
"Need to retry later. CPU configuration is currently incorrect. PC = {:#010x}, "
"MSR = {:#010x}",
PC, MSR.Hex);
PowerPC::ppcState.pc, MSR.Hex);
return false;
}

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@ -81,7 +81,7 @@ void CachedInterpreter::ExecuteOneBlock()
const u8* normal_entry = m_block_cache.Dispatch();
if (!normal_entry)
{
Jit(PC);
Jit(PowerPC::ppcState.pc);
return;
}
@ -136,7 +136,7 @@ void CachedInterpreter::SingleStep()
static void EndBlock(UGeckoInstruction data)
{
PC = NPC;
PowerPC::ppcState.pc = NPC;
PowerPC::ppcState.downcount -= data.hex;
PowerPC::UpdatePerformanceMonitor(data.hex, 0, 0);
}
@ -153,7 +153,7 @@ static void UpdateNumFloatingPointInstructions(UGeckoInstruction data)
static void WritePC(UGeckoInstruction data)
{
PC = data.hex;
PowerPC::ppcState.pc = data.hex;
NPC = data.hex + 4;
}
@ -239,7 +239,8 @@ void CachedInterpreter::Jit(u32 address)
ClearCache();
}
const u32 nextPC = analyzer.Analyze(PC, &code_block, &m_code_buffer, m_code_buffer.size());
const u32 nextPC =
analyzer.Analyze(PowerPC::ppcState.pc, &code_block, &m_code_buffer, m_code_buffer.size());
if (code_block.m_memory_exception)
{
// Address of instruction could not be translated
@ -250,9 +251,9 @@ void CachedInterpreter::Jit(u32 address)
return;
}
JitBlock* b = m_block_cache.AllocateBlock(PC);
JitBlock* b = m_block_cache.AllocateBlock(PowerPC::ppcState.pc);
js.blockStart = PC;
js.blockStart = PowerPC::ppcState.pc;
js.firstFPInstructionFound = false;
js.fifoBytesSinceCheck = 0;
js.downcountAmount = 0;

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@ -264,7 +264,7 @@ void Expression::SynchronizeBindings(SynchronizeDirection dir) const
break;
case VarBindingType::PCtr:
if (dir == SynchronizeDirection::From)
v->value = static_cast<double>(PC);
v->value = static_cast<double>(PowerPC::ppcState.pc);
break;
}
}

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@ -429,7 +429,7 @@ static void ReadRegister()
switch (id)
{
case 64:
wbe32hex(reply, PC);
wbe32hex(reply, PowerPC::ppcState.pc);
break;
case 65:
wbe32hex(reply, MSR.Hex);
@ -641,7 +641,7 @@ static void WriteRegister()
switch (id)
{
case 64:
PC = re32hex(bufptr);
PowerPC::ppcState.pc = re32hex(bufptr);
break;
case 65:
MSR.Hex = re32hex(bufptr);
@ -1122,8 +1122,8 @@ bool JustConnected()
void SendSignal(Signal signal)
{
char bfr[128] = {};
fmt::format_to(bfr, "T{:02x}{:02x}:{:08x};{:02x}:{:08x};", static_cast<u8>(signal), 64, PC, 1,
GPR(1));
fmt::format_to(bfr, "T{:02x}{:02x}:{:08x};{:02x}:{:08x};", static_cast<u8>(signal), 64,
PowerPC::ppcState.pc, 1, GPR(1));
SendReply(bfr);
}
} // namespace GDBStub

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@ -73,8 +73,8 @@ bool IsInvalidPairedSingleExecution(UGeckoInstruction inst)
void UpdatePC()
{
last_pc = PC;
PC = NPC;
last_pc = PowerPC::ppcState.pc;
PowerPC::ppcState.pc = NPC;
}
} // Anonymous namespace
@ -126,12 +126,13 @@ static void Trace(const UGeckoInstruction& inst)
fregs += fmt::format("f{:02d}: {:08x} {:08x} ", i, ps.PS0AsU64(), ps.PS1AsU64());
}
const std::string ppc_inst = Common::GekkoDisassembler::Disassemble(inst.hex, PC);
const std::string ppc_inst =
Common::GekkoDisassembler::Disassemble(inst.hex, PowerPC::ppcState.pc);
DEBUG_LOG_FMT(POWERPC,
"INTER PC: {:08x} SRR0: {:08x} SRR1: {:08x} CRval: {:016x} "
"FPSCR: {:08x} MSR: {:08x} LR: {:08x} {} {:08x} {}",
PC, SRR0, SRR1, PowerPC::ppcState.cr.fields[0], FPSCR.Hex, MSR.Hex,
PowerPC::ppcState.spr[8], regs, inst.hex, ppc_inst);
PowerPC::ppcState.pc, SRR0, SRR1, PowerPC::ppcState.cr.fields[0], FPSCR.Hex,
MSR.Hex, PowerPC::ppcState.spr[8], regs, inst.hex, ppc_inst);
}
bool Interpreter::HandleFunctionHooking(u32 address)
@ -144,20 +145,25 @@ bool Interpreter::HandleFunctionHooking(u32 address)
int Interpreter::SingleStepInner()
{
if (HandleFunctionHooking(PC))
if (HandleFunctionHooking(PowerPC::ppcState.pc))
{
UpdatePC();
return PPCTables::GetOpInfo(m_prev_inst)->numCycles;
}
NPC = PC + sizeof(UGeckoInstruction);
m_prev_inst.hex = PowerPC::Read_Opcode(PC);
NPC = PowerPC::ppcState.pc + sizeof(UGeckoInstruction);
m_prev_inst.hex = PowerPC::Read_Opcode(PowerPC::ppcState.pc);
// Uncomment to trace the interpreter
// if ((PC & 0x00FFFFFF) >= 0x000AB54C && (PC & 0x00FFFFFF) <= 0x000AB624)
// if ((PowerPC::ppcState.pc & 0x00FFFFFF) >= 0x000AB54C &&
// (PowerPC::ppcState.pc & 0x00FFFFFF) <= 0x000AB624)
// {
// s_start_trace = true;
// }
// else
// {
// s_start_trace = false;
// }
if (s_start_trace)
{
@ -228,7 +234,7 @@ void Interpreter::SingleStep()
if (PowerPC::ppcState.Exceptions != 0)
{
PowerPC::CheckExceptions();
PC = NPC;
PowerPC::ppcState.pc = NPC;
}
}
@ -256,7 +262,7 @@ void Interpreter::Run()
if (Config::Get(Config::MAIN_ENABLE_DEBUGGING))
{
#ifdef SHOW_HISTORY
s_pc_block_vec.push_back(PC);
s_pc_block_vec.push_back(PowerPC::ppcState.pc);
if (s_pc_block_vec.size() > s_show_blocks)
s_pc_block_vec.erase(s_pc_block_vec.begin());
#endif
@ -270,13 +276,13 @@ void Interpreter::Run()
while (!m_end_block)
{
#ifdef SHOW_HISTORY
s_pc_vec.push_back(PC);
s_pc_vec.push_back(PowerPC::ppcState.pc);
if (s_pc_vec.size() > s_show_steps)
s_pc_vec.erase(s_pc_vec.begin());
#endif
// 2: check for breakpoint
if (PowerPC::breakpoints.IsAddressBreakPoint(PC))
if (PowerPC::breakpoints.IsAddressBreakPoint(PowerPC::ppcState.pc))
{
#ifdef SHOW_HISTORY
NOTICE_LOG_FMT(POWERPC, "----------------------------");
@ -297,12 +303,12 @@ void Interpreter::Run()
NOTICE_LOG_FMT(POWERPC, "PC: {:#010x}", s_pc_vec[j]);
}
#endif
INFO_LOG_FMT(POWERPC, "Hit Breakpoint - {:08x}", PC);
INFO_LOG_FMT(POWERPC, "Hit Breakpoint - {:08x}", PowerPC::ppcState.pc);
CPU::Break();
if (GDBStub::IsActive())
GDBStub::TakeControl();
if (PowerPC::breakpoints.IsTempBreakPoint(PC))
PowerPC::breakpoints.Remove(PC);
if (PowerPC::breakpoints.IsTempBreakPoint(PowerPC::ppcState.pc))
PowerPC::breakpoints.Remove(PowerPC::ppcState.pc);
Host_UpdateDisasmDialog();
return;
@ -339,7 +345,7 @@ void Interpreter::unknown_instruction(UGeckoInstruction inst)
NOTICE_LOG_FMT(
POWERPC,
"\nIntCPU: Unknown instruction {:08x} at PC = {:08x} last_PC = {:08x} LR = {:08x}\n",
inst.hex, PC, last_pc, LR);
inst.hex, PowerPC::ppcState.pc, last_pc, LR);
for (int i = 0; i < 32; i += 4)
{
NOTICE_LOG_FMT(POWERPC, "r{}: {:#010x} r{}: {:#010x} r{}: {:#010x} r{}: {:#010x}", i, rGPR[i],
@ -347,7 +353,7 @@ void Interpreter::unknown_instruction(UGeckoInstruction inst)
}
ASSERT_MSG(POWERPC, 0,
"\nIntCPU: Unknown instruction {:08x} at PC = {:08x} last_PC = {:08x} LR = {:08x}\n",
inst.hex, PC, last_pc, LR);
inst.hex, PowerPC::ppcState.pc, last_pc, LR);
if (Core::System::GetInstance().IsPauseOnPanicMode())
CPU::Break();
}

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@ -13,14 +13,14 @@
void Interpreter::bx(UGeckoInstruction inst)
{
if (inst.LK)
LR = PC + 4;
LR = PowerPC::ppcState.pc + 4;
const auto address = u32(SignExt26(inst.LI << 2));
if (inst.AA)
NPC = address;
else
NPC = PC + address;
NPC = PowerPC::ppcState.pc + address;
m_end_block = true;
}
@ -42,14 +42,14 @@ void Interpreter::bcx(UGeckoInstruction inst)
if (counter && condition)
{
if (inst.LK)
LR = PC + 4;
LR = PowerPC::ppcState.pc + 4;
const auto address = u32(SignExt16(s16(inst.BD << 2)));
if (inst.AA)
NPC = address;
else
NPC = PC + address;
NPC = PowerPC::ppcState.pc + address;
}
m_end_block = true;
@ -67,7 +67,7 @@ void Interpreter::bcctrx(UGeckoInstruction inst)
{
NPC = CTR & (~3);
if (inst.LK_3)
LR = PC + 4;
LR = PowerPC::ppcState.pc + 4;
}
m_end_block = true;
@ -86,7 +86,7 @@ void Interpreter::bclrx(UGeckoInstruction inst)
{
NPC = LR & (~3);
if (inst.LK_3)
LR = PC + 4;
LR = PowerPC::ppcState.pc + 4;
}
m_end_block = true;
@ -95,7 +95,7 @@ void Interpreter::bclrx(UGeckoInstruction inst)
void Interpreter::HLEFunction(UGeckoInstruction inst)
{
m_end_block = true;
HLE::Execute(PC, inst.hex);
HLE::Execute(PowerPC::ppcState.pc, inst.hex);
}
void Interpreter::rfi(UGeckoInstruction inst)

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@ -372,7 +372,8 @@ void Interpreter::mtspr(UGeckoInstruction inst)
case SPR_WPAR:
ASSERT_MSG(POWERPC, rSPR(SPR_WPAR) == GPFifo::GATHER_PIPE_PHYSICAL_ADDRESS,
"Gather pipe changed to unexpected address {:08x} @ PC {:08x}", rSPR(SPR_WPAR), PC);
"Gather pipe changed to unexpected address {:08x} @ PC {:08x}", rSPR(SPR_WPAR),
PowerPC::ppcState.pc);
Core::System::GetInstance().GetGPFifo().ResetGatherPipe();
break;

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@ -504,16 +504,16 @@ static void ImHere()
if (!f)
f.Open("log64.txt", "w");
f.WriteString(fmt::format("{0:08x}\n", PC));
f.WriteString(fmt::format("{0:08x}\n", PowerPC::ppcState.pc));
}
if (been_here.find(PC) != been_here.end())
if (been_here.find(PowerPC::ppcState.pc) != been_here.end())
{
been_here.find(PC)->second++;
if ((been_here.find(PC)->second) & 1023)
been_here.find(PowerPC::ppcState.pc)->second++;
if ((been_here.find(PowerPC::ppcState.pc)->second) & 1023)
return;
}
INFO_LOG_FMT(DYNA_REC, "I'm here - PC = {:08x} , LR = {:08x}", PC, LR);
been_here[PC] = 1;
INFO_LOG_FMT(DYNA_REC, "I'm here - PC = {:08x} , LR = {:08x}", PowerPC::ppcState.pc, LR);
been_here[PowerPC::ppcState.pc] = 1;
}
bool Jit64::Cleanup()
@ -758,7 +758,8 @@ void Jit64::Trace()
DEBUG_LOG_FMT(DYNA_REC,
"JIT64 PC: {:08x} SRR0: {:08x} SRR1: {:08x} FPSCR: {:08x} "
"MSR: {:08x} LR: {:08x} {} {}",
PC, SRR0, SRR1, FPSCR.Hex, MSR.Hex, PowerPC::ppcState.spr[8], regs, fregs);
PowerPC::ppcState.pc, SRR0, SRR1, FPSCR.Hex, MSR.Hex, PowerPC::ppcState.spr[8],
regs, fregs);
}
void Jit64::Jit(u32 em_address)

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@ -705,7 +705,8 @@ void JitArm64::Trace()
DEBUG_LOG_FMT(DYNA_REC,
"JitArm64 PC: {:08x} SRR0: {:08x} SRR1: {:08x} FPSCR: {:08x} "
"MSR: {:08x} LR: {:08x} {} {}",
PC, SRR0, SRR1, FPSCR.Hex, MSR.Hex, PowerPC::ppcState.spr[8], regs, fregs);
PowerPC::ppcState.pc, SRR0, SRR1, FPSCR.Hex, MSR.Hex, PowerPC::ppcState.spr[8],
regs, fregs);
}
void JitArm64::Jit(u32 em_address)

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@ -168,10 +168,13 @@ JitBlock* JitBaseBlockCache::GetBlockFromStartAddress(u32 addr, u32 msr)
const u8* JitBaseBlockCache::Dispatch()
{
JitBlock* block = fast_block_map[FastLookupIndexForAddress(PC)];
JitBlock* block = fast_block_map[FastLookupIndexForAddress(PowerPC::ppcState.pc)];
if (!block || block->effectiveAddress != PC || block->msrBits != (MSR.Hex & JIT_CACHE_MSR_MASK))
block = MoveBlockIntoFastCache(PC, MSR.Hex & JIT_CACHE_MSR_MASK);
if (!block || block->effectiveAddress != PowerPC::ppcState.pc ||
block->msrBits != (MSR.Hex & JIT_CACHE_MSR_MASK))
{
block = MoveBlockIntoFastCache(PowerPC::ppcState.pc, MSR.Hex & JIT_CACHE_MSR_MASK);
}
if (!block)
return nullptr;

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@ -264,20 +264,21 @@ void CompileExceptionCheck(ExceptionType type)
break;
}
if (PC != 0 && (exception_addresses->find(PC)) == (exception_addresses->end()))
if (PowerPC::ppcState.pc != 0 &&
(exception_addresses->find(PowerPC::ppcState.pc)) == (exception_addresses->end()))
{
if (type == ExceptionType::FIFOWrite)
{
// Check in case the code has been replaced since: do we need to do this?
const OpType optype = PPCTables::GetOpInfo(PowerPC::HostRead_U32(PC))->type;
const OpType optype = PPCTables::GetOpInfo(PowerPC::HostRead_U32(PowerPC::ppcState.pc))->type;
if (optype != OpType::Store && optype != OpType::StoreFP && optype != OpType::StorePS)
return;
}
exception_addresses->insert(PC);
exception_addresses->insert(PowerPC::ppcState.pc);
// Invalidate the JIT block so that it gets recompiled with the external exception check
// included.
g_jit->GetBlockCache()->InvalidateICache(PC, 4, true);
g_jit->GetBlockCache()->InvalidateICache(PowerPC::ppcState.pc, 4, true);
}
}

View File

@ -270,7 +270,7 @@ static T ReadFromHardware(Memory::MemoryManager& memory, u32 em_address)
return bswap(value);
}
PanicAlertFmt("Unable to resolve read address {:x} PC {:x}", em_address, PC);
PanicAlertFmt("Unable to resolve read address {:x} PC {:x}", em_address, PowerPC::ppcState.pc);
if (Core::System::GetInstance().IsPauseOnPanicMode())
{
CPU::Break();
@ -459,7 +459,7 @@ static void WriteToHardware(Core::System& system, Memory::MemoryManager& memory,
return;
}
PanicAlertFmt("Unable to resolve write address {:x} PC {:x}", em_address, PC);
PanicAlertFmt("Unable to resolve write address {:x} PC {:x}", em_address, PowerPC::ppcState.pc);
if (Core::System::GetInstance().IsPauseOnPanicMode())
{
CPU::Break();
@ -578,7 +578,7 @@ static void Memcheck(u32 address, u64 var, bool write, size_t size)
mc->num_hits++;
const bool pause = mc->Action(&debug_interface, var, address, write, size, PC);
const bool pause = mc->Action(&debug_interface, var, address, write, size, PowerPC::ppcState.pc);
if (!pause)
return;
@ -1365,7 +1365,7 @@ static void GenerateDSIException(u32 effective_address, bool write)
if (!Core::System::GetInstance().IsMMUMode())
{
PanicAlertFmt("Invalid {} {:#010x}, PC = {:#010x}", write ? "write to" : "read from",
effective_address, PC);
effective_address, PowerPC::ppcState.pc);
if (Core::System::GetInstance().IsPauseOnPanicMode())
{
CPU::Break();
@ -1393,7 +1393,7 @@ static void GenerateISIException(u32 effective_address)
NPC = effective_address;
PowerPC::ppcState.Exceptions |= EXCEPTION_ISI;
WARN_LOG_FMT(POWERPC, "ISI exception at {:#010x}", PC);
WARN_LOG_FMT(POWERPC, "ISI exception at {:#010x}", PowerPC::ppcState.pc);
}
void SDRUpdated()

View File

@ -51,7 +51,8 @@ GekkoOPInfo* GetOpInfo(UGeckoInstruction inst)
case 63:
return m_infoTable63[inst.SUBOP10];
default:
ASSERT_MSG(POWERPC, 0, "GetOpInfo - invalid subtable op {:08x} @ {:08x}", inst.hex, PC);
ASSERT_MSG(POWERPC, 0, "GetOpInfo - invalid subtable op {:08x} @ {:08x}", inst.hex,
PowerPC::ppcState.pc);
return nullptr;
}
}
@ -59,7 +60,8 @@ GekkoOPInfo* GetOpInfo(UGeckoInstruction inst)
{
if (info->type == OpType::Invalid)
{
ASSERT_MSG(POWERPC, 0, "GetOpInfo - invalid op {:08x} @ {:08x}", inst.hex, PC);
ASSERT_MSG(POWERPC, 0, "GetOpInfo - invalid op {:08x} @ {:08x}", inst.hex,
PowerPC::ppcState.pc);
return nullptr;
}
return m_infoTable[inst.OPCD];
@ -85,7 +87,7 @@ Interpreter::Instruction GetInterpreterOp(UGeckoInstruction inst)
return Interpreter::m_op_table63[inst.SUBOP10];
default:
ASSERT_MSG(POWERPC, 0, "GetInterpreterOp - invalid subtable op {:08x} @ {:08x}", inst.hex,
PC);
PowerPC::ppcState.pc);
return nullptr;
}
}
@ -93,7 +95,8 @@ Interpreter::Instruction GetInterpreterOp(UGeckoInstruction inst)
{
if (info->type == OpType::Invalid)
{
ASSERT_MSG(POWERPC, 0, "GetInterpreterOp - invalid op {:08x} @ {:08x}", inst.hex, PC);
ASSERT_MSG(POWERPC, 0, "GetInterpreterOp - invalid op {:08x} @ {:08x}", inst.hex,
PowerPC::ppcState.pc);
return nullptr;
}
return Interpreter::m_op_table[inst.OPCD];

View File

@ -494,19 +494,19 @@ void CheckExceptions()
SRR1 = (MSR.Hex & 0x87C0FFFF) | (1 << 30);
MSR.LE = MSR.ILE;
MSR.Hex &= ~0x04EF36;
PC = NPC = 0x00000400;
PowerPC::ppcState.pc = NPC = 0x00000400;
DEBUG_LOG_FMT(POWERPC, "EXCEPTION_ISI");
ppcState.Exceptions &= ~EXCEPTION_ISI;
}
else if (exceptions & EXCEPTION_PROGRAM)
{
SRR0 = PC;
SRR0 = PowerPC::ppcState.pc;
// SRR1 was partially set by GenerateProgramException, so bitwise or is used here
SRR1 |= MSR.Hex & 0x87C0FFFF;
MSR.LE = MSR.ILE;
MSR.Hex &= ~0x04EF36;
PC = NPC = 0x00000700;
PowerPC::ppcState.pc = NPC = 0x00000700;
DEBUG_LOG_FMT(POWERPC, "EXCEPTION_PROGRAM");
ppcState.Exceptions &= ~EXCEPTION_PROGRAM;
@ -517,19 +517,19 @@ void CheckExceptions()
SRR1 = MSR.Hex & 0x87C0FFFF;
MSR.LE = MSR.ILE;
MSR.Hex &= ~0x04EF36;
PC = NPC = 0x00000C00;
PowerPC::ppcState.pc = NPC = 0x00000C00;
DEBUG_LOG_FMT(POWERPC, "EXCEPTION_SYSCALL (PC={:08x})", PC);
DEBUG_LOG_FMT(POWERPC, "EXCEPTION_SYSCALL (PC={:08x})", PowerPC::ppcState.pc);
ppcState.Exceptions &= ~EXCEPTION_SYSCALL;
}
else if (exceptions & EXCEPTION_FPU_UNAVAILABLE)
{
// This happens a lot - GameCube OS uses deferred FPU context switching
SRR0 = PC; // re-execute the instruction
SRR0 = PowerPC::ppcState.pc; // re-execute the instruction
SRR1 = MSR.Hex & 0x87C0FFFF;
MSR.LE = MSR.ILE;
MSR.Hex &= ~0x04EF36;
PC = NPC = 0x00000800;
PowerPC::ppcState.pc = NPC = 0x00000800;
DEBUG_LOG_FMT(POWERPC, "EXCEPTION_FPU_UNAVAILABLE");
ppcState.Exceptions &= ~EXCEPTION_FPU_UNAVAILABLE;
@ -540,11 +540,11 @@ void CheckExceptions()
}
else if (exceptions & EXCEPTION_DSI)
{
SRR0 = PC;
SRR0 = PowerPC::ppcState.pc;
SRR1 = MSR.Hex & 0x87C0FFFF;
MSR.LE = MSR.ILE;
MSR.Hex &= ~0x04EF36;
PC = NPC = 0x00000300;
PowerPC::ppcState.pc = NPC = 0x00000300;
// DSISR and DAR regs are changed in GenerateDSIException()
DEBUG_LOG_FMT(POWERPC, "EXCEPTION_DSI");
@ -552,11 +552,11 @@ void CheckExceptions()
}
else if (exceptions & EXCEPTION_ALIGNMENT)
{
SRR0 = PC;
SRR0 = PowerPC::ppcState.pc;
SRR1 = MSR.Hex & 0x87C0FFFF;
MSR.LE = MSR.ILE;
MSR.Hex &= ~0x04EF36;
PC = NPC = 0x00000600;
PowerPC::ppcState.pc = NPC = 0x00000600;
// TODO crazy amount of DSISR options to check out
@ -586,7 +586,7 @@ void CheckExternalExceptions()
SRR1 = MSR.Hex & 0x87C0FFFF;
MSR.LE = MSR.ILE;
MSR.Hex &= ~0x04EF36;
PC = NPC = 0x00000500;
PowerPC::ppcState.pc = NPC = 0x00000500;
DEBUG_LOG_FMT(POWERPC, "EXCEPTION_EXTERNAL_INT");
ppcState.Exceptions &= ~EXCEPTION_EXTERNAL_INT;
@ -599,7 +599,7 @@ void CheckExternalExceptions()
SRR1 = MSR.Hex & 0x87C0FFFF;
MSR.LE = MSR.ILE;
MSR.Hex &= ~0x04EF36;
PC = NPC = 0x00000F00;
PowerPC::ppcState.pc = NPC = 0x00000F00;
DEBUG_LOG_FMT(POWERPC, "EXCEPTION_PERFORMANCE_MONITOR");
ppcState.Exceptions &= ~EXCEPTION_PERFORMANCE_MONITOR;
@ -610,7 +610,7 @@ void CheckExternalExceptions()
SRR1 = MSR.Hex & 0x87C0FFFF;
MSR.LE = MSR.ILE;
MSR.Hex &= ~0x04EF36;
PC = NPC = 0x00000900;
PowerPC::ppcState.pc = NPC = 0x00000900;
DEBUG_LOG_FMT(POWERPC, "EXCEPTION_DECREMENTER");
ppcState.Exceptions &= ~EXCEPTION_DECREMENTER;
@ -626,7 +626,7 @@ void CheckExternalExceptions()
void CheckBreakPoints()
{
const TBreakPoint* bp = PowerPC::breakpoints.GetBreakpoint(PC);
const TBreakPoint* bp = PowerPC::breakpoints.GetBreakpoint(PowerPC::ppcState.pc);
if (!bp || !bp->is_enabled || !EvaluateCondition(bp->condition))
return;
@ -642,11 +642,11 @@ void CheckBreakPoints()
NOTICE_LOG_FMT(MEMMAP,
"BP {:08x} {}({:08x} {:08x} {:08x} {:08x} {:08x} {:08x} {:08x} {:08x} {:08x} "
"{:08x}) LR={:08x}",
PC, g_symbolDB.GetDescription(PC), GPR(3), GPR(4), GPR(5), GPR(6), GPR(7),
GPR(8), GPR(9), GPR(10), GPR(11), GPR(12), LR);
PowerPC::ppcState.pc, g_symbolDB.GetDescription(PowerPC::ppcState.pc), GPR(3),
GPR(4), GPR(5), GPR(6), GPR(7), GPR(8), GPR(9), GPR(10), GPR(11), GPR(12), LR);
}
if (PowerPC::breakpoints.IsTempBreakPoint(PC))
PowerPC::breakpoints.Remove(PC);
if (PowerPC::breakpoints.IsTempBreakPoint(PowerPC::ppcState.pc))
PowerPC::breakpoints.Remove(PowerPC::ppcState.pc);
}
void PowerPCState::SetSR(u32 index, u32 value)

View File

@ -245,7 +245,6 @@ void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst);
#define THRM1(ppc_state) ((UReg_THRM12&)(ppc_state).spr[SPR_THRM1])
#define THRM2(ppc_state) ((UReg_THRM12&)(ppc_state).spr[SPR_THRM2])
#define THRM3(ppc_state) ((UReg_THRM3&)(ppc_state).spr[SPR_THRM3])
#define PC PowerPC::ppcState.pc
#define NPC PowerPC::ppcState.npc
#define FPSCR PowerPC::ppcState.fpscr
#define MSR PowerPC::ppcState.msr

View File

@ -167,11 +167,11 @@ CodeViewWidget::CodeViewWidget()
&CodeViewWidget::FontBasedSizing);
connect(&Settings::Instance(), &Settings::EmulationStateChanged, this, [this] {
m_address = PC;
m_address = PowerPC::ppcState.pc;
Update();
});
connect(Host::GetInstance(), &Host::UpdateDisasmDialog, this, [this] {
m_address = PC;
m_address = PowerPC::ppcState.pc;
Update();
});
@ -567,9 +567,9 @@ void CodeViewWidget::OnContextMenu()
menu->addAction(tr("Restore instruction"), this, &CodeViewWidget::OnRestoreInstruction);
QString target;
if (addr == PC && running && Core::GetState() == Core::State::Paused)
if (addr == PowerPC::ppcState.pc && running && Core::GetState() == Core::State::Paused)
{
const std::string line = PowerPC::debug_interface.Disassemble(PC);
const std::string line = PowerPC::debug_interface.Disassemble(PowerPC::ppcState.pc);
const auto target_it = std::find(line.begin(), line.end(), '\t');
const auto target_end = std::find(target_it, line.end(), ',');

View File

@ -451,11 +451,11 @@ void CodeWidget::StepOver()
if (!CPU::IsStepping())
return;
UGeckoInstruction inst = PowerPC::HostRead_Instruction(PC);
UGeckoInstruction inst = PowerPC::HostRead_Instruction(PowerPC::ppcState.pc);
if (inst.LK)
{
PowerPC::breakpoints.ClearAllTemporary();
PowerPC::breakpoints.Add(PC + 4, true);
PowerPC::breakpoints.Add(PowerPC::ppcState.pc + 4, true);
CPU::EnableStepping(false);
Core::DisplayMessage(tr("Step over in progress...").toStdString(), 2000);
}
@ -495,7 +495,7 @@ void CodeWidget::StepOut()
// Loop until either the current instruction is a return instruction with no Link flag
// or a breakpoint is detected so it can step at the breakpoint. If the PC is currently
// on a breakpoint, skip it.
UGeckoInstruction inst = PowerPC::HostRead_Instruction(PC);
UGeckoInstruction inst = PowerPC::HostRead_Instruction(PowerPC::ppcState.pc);
do
{
if (WillInstructionReturn(inst))
@ -507,27 +507,28 @@ void CodeWidget::StepOut()
if (inst.LK)
{
// Step over branches
u32 next_pc = PC + 4;
u32 next_pc = PowerPC::ppcState.pc + 4;
do
{
PowerPC::SingleStep();
} while (PC != next_pc && clock::now() < timeout &&
!PowerPC::breakpoints.IsAddressBreakPoint(PC));
} while (PowerPC::ppcState.pc != next_pc && clock::now() < timeout &&
!PowerPC::breakpoints.IsAddressBreakPoint(PowerPC::ppcState.pc));
}
else
{
PowerPC::SingleStep();
}
inst = PowerPC::HostRead_Instruction(PC);
} while (clock::now() < timeout && !PowerPC::breakpoints.IsAddressBreakPoint(PC));
inst = PowerPC::HostRead_Instruction(PowerPC::ppcState.pc);
} while (clock::now() < timeout &&
!PowerPC::breakpoints.IsAddressBreakPoint(PowerPC::ppcState.pc));
PowerPC::SetMode(old_mode);
CPU::PauseAndLock(false, false);
emit Host::GetInstance()->UpdateDisasmDialog();
if (PowerPC::breakpoints.IsAddressBreakPoint(PC))
if (PowerPC::breakpoints.IsAddressBreakPoint(PowerPC::ppcState.pc))
Core::DisplayMessage(tr("Breakpoint encountered! Step out aborted.").toStdString(), 2000);
else if (clock::now() >= timeout)
Core::DisplayMessage(tr("Step out timed out!").toStdString(), 2000);
@ -537,19 +538,19 @@ void CodeWidget::StepOut()
void CodeWidget::Skip()
{
PC += 4;
PowerPC::ppcState.pc += 4;
ShowPC();
}
void CodeWidget::ShowPC()
{
m_code_view->SetAddress(PC, CodeViewWidget::SetAddressUpdate::WithUpdate);
m_code_view->SetAddress(PowerPC::ppcState.pc, CodeViewWidget::SetAddressUpdate::WithUpdate);
Update();
}
void CodeWidget::SetPC()
{
PC = m_code_view->GetAddress();
PowerPC::ppcState.pc = m_code_view->GetAddress();
Update();
}

View File

@ -6,9 +6,6 @@
#include <sstream>
#if defined(HAVE_LLVM)
// PowerPC.h defines PC.
// This conflicts with a function that has an argument named PC
#undef PC
#include <fmt/format.h>
#include <llvm-c/Disassembler.h>
#include <llvm-c/Target.h>

View File

@ -684,7 +684,8 @@ void CommandProcessorManager::HandleUnknownOpcode(u8 cmd_byte, const u8* buffer,
fifo.bFF_Breakpoint.load(std::memory_order_relaxed) ? "true" : "false",
fifo.bFF_GPLinkEnable.load(std::memory_order_relaxed) ? "true" : "false",
fifo.bFF_HiWatermarkInt.load(std::memory_order_relaxed) ? "true" : "false",
fifo.bFF_LoWatermarkInt.load(std::memory_order_relaxed) ? "true" : "false", PC, LR);
fifo.bFF_LoWatermarkInt.load(std::memory_order_relaxed) ? "true" : "false",
PowerPC::ppcState.pc, LR);
if (!m_is_fifo_error_seen && !suppress_panic_alert)
{