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Jit64: Add extra cases for reversible avx_op 

Optimization.
This commit is contained in:
JosJuice 2022-12-04 11:37:49 +01:00
parent bb3306701b
commit 2c2e06bf39
1 changed files with 17 additions and 5 deletions
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22
Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp
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@ -748,10 +748,18 @@ void EmuCodeBlock::avx_op(void (XEmitter::*avxOp)(X64Reg, X64Reg, const OpArg&),
{ {
(this->*sseOp)(regOp, arg2); (this->*sseOp)(regOp, arg2);
} }
else if (arg1.IsSimpleReg() && cpu_info.bAVX) else if (reversible && arg2.IsSimpleReg(regOp))
{
(this->*sseOp)(regOp, arg1);
}
else if (cpu_info.bAVX && arg1.IsSimpleReg())
{ {
(this->*avxOp)(regOp, arg1.GetSimpleReg(), arg2); (this->*avxOp)(regOp, arg1.GetSimpleReg(), arg2);
} }
else if (cpu_info.bAVX && reversible && arg2.IsSimpleReg())
{
(this->*avxOp)(regOp, arg2.GetSimpleReg(), arg1);
}
else if (!arg2.IsSimpleReg(regOp)) else if (!arg2.IsSimpleReg(regOp))
{ {
if (packed) if (packed)
@ -760,13 +768,17 @@ void EmuCodeBlock::avx_op(void (XEmitter::*avxOp)(X64Reg, X64Reg, const OpArg&),
MOVSD(regOp, arg1); MOVSD(regOp, arg1);
(this->*sseOp)(regOp, arg1 == arg2 ? R(regOp) : arg2); (this->*sseOp)(regOp, arg1 == arg2 ? R(regOp) : arg2);
} }
else if (reversible) else if (reversible && !arg1.IsSimpleReg(regOp))
{ {
(this->*sseOp)(regOp, arg1); if (packed)
MOVAPD(regOp, arg2);
else
MOVSD(regOp, arg2);
(this->*sseOp)(regOp, arg1 == arg2 ? R(regOp) : arg1);
} }
else else
{ {
// The ugly case: regOp == arg2 without AVX, or with arg1 == memory // The ugly case: Not reversible, and we have regOp == arg2 without AVX or with arg1 == memory
if (!arg1.IsSimpleReg(XMM0)) if (!arg1.IsSimpleReg(XMM0))
MOVAPD(XMM0, arg1); MOVAPD(XMM0, arg1);
if (cpu_info.bAVX) if (cpu_info.bAVX)
@ -793,7 +805,7 @@ void EmuCodeBlock::avx_op(void (XEmitter::*avxOp)(X64Reg, X64Reg, const OpArg&,
{ {
(this->*sseOp)(regOp, arg2, imm); (this->*sseOp)(regOp, arg2, imm);
} }
else if (arg1.IsSimpleReg() && cpu_info.bAVX) else if (cpu_info.bAVX && arg1.IsSimpleReg())
{ {
(this->*avxOp)(regOp, arg1.GetSimpleReg(), arg2, imm); (this->*avxOp)(regOp, arg1.GetSimpleReg(), arg2, imm);
} }