JitIL: Implemented some instructions.
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6111 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -294,36 +294,45 @@ void JitIL::mullwx(UGeckoInstruction inst)
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void JitIL::mulhwux(UGeckoInstruction inst)
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{
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Default(inst); return;
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#if 0
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if(Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITIntegerOff)
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{Default(inst); return;} // turn off from debugger
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INSTRUCTION_START
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JITDISABLE(Integer)
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INSTRUCTION_START;
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int a = inst.RA, b = inst.RB, d = inst.RD;
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gpr.FlushLockX(EDX);
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gpr.Lock(a, b, d);
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if (d != a && d != b) {
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gpr.LoadToX64(d, false, true);
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} else {
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gpr.LoadToX64(d, true, true);
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}
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if (gpr.RX(d) == EDX)
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PanicAlert("mulhwux : WTF");
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MOV(32, R(EAX), gpr.R(a));
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gpr.KillImmediate(b);
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MUL(32, gpr.R(b));
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gpr.UnlockAll();
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gpr.UnlockAllX();
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if (inst.Rc) {
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MOV(32, R(EAX), R(EDX));
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MOV(32, gpr.R(d), R(EDX));
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// result is already in eax
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CALL((u8*)asm_routines.computeRc);
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} else {
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MOV(32, gpr.R(d), R(EDX));
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}
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#endif
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// Compute upper 32-bit of (a * b) using Karatsuba algorithm
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// Karatsuba algorithm reduces the number of multiplication 4 to 3
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// d = a * b
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// = {a1 * (1 << 16) + a0} * {b1 * (1 << 16) + b0};
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// = d2 * (1 << 32) + d1 * (1 << 16) + d0
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// where
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// d2 = a1 * b1
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// d0 = a0 * b0
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// d1 = (a1 + a0) * (b1 * b0) - d2 - d0
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// since
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// d1 = (a1 + a0) * (b1 * b0) - d2 - d0
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// = a1 * b1 + a1 * b0 + a0 * b1 + a0 * b0 - a1 * b1 - a0 * b0
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// = a1 * b0 + a0 * b1
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// The result of mulhwux is
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// d2' = (((d0 >> 16) + d1) >> 16) + d2
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//
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// Though it is not so fast...
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IREmitter::InstLoc a = ibuild.EmitLoadGReg(inst.RA);
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IREmitter::InstLoc a0 = ibuild.EmitAnd(a, ibuild.EmitIntConst(0xFFFF));
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IREmitter::InstLoc a1 = ibuild.EmitShrl(a, ibuild.EmitIntConst(16));
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IREmitter::InstLoc b = ibuild.EmitLoadGReg(inst.RB);
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IREmitter::InstLoc b0 = ibuild.EmitAnd(b, ibuild.EmitIntConst(0xFFFF));
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IREmitter::InstLoc b1 = ibuild.EmitShrl(b, ibuild.EmitIntConst(16));
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IREmitter::InstLoc d2 = ibuild.EmitMul(a1, b1);
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IREmitter::InstLoc d0 = ibuild.EmitMul(a0, b0);
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IREmitter::InstLoc d1 = ibuild.EmitMul(ibuild.EmitAdd(a1, a0), ibuild.EmitAdd(b1, b0));
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d1 = ibuild.EmitSub(d1, d2);
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d1 = ibuild.EmitSub(d1, d0);
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d1 = ibuild.EmitAdd(d1, ibuild.EmitShrl(d0, ibuild.EmitIntConst(16)));
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d2 = ibuild.EmitAdd(d2, ibuild.EmitShrl(d1, ibuild.EmitIntConst(16)));
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ibuild.EmitStoreGReg(d2, inst.RD);
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if (inst.Rc)
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ComputeRC(ibuild, d2);
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}
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// skipped some of the special handling in here - if we get crashes, let the interpreter handle this op
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@ -375,36 +384,28 @@ void JitIL::addzex(UGeckoInstruction inst)
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if (inst.Rc)
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ComputeRC(ibuild, val);
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}
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// This can be optimized
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void JitIL::addex(UGeckoInstruction inst)
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{
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Default(inst); return;
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#if 0
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// USES_XER
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if(Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITIntegerOff)
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{Default(inst); return;} // turn off from debugger
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INSTRUCTION_START
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JITDISABLE(Integer)
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INSTRUCTION_START;
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int a = inst.RA, b = inst.RB, d = inst.RD;
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gpr.FlushLockX(ECX);
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gpr.Lock(a, b, d);
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if (d != a && d != b)
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gpr.LoadToX64(d, false);
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else
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gpr.LoadToX64(d, true);
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MOV(32, R(EAX), M(&PowerPC::ppcState.spr[SPR_XER]));
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SHR(32, R(EAX), Imm8(30)); // shift the carry flag out into the x86 carry flag
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MOV(32, R(EAX), gpr.R(a));
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ADC(32, R(EAX), gpr.R(b));
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MOV(32, gpr.R(d), R(EAX));
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//GenerateCarry(ECX);
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gpr.UnlockAll();
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gpr.UnlockAllX();
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IREmitter::InstLoc a = ibuild.EmitLoadGReg(inst.RA);
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IREmitter::InstLoc b = ibuild.EmitLoadGReg(inst.RB);
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IREmitter::InstLoc ab = ibuild.EmitAdd(a, b);
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IREmitter::InstLoc new_carry = ibuild.EmitICmpUlt(ab, a);
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IREmitter::InstLoc previous_carry = ibuild.EmitLoadCarry();
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IREmitter::InstLoc abc = ibuild.EmitAdd(ab, previous_carry);
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new_carry = ibuild.EmitOr(new_carry, ibuild.EmitICmpUlt(abc, ab));
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ibuild.EmitStoreGReg(abc, inst.RD);
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ibuild.EmitStoreCarry(new_carry);
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if (inst.OE) PanicAlert("OE: addex");
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if (inst.Rc)
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{
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CALL((u8*)asm_routines.computeRc);
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}
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#endif
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ComputeRC(ibuild, abc);
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}
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void JitIL::rlwinmx(UGeckoInstruction inst)
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@ -128,63 +128,31 @@ void JitIL::mftb(UGeckoInstruction inst)
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void JitIL::mfcr(UGeckoInstruction inst)
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{
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Default(inst); return;
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#if 0
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if(Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITSystemRegistersOff)
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{Default(inst); return;} // turn off from debugger
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INSTRUCTION_START;
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// USES_CR
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int d = inst.RD;
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gpr.LoadToX64(d, false, true);
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MOV(8, R(EAX), M(&PowerPC::ppcState.cr_fast[0]));
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SHL(32, R(EAX), Imm8(4));
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for (int i = 1; i < 7; i++) {
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OR(8, R(EAX), M(&PowerPC::ppcState.cr_fast[i]));
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SHL(32, R(EAX), Imm8(4));
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JITDISABLE(SystemRegisters)
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IREmitter::InstLoc d = ibuild.EmitIntConst(0);
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for (int i = 0; i < 8; ++i)
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{
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d = ibuild.EmitShl(d, ibuild.EmitIntConst(4));
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d = ibuild.EmitOr(d, ibuild.EmitLoadCR(i));
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}
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OR(8, R(EAX), M(&PowerPC::ppcState.cr_fast[7]));
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MOV(32, gpr.R(d), R(EAX));
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#endif
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ibuild.EmitStoreGReg(d, inst.RD);
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}
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void JitIL::mtcrf(UGeckoInstruction inst)
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{
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Default(inst); return;
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#if 0
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if(Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITSystemRegistersOff)
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{Default(inst); return;} // turn off from debugger
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INSTRUCTION_START;
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JITDISABLE(SystemRegisters)
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// USES_CR
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u32 mask = 0;
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u32 crm = inst.CRM;
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if (crm == 0xFF) {
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gpr.FlushLockX(ECX);
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MOV(32, R(EAX), gpr.R(inst.RS));
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for (int i = 0; i < 8; i++) {
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MOV(32, R(ECX), R(EAX));
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SHR(32, R(ECX), Imm8(28 - (i * 4)));
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AND(32, R(ECX), Imm32(0xF));
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MOV(8, M(&PowerPC::ppcState.cr_fast[i]), R(ECX));
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IREmitter::InstLoc s = ibuild.EmitLoadGReg(inst.RS);
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for (int i = 0; i < 8; ++i)
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{
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if (inst.CRM & (1 << i))
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{
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ibuild.EmitStoreCR(ibuild.EmitAnd(ibuild.EmitShrl(s, ibuild.EmitIntConst(28 - 4 * i)), ibuild.EmitIntConst(0xf)), i);
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}
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gpr.UnlockAllX();
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} else {
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Default(inst);
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return;
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// TODO: translate this to work in new CR model.
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for (int i = 0; i < 8; i++) {
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if (crm & (1 << i))
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mask |= 0xF << (i*4);
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}
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MOV(32, R(EAX), gpr.R(inst.RS));
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MOV(32, R(ECX), M(&PowerPC::ppcState.cr));
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AND(32, R(EAX), Imm32(mask));
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AND(32, R(ECX), Imm32(~mask));
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OR(32, R(EAX), R(ECX));
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MOV(32, M(&PowerPC::ppcState.cr), R(EAX));
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}
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#endif
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}
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void JitIL::crXX(UGeckoInstruction inst)
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@ -186,7 +186,7 @@ static GekkoOPTemplate table19[] =
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{193, &JitIL::crXX}, //"crxor", OPTYPE_CR, FL_EVIL}},
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{150, &JitIL::DoNothing}, //"isync", OPTYPE_ICACHE, FL_EVIL}},
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{0, &JitIL::Default}, //"mcrf", OPTYPE_SYSTEM, FL_EVIL}},
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{0, &JitIL::mfcr}, //"mcrf", OPTYPE_SYSTEM, FL_EVIL}},
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{50, &JitIL::rfi}, //"rfi", OPTYPE_SYSTEM, FL_ENDBLOCK | FL_CHECKEXCEPTIONS, 1}},
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{18, &JitIL::Default}, //"rfid", OPTYPE_SYSTEM, FL_ENDBLOCK | FL_CHECKEXCEPTIONS}}
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